Time-and-frequency synchronisation device

FIELD: communications.

SUBSTANCE: proposed device comprises a reference generator, two variable-ratio dividers, a phase detector, control generator, two digital-to-analogue converters, computer, mode selection unit, device for determining temporary position of the input pulse, index zone generator and a frequency divider.

EFFECT: reduced phase errors.

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The invention relates to communication technology, in particular to a method and apparatus for time-frequency synchronization of the communication system.

In communication systems, including mobile objects, channels of signal propagation between the transmitter and receiver data are multibeam and unsteady.

The effectiveness of communication systems is largely determined by the ability of algorithms for time-frequency synchronization to ensure nonstationary multipath channels required accuracy assessment temporary position signal and the frequency mismatch between the frequency of the input signal and the reference oscillator frequency.

The known device time-frequency synchronization, which implement various methods of their construction (WO 94/29994 A1, 22.12.1994, US 6459679 B1, 01.10.2002, WO 02/45387 A2, 06.06.2002, and others).

The closest in technical essence to the invention is a device for time-frequency synchronization of a communication system containing on the transmission side clock generator, the demultiplexer, the first counter, the second counter, the first persistent storage device, the third count fourth count, the second persistent storage device, the adder, the block data generation, the transmit path, the input clock is the input device, the output of the clock generator connected to the first input dem is tiplexer, which is the input clock pulses, a second input of the demultiplexer, which is controlled by input connected to the output of the first counter, the first output of the demultiplexer is connected to the input of a second counter, the output of which is connected to the input of the first counter and the first constant storage unit, the output of the first constant storage device connected to the first input of the adder, the second output of the demultiplexer is connected to the input of the third counter, the output of which is connected to the inputs of the second constant storage unit and the fourth counter, the output of which is connected to the third input of the demultiplexer, which is managed by the entrance, and the entrance of the block of data generation, the output of which is connected with the third input of the adder, a second input connected to the output of the second constant storage unit, the output of the adder connected to the input of the transmitting tract whose output is the output device at the receiving side the receive path forming on the outputs of the input digital complex signal on videocassette, the first and second agreed filters, which filters respectively in-phase and quadrature components generated digital input complex signal and forming a complex response of the first stage, the PE the first and second multiplier products, a first adder, a complex multiplier, block the formation of harmonics, the unit of calculation of the frequency shift, the first block of comparison with a threshold, the control unit, a clock generator that generates the output signal of clock pulses, the third and fourth agreed filters, which filters the adjusted digital input complex signal and forming a complex response of the second stage, the third and fourth multiplier products, the second adder, the second block of comparison with a threshold, the block of calculation of the additional frequency shift and the third adder, the input of the receive path is an input device, the first receiving path connected to the input of the first matched filter and the first input of the integrated multiplier, the second output of the reception path is connected to the input of the second matched filter and a second input of the complex multiplier, the outputs of the first and second multiplier products are connected respectively with the first and second inputs of the first adder, the output of which is connected to the first input of the first unit of comparison with a threshold, a second input connected to the first output control unit, the output of the first block of comparison with the threshold connected to the first input of the block of calculation of the frequency shift, the output of which is connected to the first input of the processing unit of the harmonics and the first input t is Atego adder, the second input block the formation of harmonics is connected to the output of the clock generator, the first and second outputs forming unit harmonics are connected respectively with the third and fourth inputs of the complex multiplier, the first and second outputs of which are connected respectively to the inputs of the third and fourth agreed filters, the output of the third matched filter connected to the first and second inputs of the third multiplier and the first input of the block of calculation of the additional frequency shift, the output of the fourth matched filter connected to the first and second inputs of the fourth multiplier and a second input unit for calculating the additional frequency shift, the outputs of the third and fourth multiplier products are connected respectively with the first and second inputs of the second adder, the output of which is connected to the first input of the second block of comparison with a threshold, a second input connected with the second output control unit that generates the output signal the end of the second stage, the output of the second block of comparison with the threshold connected with the third input unit for calculating the additional frequency shift and the first input of the control unit, the third output of which is connected to the fourth input of the unit of calculation of the additional frequency shift, the fourth output control unit is the first output device and you shall Odom signal of the final evaluation of the temporary provisions of the preamble, the first output unit for calculating the additional frequency shift, forming the first output further evaluation of the frequency shift is connected to a second input of the third adder that generates the output signal of the final evaluation of the frequency shift, the output of the third adder is the second output device, wherein at the transmitting side of the first counter is designed in such a way that allows the calculation of the signal preamble number of short code sequences forming the output signal of the control clock pulses for a given number N of cycles of the read, the second counter is designed in such a way that allows the calculation of the beep code sequence in the preamble of the number of clock pulses, forming an output signal corresponding to the address of the current elements of the short code sequence, the third counter is designed in such a way that allows the calculation of the signal of the long code sequence in the preamble of the number of clock pulses, forming an output signal corresponding to the address of the current element long code sequence, the fourth counter is designed in such a way that allows the calculation of the signal preamble number of a long code sequences forming the output control signal is of a clock pulse when a predetermined number M of cycles of reading and signal the end of the preamble, the first persistent storage device is designed in such a way that allows you to store the counts of the short code sequence, the second persistent storage device is designed in such a way that allows you to store the counts of the long code sequence, introduced counter pause counting on the interval pause preamble number of clock pulses, forming the output signal the end of the pause, the counter input pause is connected with the third output of the demultiplexer and the output from the fourth input of the demultiplexer, which is managed by the entrance; at the receiving side entered the first and second delay lines, (N-1) the first and (N-1) second multiplier products, the block boundary determining a priori interval that generates the first output signal the beginning of a priori interval of the temporary provisions of the second part of the preamble, and the second output signal the end of the a priori interval of the temporary provisions of the second part of the preamble, with the input of the first delay line coupled to the output of the first matched filter, the input of the second delay line is connected to the output of the second matched filter, and the first and second agreed agreed filters with a short code sequence, the N outputs of the first delay line connected to the corresponding N second inputs of the block of calculation of the frequency shift and the first and second inputs of the corresponding N first multiplier products, N outputs of the second delay line is connected with the corresponding N third inputs of the block of calculation of the frequency shift and the first and second inputs of the corresponding N second multiplier products, the outputs of the (N-1) first multiplier products connected with (N-1) additional first inputs of the first adder, the outputs of the (N-1) second multiplier products connected with (N-1) additional second inputs of the first adder, the output of the clock generator is connected to the fifth input of the unit of calculation of the additional frequency shift and the first input of the block boundary determining a priori interval, a second input connected to the output of the first block comparison threshold, the first output unit determining the boundaries of a priori interval connected with the second input of the control unit and the third input of the first block of comparison with a threshold, the second output unit determining the boundaries of a priori interval connected with the third input of the control unit that generates the first output control signal defining the end or re-start the implementation of the first phase, the third output signal exceeding the threshold of the second stage, the fifth output signal the end of the a priori interval of the second part of the preamble, the fifth output control unit connected to the sixth input of the block of calculation of the additional frequency shift, on the sixth output signal identification AP) - Rev. ornago interval of the second part of the preamble, the sixth output control unit connected to the third input of the second block of comparison with a threshold, the fourth control unit is connected with the second output unit for calculating the additional frequency shift (RU 2235429, NV 7/00, 27.08.2004).

All the above devices have inherent weaknesses, which in one way or another in the presence of phase errors.

The technical result - the reduction of phase errors in the generated clock while combining systems clock synchronization and transmission systems of signals single time.

To achieve the technical result a device time-frequency synchronization, containing series-connected reference oscillator, a first divider with variable division factor and a phase detector, a second input connected to the output of the second divider with a variable division ratio, and a controllable oscillator, the output of which is connected to the input of the second divider with a variable division ratio, and the input - output of the first inverter figure is similar, the inlet of which is connected to the first output of the transmitter, the second output of the transmitter is connected to the input of block mode selection, input of the transmitter is connected to the output of the phase detector and the output of block mode selection connected with control inputs of the first and second share who she is with variable coefficients division, and the keys to the temporary position input of the pulse shaper reference zones, the 2nd Converter figure is similar and the frequency divider to frequency pulse repetition time, the first sign of the determinant of the position of the pulse input is a control input of the second input of the determinant of the position of the pulse input coupled to the output driver reference zones, and the output of the determinant of the position of the input pulse is connected to an additional input of the transmitter, and the first auxiliary output of the transmitter connected to the input of the second inverter figure is similar, the output of which is connected with the control input of the reference oscillator, and the second auxiliary output of the transmitter is connected with the control input of the frequency divider to the frequency of pulse repetition time, the input connected to the output of the controlled oscillator and the input of the shaper reference zones and is the output clock frequency of the device, and the output is the output of the frequency divider to frequency pulse repetition time, and the alarm output of the transmitter connected to the control input of the shaper reference zones.

Figure 1 shows the structural electrical diagram of the device for time-frequency synchronization, figure 2 - algorithm calculator and figure 3, 4 and 5 - the algorithms of the device in the hypoxia modes.

Device time-frequency synchronization contains the reference oscillator 1 (OG), the first and second dividers 2 and 4 with variable division factor (DPCD), a phase detector 3 with relay characteristic (RFD), a controllable oscillator 5 (UG), block mode selection 6 (drilling and blasting), the transmitter 7, the first and second converters 8 and 9, the figure is similar, the determinant of a 10 position input signal, the driver of the support zone 11 and the frequency divider 12.

The device works in the following way:

The first 2 and second 4 DPCD in the process of each division form pulses with different periods, respectively, of the signals of the EXHAUST gas 1 and 5 UG. The difference in the durations of the periods of the pulses generated by various DPCD, for each pair of the division ratio has a predetermined value. In RFD 3 compares the moments of the receipt of the front edges of the pulses from the outputs of the first 2 and second 4 DPCD and fixed polarity relative clock skew. If the leading edge of the pulse from the second 4 DPCD received earlier than the first 2 DPCD, RFD 3, a signal is generated timing (OP), and if later, the signal delays (FROM). These signals are fed to the transmitter 7, which is formed by the control signal frequency of 5 UG, arriving at its input via a first Converter of figure 8 is similar. The computer 7 generates a control signal which will set the desired hour is GTC YR 5 and the phase of the divided signals from the second 4 DPCD relative signal output from the first 2 DPCD, as with drilling and blasting 6 are corresponding pairs of ratios of the first 2 and second 4 DPCD so that the measuring cycle, the amount of periods becomes the same if frequency generated by UG 5, is installed in a accordance with the frequency of the EXHAUST gas 1 and the phase difference between the front edges of the pulses from the outputs DPCD 2 and 4 for the measuring cycle is determined by the number of signals OP and ON, obtained from the output RFD 3. Frequency control of LU (exit 1 evaluator) is the algorithm of the PLL, which is not considered here.

The control circuit device (using the calculator) on the one hand changes the start summable periods DPCD 2 and 4 cycle measurement and accordingly the phase of the signals at the output RFD 3 (on the second signal output of the transmitter), which uses a phase-locked loop (according to the signals from the first output of the transmitter) is again set to zero, and on the other side (of the first additional signal output of the transmitter adjusts the frequency of the signal OG-1 and accordingly the frequency of the output signals UG 5, i.e. carried out separate control frequency and phase of the output signals of the clock frequency and, in addition, signal the second additional output of the transmitter sets the phase of the output signals of the exact time.

The control circuit sets algori the IOM transmitter 7, which receives signals from the output of the identifier 10 of the regulations of the input signal, in which the input signal coincides with any of the reference zones coming from the driver 11 of the reference zones, the length of which is equal to the possible maximum variation of the provisions of the input pulses. Depending on which of the reference zones coincided pulse input signal, the computer 7 generates appropriate control signals to the phase ANGLE 5 and the frequency of the EXHAUST gas 1. The position of the output signal pulses exact time from the output of the frequency divider 12 is set corresponding command transmitter 7.

The generalized algorithm of the computer 7 shown in figure 2, performs the following functions:

- sets the operation mode of the transmitter using algorithms 1, 2 and 3;

- generates the control signal of the phase divider (sets the phase of the input signal RFD-3) - 2-th output of the transmitter;

- generates a control signal OG-14 - 1st supplementary output of the transmitter;

- generates a pulse set the initial phase of the divider 12 (2nd supplementary output signal).

The inclusion of the described algorithm is performed on the "start" command or automatically when the device is switched on and receiving at its input a signal from the output of the unit election signals.

The control signal frequency, the UG shall be made in accordance with algore the IOM systems phase-locked loop and is not associated with this algorithm.

Starts the algorithm No. 1 (figure 3), according to which adjusts the frequency of the EXHAUST gas 1 and provided tracking the phase of the input pulse so as to compensate for the effect of the initial error in the nominal clock frequency, i.e. the phase change of the output signal and accordingly the position of the reference areas on the release of their driver 11 for each input pulse should be at least possible deviation of the phase of the output signal due to the initial error in the nominal clock frequency, i.e. the phase change of the output signal YR 5 - Mδϕ is defined by the formula (1):

where- the relative error in setting the nominal clock frequency, T is the period of the input signal. (For example, whenand T-1 sec - get Mδϕ≥10 NS).

After the frequency of the EXHAUST gas is well established and this will be detected using the algorithm No. 1, the device starts to operate in accordance with the algorithm No. 2 (figure 4), where M times decreases the step of regulating the phase of the output signal and produces a more accurate correlation of the frequency of the EXHAUST gas. When the frequency is set equal to the nominal value, with very high accuracy, the device starts to work on the 3-d algorithm (figure 5), which control the feeding phase of the output signal starts to be not for each comparison with the position of the input signal, but only after repeated averaging the results of the comparison, and the frequency of the EXHAUST gas can be changed only on ±1.

Set the initial phase of the dividers is made in accordance with the algorithm No. 1 after is determined by the temporal position of the working point, which is further supported by the corresponding frequency control of the EXHAUST gas and the phase of the output signal.

Algorithm No. 1 - coarse phase control output signal and the frequency of the EXHAUST gas.

Algorithm No. 2 - phase control of the output signal with a minimum step and the tuning frequency of the EXHAUST gas.

Algorithm No. 3 - phase control of the output signal with a minimum step according to the averaging and correction of the frequency of the EXHAUST gas.

Example with parameters to control the phase ANGLE 5 with coarse and fine adjustment is considered for the case when:

Frequency UG - 16,384 MHz;

Frequency OG - 5.0 MHz;

The ratios DPKG-1 are chosen equal 80V65;

The ratios DPKG-2 are chosen equal 262V213.

During normal operation, the PLL during one measuring cycle is one division in DPKG - and 4 respectively 80/262 and 18 divisions on 65/213.

On the basis of data from consecutive measurements of the phase difference between the frequency is changed UG using the 1st Converter figure 8 is similar, so that the measured phase difference of the signals at the input RFD 3 is a PLL to zero, because chastoty phase ANGLE is set and controlled by the frequency of the EXHAUST gas.

At the minimum step of the phase control ANGLE (±δϕ) (division 65/213) changing the number of divisions from 18 to 17 or 19 (depending on the sign of the phase difference).

When coarse phase control ANGLE (±Mδϕ) DPKG additionally divide once 80/202 or once excluded the transition from divisions to 65/213 on 80/262 and re 18-fold division into 65/213.

At the minimum step creates additional phase shift (δϕ)±0,488 NS, and at rough control Mδϕ±9,76 NS, i.e. M=20 and δϕ=0,488 NS.

Algorithm No. 1 shown in figure 3.

The reference zone, coming from the shaper, have a duration corresponding to the distribution of the deviations of the temporary provisions of the input pulse. If the distribution provisions of the input signal relative to its mean value does not exceed 200 NS, the duration of the reference area should be not less than 400 are not. To determine the position of the input signal are formed three zones, periodically sequentially repeated. The leading edge of the input signal necessarily falls into one of the zones (in first, second or third - 1V2V3), then the algorithm breaks down into three options. Each of these options is determined by the corresponding transition from one zone to another, which will determine the position of the generated clock pulses (TI) and time pulses (VI). As soon as e is from the transition will be determined, the installation phase of the divider. In the future, after the receipt of each input pulse controlled phase ANGLE 5 to the value Mϕ so that was the tracking of the provisions of the zones after the input pulse. For example, if the selected output signal is the transition between the first and second area, when the contact input signal to the second area, the control signal will be-Mϕand when injected into the first zone +Mϕfor the first zone ahead of the second. The second zone is in turn ahead of the third, and the third first. To adjust the frequency of the EXHAUST gas 1 is possible only after the "I" dimension (i.e. while i<I the frequency of the EXHAUST gas 1 is not changed). After the "I" of the measurement signal of the frequency control of the EXHAUST gas is determined by the value of "k", which is equal to the difference between the number of signals +Mϕ and Mϕreceived during this time, the phase control ANGLE 5.

Signal to adjust the frequency of the EXHAUST gas 1 is equal to N₁=k/c₁where c₁is determined by the characteristic of the inverter figure 9 is similar. When the signal frequency control N₁becomes smaller than a certain threshold value A1, it is possible to register a sufficient accuracy frequency setting in the EXHAUST gas 1 and switch the transmitter on 2-d algorithm, shown in figure 4, and outputs A₂(1), And₂(2)And₂(3) correspond to the inputs (1), (2)and (3) the 2-nd algorithm.

Unlike Sal the rhythm No. 1 when the algorithm No. 2 we know in advance the condition of the working front bearing zones and depending on the provisions of the scheme can operate in one of 3 possible ways, the transition which is defined in algorithm No. 1. The symbols "i" and "k" in the algorithm No. 2 play the same role as in algorithm No. 1, but the averaging time when controlling the EXHAUST gas determined by the value of I₁may differ from I, installed in algorithm No. 1.

Depending on the averaging time is determined and a control step of measuring the value of "k", i.e. the value of "C₂" may differ from the values of C₁. The transition to the algorithm No. 3 is possible only in the case when a control action on the frequency of the signal from the N₂becomes less than the threshold value And₂. Value And₂it is advisable to set equal to 1, or, in extreme cases, no more than 2 or 3.

Algorithm No. 3 shown in figure 5. In many respects it is similar to algorithm 2 and also breaks down into three parts, which differ from each other only in a definition of a reference zone. Unlike algorithm No. 2 phase control ANGLE 5 is not carried out each time the input pulse, but only in the case when the incoming input pulses often coincide with one of the anchor zones, i.e. in one of the reference areas they get x times, and in the other x+At times. Averaging when the control frequency of the EXHAUST gas in the 3rd algorithm should be the same as when the 2nd algorithm (i<I₁). In that case, if a₂≠1, then the frequency of the EXHAUST gas (1) is not regulated when N₂<A₂and when N₂≥ And₂the control signal frequency should be minimal.

Device time-frequency synchronization of a communication system containing series-connected reference oscillator, a first divider with variable division factor and a phase detector, a second input connected to the output of the second divider with a variable division ratio, and a controllable oscillator, the output of which is connected to the input of the second divider with a variable division ratio, and the input - output of the first inverter figure is similar, the inlet of which is connected to the first output of the transmitter that implements the algorithm of operation of the device, the second output of the transmitter is connected to the input of block mode selection, input of the transmitter is connected to the output of the phase detector and the output of the block selection modes connected to the control inputs of the first and second dividers with variable coefficients division, as well as keys to the temporary position input of the pulse shaper reference zones, the duration of which is determined by the expected variations of the provisions of the input pulse, the second Converter figure is similar and the frequency divider, the first sign of the determinant of the position of the pulse input is a control input of the second input of the determinant of the position of the pulse input connected to the output of the build is the motor bearing zones, and the output of the determinant of the position of the input pulse is connected to an additional input of the transmitter, and the first auxiliary output of the transmitter connected to the input of the second inverter figure is similar, the output of which is connected with the control input of the reference oscillator, and the second auxiliary output of the transmitter is connected with the control input of the frequency divider, the input connected to the output of the controlled oscillator and the input of the shaper reference areas, and is the output clock frequency of the device, and the output is the output of the frequency divider, and an emergency exit transmitter connected to the control input of the shaper reference zones.