Frequency synthesizer

FIELD: radio engineering.

SUBSTANCE: invention is referred to radio communication and may be used in radio receiving and radio transmitting devices for radio signal generation, modulation and frequency conversion. Synthesizer includes signal source of reference frequency, frequency and phase detector, control unit, divider with variable division factor, two low-frequency filters, voltage controlled generator, direct current amplifier, interfacing circuit, two-mode auto generator.

EFFECT: decrease of noise level in output signal.

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The present invention relates to radio communications and can be used in receiving and transmitting devices designed to generate radio signals, modulation and frequency conversion.

For transmission and reception of signals are used generators of sinusoidal oscillations, the basic requirements which are frequency stability and spectral purity of the output signal, in suppressing it includes the parasitic oscillations of different types.

Frequency synthesizers based on phase lock loop (PLL), is widely known in the technical literature[1], [2], [3], [4] and other Synths allow you to obtain a sinusoidal oscillation with a given frequency step, and the frequency stability is determined by a precision quartz oscillator. However, frequency synthesizers based on phase lock loop frequency, are part of the output voltage of a significant amount of side components and noise of various types.

Functional diagram synths two types shown in RIS str in the book [1].

In the first synthesizer at the first input of the frequency-phase detector (CPD) connects the reference generator (more precisely after the divider by 4), and to the second input CFD - output voltage from generator voltage-controlled (VCO). Output CFD through a lowpass filter (LPF) control the em frequency of the VCO so she takes a value that is exactly equal to the reference oscillator frequency multiplied by the division factor of the divider with variable division factor (DPCD). The second synthesizer differs only in that the reference oscillation therein is formed of harmonic oscillations of the reference oscillator, which is fed to the first input CFD, and to the second input CFD served harmonic voltage to the VCO. Output CFD through the low-pass filter controls the frequency of the VCO in such a way that it accepts a value that is exactly equal to the frequency of harmonic oscillations, generated from the oscillations of the reference oscillator. Both of these frequency synthesizer represent a static system of automatic regulation. It is known that the ring of such a system is the integrator. Implemented integrator, as a low-pass filter with transfer factor (1+f/f_cp), where f_cpthe cutoff frequency of LPF. LPF constant component of the error and filter (suppresses) the output voltage with the frequency of the reference oscillator, with the frequency of the VCO, the last division in DPKG, and various parasitic interferences and noises. Fundamentally impossible to improve filtering, applying a low-pass filter of a higher order, for example with ratio (1+f/f_cp)². For this reason, noise filtering and various interference arising DPCD and CFD, according to the law (1+f/f_cpand, therefore, limited izena.

In the book [4]. their level defined in the region of 100 dB in the frequency band 10 Hz or 75 dB in the frequency range 3 kHz. Ibid, p.87 the dependences of the "noise"caused by the phase-locked loop circuit, RIS, which shows that at offset 10 kHz from the synthesized frequency attenuation "noise" is (90-110) dB in the band of 1 Hz, and the bandwidth of 3 kHz (55-75) dB. In [3] only the level of suppression of separation is evaluated in (80-120) dB. Similar figures are found in many other sources.

This suppression of noise and interference in the output voltage of the synthesizer to the current conditions of loading frequency is insufficient.

In the literature [4] it is shown that the noise oscillator (VCO special case of the oscillator) is much smaller. According to p.85 they are (155÷161) dB. In the literature [6] and [7] analyzed the nature of noise oscillators and their dependence on various factors, attenuation of the noise in the composition of the output voltage of the oscillator. As can be seen from these data, the resulting suppression of noise in oscillators on (20-30 dB more than in the synths. However, the oscillators do not have the required stability of the output frequency, comparable to the stability of synthesizers. With the exception of quartz oscillators, but they are virtually rebuilt in frequency. Thus, the oscillator is e are an alternative to frequency synthesizers.

Therefore, the known frequency synthesizers are inefficient in terms of suppression of the "noise" in the output voltage.

The closest in technical essence to the proposed device can be considered as a frequency synthesizer with a digital PLL shown in (figure 1.15) p.33 in [2], adopted for the prototype, with a few clarifications: the source of the reference signal frequency is designated as a block and not the arrow, the updated name of the phase detector frequency-phase detector and the control circuit on the control unit.

Functional diagram of the device of the prototype is presented in figure 1, where we have introduced the following notation:

1 - source signal from a reference frequency (ISAC);

2 - frequency-phase detector (CPD);

3 - the control unit (cu);

4 - divider with variable division factor (DPCD);

5 - lowpass filter (LPF);

6 is a voltage controlled oscillator (VCO).

The device prototype contains connected in series source signal from a reference frequency (ISAC) 1, the frequency-phase detector (CPD) 2 and a lowpass filter (LPF) 5, the output of which is connected with the control input of the oscillator, voltage-controlled (VCO) 6, a second output which is the output of the device, and the first output of the VCO 6 through the divider with variable division factor (DPCD) 4 is connected with the second input CPD 2, the control input of the KDP is 4 connected to the output of the control unit (BU) 3, the entrance of which is a control input device.

The device prototype works as follows.

Output voltage ISEC 1 is supplied to the first input CPD 2, the second input is through DPCD 4 is fed the output voltage of the VCO 6. Will be understood DPCD not only the digital unit of the frequency division, and any block that provides a conversion, frequency conversion VCO to the frequency of the comparison to the reference frequency. The error signal from the output CFD 2 through the low-pass filter 5 is fed to the control input of the VCO 6, the frequency of which changes up until divided in a given number of times in DPCD 4 it will not be equal to the frequency ISAC 1. In this case, the output voltage at the output CFD 2 will cease to change, and the output frequency of the VCO 6 will be equal to the frequency ISAC 1, multiplied by the division factor DPKG 4. And output BU 3 control input DPKG 4 signal that establishes the desired division ratio, i.e. the output frequency of the device. Consequently, at the output device connects to an external load) will be sustained oscillation at a given frequency. Thus, a ring of FAP.

Given the above, a drawback of the prototype is weak filtering "noise" in the output.

To eliminate this drawback in the frequency synthesizer containing placentas is sory United source signal from a reference frequency, frequency-phase detector and the first low pass filter, connected in series a voltage controlled oscillator and a divider with a variable division ratio, the output of which is connected to a second input of the frequency-phase detector, a control unit, which input is a control input device, and the output control unit connected with the control input of the divider with a variable division ratio, and the output of the first lowpass filter connected with the control input of the oscillator, voltage-controlled according to the invention introduced a voltage divider, dual-mode oscillator, connected in series DC amplifier circuit pair and the second low pass filter, while the second output generator, voltage-controlled through the voltage divider connected to the RF input of the dual-mode oscillator, the output of the second lowpass filter connected with the control input of the dual-mode oscillator whose output is the output of the device, in addition, the output of the first lowpass filter connected to the input of the DC amplifier.

Functional diagram of the device is presented in figure 2, where we have introduced the following notation:

1 - source signal from a reference frequency (ISAC);

2 - frequency-phase detector (CPD);

3 - the POC management (BU);

4 - divider with variable division factor (DPCD);

5 and 10, the first and second low pass filters (LPF);

6 is a voltage controlled oscillator (VCO);

7 is a DC amplifier (UPT);

8 is a voltage divider (NAM);

9 is a diagram pairing (SSP);

11 - dual mode oscillator (YES).

The proposed device has connected in series source signal from a reference frequency (ISAC) 1, the frequency-phase detector (CPD) 2, the first low pass filter (LPF) 5, a DC amplifier (UPT) 7, scheme pairing (SSP) 9 and the second low-pass filter 10, the output of which is connected with the control input of the dual-mode oscillator (YES) 11; connected in series a voltage controlled oscillator (VCO) 6, and the voltage divider 8, the output of which is connected with a radio frequency (RF) input YES 11 whose output is the output device. In addition, the output of the first low-pass filter 5 is connected with the control input of the VCO 6, the first output of which through the divider with variable division factor (DPCD) 4 is connected with the second input CFD 2. Managing input device is the input of the control unit (BU) 3, the output of which is connected with the control input DPKG 4.

The proposed device operates as follows.

As above, will be understood DPCD not only the digital unit of the frequency division, and any block that provides the bring the s, converting the frequency of the VCO to the frequency of the comparison to the reference frequency.

The management team for inclusion is fed to the input BU 3, the output of which is the command to establish asked (for example, equal to N) of the division ratio of DPCD 4. The signal from the first output of the VCO 6 through DPCD 4 is supplied to the second input CPD 2, at the first input of which the signal from ISAC 1.

The output voltage CFD 2 through the first low-pass filter 5 is fed to the control input of the VCO 6. Note that the blocks: the first low-pass filter 5, the VCO 6, DPCD 4, CFD 2 ISAC 1 form a ring PLL (PLL), see, for example, (figure 1.15) on page 3 [2]. And after some time T_Cequal to the time of actuation ring PLL, the VCO outputs 6 provides the frequency is exactly equal to the reference frequency multiplied by N is the division ratio of DPCD 4. Thus, a ring PLL, which includes the VCO 6.

At the same time, the output voltage from the first low-pass filter 5 through the chain, consisting of series-connected UPT 7, BSC 9 and the second low-pass filter 10, is fed to the control input 11. Moreover, the transfer coefficients of the blocks 7, 9 and 10 is selected so that the frequency of self-oscillations (natural vibrations) YES 11 close to the oscillation frequency of the VCO 6. Under the influence of the control voltage the frequency of self-oscillations YES 11 is installed close to the oscillation frequency of the VCO 6, with the WTO is th output of which through DN 8 RF harmonic signal is applied to the RF input YES 11.

Under the influence of the RF voltage (external) YES 11 enters the capture mode in which the oscillation frequency YES 11 becomes equal to the oscillation frequency of the VCO 6.

This build allows you to have on the output device (connected load) voltage with a frequency equal to the synthesized VCO 6, which is encircled by the ring of the PLL, and the noise corresponding to the noise to 11, which operates in the mode of self-oscillations.

Description dual-mode oscillator is given in the sources[5], [6], [7] and [8]. In particular, in [6] discussed in detail the principle of capture and the capture bandwidth, and the functional (1) principal (2) schema dual mode oscillator.

For understanding the operation of the device let us consider the properties of the dual mode oscillator mode) seizure frequency. In the textbook [8] on CTR is the ratio of (9.66)between the capture bandwidth of the oscillator with the offset of the external excitation, the q of the circuit and the ratio of the magnitude of the amplitude of self-oscillations to the amplitude of the external effects:

where ω_withthe frequency of the external voltage capture;

ω₀- frequency self-oscillations of the generator;

E - voltage self-oscillations;

E_OS- voltage external excitation;

Q is the quality factor of the oscillator circuit./p>

For our purposes, this formula can be converted to a more convenient form:

where Ω - generalized detuning

ω₀/2Q - bandwidth circuit of the oscillator.

Value Ω shows how many times the offset frequency is less than the bandwidth of the oscillator circuit.

From (1) it follows that the voltage of the external excitation F_OSnecessary to capture the frequency of the oscillator may be less than the voltage of self-oscillations during so many times, how many times the offset frequency |ω_with-ω₀| is less than the bandwidth of the loop oscillator. Since the offset generator VCO 6 and 11 is very small, to ensure the capture mode you want the voltage AGM considerably less than that is To reduce the amplitude of the RF voltage is used NAM 8.

In [5] and [6] a more accurate expression for the General case without a large number of approximations introduced by the author [8], obtained by other methods, and tested experimentally. In particular, it is shown that inside the band capture mode capture time constant exposure to E_OSequal to the time constant of the oscillating circuit of the oscillator, multiplied by the ratio of:

Thus, the bandwidth of the oscillator circuit 11) to the excitation voltage E decreases time.

From this it follows that "noise" in the voltage of the external excitation is filtered by the loop band Q/ Ω. For example, when Q=60 and Q=1%, band Q/ Ω=6000. Suppression of noise from the external excitation by 10 dB will occur when the offset is greater than 1/30 of the bandwidth of the oscillator circuit, the excitation of 20 dB will occur when the offset is greater than 1/15 of the bandwidth of the loop oscillator. When the output frequency of oscillator 30 MHz this will amount to 8.3 kHz and 16.7 kHz, respectively.

Therefore, when the grip 11 external RF signal from the VCO 6 (with a much larger amount of "noise") frequency at its output will be equal to the frequency of the VCO 6, and "noise" to 11 will be determined by its own "noise" YEAH 11, which is significantly lower than the VCO 6 is covered by the ring PLL, except in extremely narrow region of frequencies in which the noise will be equal to the noise VCO 6.

At the output device produces a voltage whose frequency is determined by a stable frequency source of reference frequency, and "noise" is determined by the oscillator, which provides a significant reduction of "noise" in the output.

As a DC amplifier, you can use an operational amplifier.

Circuit voltage dividers on the transformer or resistive dividers - known tehnicheskomprodlenii. The pairing scheme can be implemented, for example, at the operational amplifier.

The implementation of the remaining blocks is not straightforward, as they are widely known in the scientific literature.

Thus, the proposed solution allows you to generate stable voltage in the frequency range with a specified frequency step with a low noise level.

Sources of information

1. Bobkov A.M. "the Real selectivity of receiver paths in dense signal environment". - St. Petersburg 2001, str.

2. Manasevich Century "frequency Synthesizers. Theory and design". Translation from English Vaulserre, edited Ashlina. - M., "Communication", 1979

3. Romanov, S. Kaliev, I.A. Markov Definition of interference fragmentation in frequency synthesizers with PLL using Delta-Sigma modulators in fractional frequency dividers. // "theory and technique of radio communication" Scientific-technical collection, JSC "Concern "Sozvezdie", Voronezh, 2006, No. 1, p.97-102.

4. "System phase sync" // Akimov V.N., Belyustina L.N., White NR. and others, Ed. by V.V. Shahgeldyan, LN. Belasting - M.: Radio and communication, 1982

5. BRCS OF "the Effect of external vibrations on the oscillator on the differential cascade", p.102-108 // "theory and technique of radio communication", Scientific-technical collection, VNIIS, Voronezh, 2002, No. 2.

6. BRCS OF "Theory of the influence of the on oscillator noise and external vibrations". // "theory and technique of radio communication", Scientific-technical collection, JSC "Concern "Sozvezdie", Voronezh, 2006, No. 1, p.106-112.

7. BRCS OF, Slipko SV "Noise oscillator on the differential cascade." // "theory and technique of radio communication", technical digest, 2003, No. 2.

8. Gonorovski I.S."Radio circuits and signals. - M.: "Soviet radio", 1977

The frequency synthesizer containing connected in series source signal from a reference frequency, the frequency-phase detector and the first low pass filter, connected in series a voltage controlled oscillator and a divider with a variable division ratio, the output of which is connected to a second input of the frequency-phase detector, a control unit, which input is a control input device, and the output control unit connected with the control input of the divider with a variable division ratio, and the output of the first lowpass filter connected with the control input of the oscillator, voltage-controlled, characterized in that the input voltage divider, dual-mode oscillator, connected in series DC amplifier the schema pair and the second low pass filter, while the second output of the generator, voltage-controlled through the voltage divider connected to the RF input of the dual-mode waveguide the generator, the output of the second lowpass filter connected with the control input of the dual-mode oscillator whose output is the output of the device, in addition, the output of the first lowpass filter connected to the input of the DC amplifier.