System for actualization of databases for information-marketing centers of electronic trade

FIELD: computer science.

SUBSTANCE: system has block for receiving actualization files, first and second devices for selecting supporting database record address, device for selecting address of user workplace block for selecting addresses of database record, data dispensing block, reverse counter, first and second codes comparison blocks, two registers, AND elements, OR elements and delay elements.

EFFECT: higher speed of operation.

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The invention relates to computer technology, in particular to the system updating of databases of information and marketing centers of e-Commerce.

Known systems that could be used to solve the task (1, 2).

The first of the known systems contains blocks receiving and storing data, connected to the control blocks and data blocks search and selection, connected to the blocks of the data storage and display, the clock inputs are connected to outputs of the control unit (1).

A significant disadvantage of this system is that you cannot solve the problem of updating data stored in memory in the form of relevant documents simultaneously with the solution of the issue of the content of these documents to users in real time.

Known and other system containing blocks of data reception, the outputs of which are connected with the memory unit and data processing unit, the block selection time intervals, the outputs of which are connected to the unit receiving data, the block receiving user requests to the memory unit and the data processing unit, the outputs of which are connected to one inputs of the switching unit channel data output, the other input of which is connected to the block selection intervals, and outputs are the outputs of the system (2).

Poslednee the above technical solutions closest to being described.

Its disadvantage is the low system performance, due to the fact that the search data updating is carried out throughout the volume of the database, which leads to unnecessary loss of time and the impossibility of implementation of e-Commerce in real time.

The purpose of the invention is the improvement of the system performance by avoiding search address of data to be updating, and implementation of directly addressing the change data records in the database of the information and marketing centers.

This objective is achieved in that in the known system, containing a block of receive files updating, the information input of which is the first information input of the system, the first and second clock inputs of the block are first and second clock inputs of the system, and the first information output unit is an information output system, the first device selection reference recording address data input connected to the second information output unit receive files updating, synchronizing input connected to the clock output unit receive files updating, the information output device is connected with one input element OR group, and synchronizing the output of the CE is ecchi reference address database entries connected to one input of the first element OR the output of which is connected to the input of the first delay element, the output of which is the first clock output unit, the first register, the information input of which is the second information input system clock input connected to the output element And one input which is the third synchronizing input of the system, and the other is connected to control the output unit receive files actualization, the second element OR the output of which is connected to the input of the second delay element, the output of which is the second clock output system, the second register, the information input which is the third information input system clock input is the fourth synchronizing input of the system, and the output connected with a single information input block grant data, information outputs of which are informational outputs of the system group, the third element OR, one input of which is connected to the synchronizing output of the first device selection reference address database entries, the device selection address of the working place of the user, an information input connected to one output of the first register, a clock input connected to the fourth clock input of the system, and information and synchronizing the outputs of seleccionades workplace user connected to another information and clock inputs of the block of data output, respectively, the fourth and fifth elements OR entered the first block comparison codes, information whose input is connected to the third information output unit receive files updating, synchronizing input connected to the output of the first delay element, the first output of the first block of code compares connected to the third clock input unit receiving files updating to another input of the first element OR to one input of the fourth element OR the second output of the first unit of comparison codes connected with one input of the fifth element OR, and the third output unit is the third synchronizing system output, the second block of code compares, an information input connected to the fourth information the output unit receive files updating, synchronizing input connected to the second output of the first block of code compares the first output of the second unit of comparison codes connected with the fourth clock input unit receiving files actualization, and the second output unit is connected to another input of the fifth element OR the output of which is connected with the first installation unit receive files actualization, and the second installation unit receive files actualization, reversible counter, an information input connected to the output element OR group, the clock input is connected to output the third control element OR summing input coupled to the output of the fourth element OR setting input connected to the output of the fifth element OR, as the input of reversible counter is the address of the system output, a second device selection address write data input connected to another output of the first register, a clock input connected to the output element And the first information output device connected to the other inputs of the elements OR groups, and the clock output devices are connected to other inputs of the second and third elements of the block select address data input connected to another output of the second device selection reference address base entries data, clock input is connected to the synchronizing output of the second device selection reference address database entries, the first and second control inputs of the block are first and second control inputs of the system, and the third control input unit connected to the control output unit receive files actualization, the first output unit is connected to the other inputs of the second and fourth elements OR, and the second output unit is connected to the subtractive input of the reversible counter and the other input of the second OR element.

The invention is illustrated by drawings, where figure 1 presents p churna diagram of the system, figure 2 presents an example of a specific structural embodiment of the block receive files actualization figure 3 - example of a specific structural embodiment of the first device selection reference address database entries and device selection address of the user's workplace, figure 4 - example of a specific structural embodiment of the second device selection reference address database entries, figure 5 - example of a specific structural embodiment of the first unit of comparison codes, figure 6 - example of a specific structural embodiment of the second unit of comparison codes figure 7 - example of a specific structural embodiment of the block selection address database Fig is an example of a specific structural embodiment of the block of data output.

The system (figure 1) contains the block 1 receive files updating of databases of information and marketing centers (EMC), the first 2 and second 3 device selection reference address database entries, the selection device 4 addresses the user's workplace, the first 5 and second 6 registers, the first 7 and second 8 blocks comparison codes, reversible counter 9, block 10 address selection database, block 11 data output, the first 12, second 13, 14 third, fourth, 15 and 16 fifth elements OR element 17 And group 18 elements OR first 19 and 20 second delay elements.

Figure 1 also shows the PE the new 21, the second 22 and third 23 information input system, the first 24 and second 25, 26 third, fourth 27 clock inputs of the system, the first 28 and second 29 control inputs of the system, and an information output system 30, the address 31 the system output, the first 32 and second 33 and third 34 synchronizing the outputs of the system, and information outputs 35-37 system group.

Block 1 (figure 2) contains registers 40-43, the trigger 44, the elements 45-47 OR.

The drawing also shows the first 21 information input unit, the first information input of the system, the first 24 and second 25 clock inputs of the block, the first and second clock inputs of the system, the third 50 and 51 fourth clock inputs of the block, the first 52 and second 53 installation unit, and the clock 54, 55 managing, and the first 56 and second 57, 58 third and fourth 59 information outputs of the block.

Devices 2, 3, 4 are identical (figure 3 and 4) and contain the memory block 71, made in the form of a persistent storage device, a decoder 72, items 73-75 And element 76 OR, and elements 77-78 delay. The difference device 3 consists only in the fact that the outputs of the memory block is divided into two outputs 81 and 83.

The drawing also shows information 79 and clock 80 unit, as well as information 81, 83 and the clock 82 outputs of the block.

Unit 7 (figure 5)contains a counter 90, the comparator 91 and the elements 92, 93 and 94 of the delay.

The drawing also shows information 95 and clock 96 inputs of the block, the first 98 and 99 second, and third 100 clock outputs.

Block 8 (6) contains a comparator 101, a counter 102, the elements 103, 104 delay.

The drawing also shows information 105 106 and synchronization unit, the first 107 and second 108 clock outputs.

Block 10 (7) contains the register 110, and a reversible counter 111, a comparator 113, 114, the first 115 and second elements 116 And 117 first, second 118 and 119 third elements OR the first 120, 121 and second 122 third delay elements. The drawing also shows information 125 and the clock 126 unit, the first 28 and second 29 127 and the third control unit, and control 128 and 129 outputs of the block.

Block 11 (Fig) contains the register 140, the decoder 141, 142 first, second 143 and 144 third group of elements And the element 145 delay. The drawing also shows the first 146 and 147 second information and the synchronizing 148 unit, as well as information 35-37 outputs group outputs of the unit and system.

All nodes and elements of the system are made on the standard of potentially switching elements. To simplify the drawing, installation chain assemblies and units in the initial state not shown.

The core of the e-Commerce system is a network of information and market the trade centers, which provides connectivity:

- on the level of external engagement with the Government of the Russian Federation, ministries and agencies, the governments of the republics, regions, the regions and the Federal centre for electronic trading;

at the level of internal interaction within the serviced EMC zones with entrepreneurs and associations engaged in the supply of products and services.

In the process of creating the EMC their role is in transition from conventional (paper) methods design of commercial operations to electronic document management. Electronic document management changes the dynamics of the execution of trading operations and promotes increase of efficiency of functioning of the economy.

Information marketing software market goods and services on a national scale Russia is focused on creating conditions conducive to the achievement of the following objectives:

- reducing the number of intermediaries, accelerate the promotion of products and services in the markets, and as a result, the efficiency of working capital, reduce costs and increase producers ' profits;

- increased competition among manufacturers, ensuring a higher quality of goods and services, reducing their costs and selling prices, increased sales, increased demand for electronic the trading methods and systems integrated information enterprise management;

- decrease time searching for and obtaining the necessary legal and market information, information and marketing services, as well as on the design of industrial, technical and commercial documentation, including obtaining various permits, licenses, certificates, etc.;

- the protection of national producers from the expansion of imported products on the virtual electronic markets, overcoming the technological dependence of domestic enterprises in the sphere of IT-technologies;

- comprehensive development and support of the national field of IT-technologies;

- significant (40-50%) increase in regular users of information telecommunication networks among small and medium enterprises;

the creation of a single, available and secure information space data on supply and demand across the entire range of goods, products, works and services;

- the use of objective market information to implement effective economic levers in the Executive bodies of all levels, to improve the quality of current and future planning, implementation methods, forecasting and simulation results of the decisions;

- ensuring the widespread adoption of e-Commerce, including e-Commerce for the state what the state needs.

Today, it has been the preconditions necessary for rethinking the methodology and ways of organizing information and marketing collateral subjects of the market. Already not a priority for the formation and distribution of data arrays with primary information about producers and consumers. Requires the development and implementation of effective methods and systems of the organization of regular information flow exchange market data and electronic documents between the subjects of market relations, providing joint formation and use of available data arrays into a single electronic information and communication space.

Information and marketing centers are the basis for the creation of organizational, structural, and technological conditions for direct interaction between producers and consumers in today's telecommunication and technical basis, with the lowest possible payment of telecommunication services.

Their function provides direct, reliable and affordable data exchange supply and demand between producers and consumers of different capabilities and degree of information, and also allows you to create a unified system of marketing services, which represent the provides a centralized, territorially distributed, national information and marketing structure.

Nationwide system of the EMC is designed to perform a systematic information and marketing activities throughout the country in order to ensure free and priority to promote products and services to domestic producers within the country and abroad, including for the implementation of public procurement at the Federal and regional levels.

The system works as follows.

In the process of geographically distributed information-marketing centers at each of them is the conclusion of agreements between bidders about the purchase (sale) of certain consignments offered for sale all of the information and marketing centers (EMC). As a result of performing these procedures, information about the quantity of goods offered for sale by the relevant seller on the rest of the EMC must be corrected by amending the relevant database records all of the information and marketing centers.

With this aim in information and marketing center, where a contract of sale (purchase) of the parties ' respective goods, the results of each transaction produces a file updating of databases of all the rest of the MC, having the following structure:

The generated file updating of databases with output information and marketing center, initiated the process of updating the database in the rest of the EMC, is transferred and written into the buffer memory (not shown) of each of the EMC, where he arrives on the information input 21 of the system. The buffer memory is executed in the form of a stack that provides a view of the next entry on its output after reading the previous one.

Input 21 system file updating is supplied to the information input unit 1, where it is served to the information inputs of registers 40-43. Simultaneously, the clock pulse input 24 passing through the corresponding items 45-47, OR the first three sections of the file structure recorded in the relevant registers 40-42, and the clock pulse input 25 of the fourth section structure of a file recorded in the register 43.

Simultaneously, the same clock pulse from the output element 45, OR, first, is fed to a single input trigger 44, setting it in one state, where the output 61 of block 1 will be given low blocking potential, prohibiting users to access the database server during its actualization.

Secondly, sync is desirously pulse from the output element 45 OR passes to the output 54 of the block and then enters the clock input 80 of block 2, on the information input 79 whose output 56 of the register 40 receives ID code of the seller.

The decoder 72 decodes the ID code of the seller, throwing on one of its outputs a high potential. For definiteness, suppose that a high potential is received at one input element 75 I.

In parallel, the clock pulse from the input 80 of the block 2 is delayed element 77 at the time of entering code in the register 40 and the operation of the decoder 72, and then polls the status of the items 73-75 I.

Given the fact that open on one input will be only element 75 And then passing this element And the sync pulse arrives, firstly, to the input of the read fixed memory permanent storage device 71 that stores code reference address of the first memory cell of the seller in the server database, and reads its contents through the outlet 81 unit 2 elements 16 OR group on the information input of reversible counter 9.

Secondly, pulse reading, passing the element 76 OR delay element 78 delay time read the contents of a fixed cell ROM and then exit 82 unit 2 through the element 14 OR, is fed to the clock input of the reversible counter 9, the locking code reference address of the first memory cell of the seller in the database server.

In-t is etlich, the same impulse, passing the element 12 OR delayed by the delay element 19 at the time of entry code reference address in the reversible counter 9 and then goes through the exit 32 of the system to the input of the first interrupt server. On this signal, the server goes on a routine survey of the register 42 unit 1 to write its contents to the database server at the address generated at the output 31 of the reversible counter 9.

Simultaneously, the pulse from the output of the delay element 19 is fed to the input 96 of block 7, which is delayed by element 92 at the time of the survey and write the content server register 42 in the database and is supplied to the counting input of the counter 90, locking in the counter unit as the fact updating the first record in the database server.

In addition, this same pulse is delayed element 93 delay time counter 90 and is supplied to the clock input of the comparator 91 comparing the number of entries this seller in the register 41 to the counter 90 entries.

If the number of entries in the counter 90 is less than the number of entries in the register 41, the output 98 of the comparator 91 pulse appears that, first, through the element 15 OR arrives at the summing input of the reversible counter 9, thus forming the next address record in the server database, and, secondly, it is applied to the input 50 of the block 1 and then through the element is 47 OR arrives at the clock input of the register 42, putting it another recording file updating from the buffer memory.

This same pulse through the element 12 OR again delayed by the delay element 19 at the time of adding new content part of the record in register 42 and re-enters through the exit 32 of the system to the input of the first interrupt server. On this signal, the server goes back to a routine survey of the register 42 of the block 1 and write its contents to the database server at the address generated at the output 31 of the reversible counter 9.

Simultaneously, the pulse from the output of the delay element 19 re-enters the block 7, which is delayed by element 92 at the time of the survey and write the content server register 42 in the database and is supplied to the counting input of the counter 90, locking the counter another unit, as the fact actualization of the next record in the database server.

In addition, this same pulse is delayed element 93 delay time counter 90 and again fed to the clock input of the comparator 91 comparing the number of entries this seller in the register 41 to the counter 90 entries.

Describes the process of adding the contents of the file entries of the updating server database continues until the number of entries in the register 41 unit 1 will not be equal to the number of records recorded by the counter 90 unit 7. Specify the first point will be recorded by the issuance of the pulse at the output 99 of the comparator 91.

This impulse is, firstly, through the element 16 OR arrives at the installation inputs of the reversible counter 9 and the block 1 through the inlet 52) and sets the reversible counter 9 and registers 40-42 unit 1 to its original state.

Secondly, this pulse is delayed by delay element 94 at the time of installation registers 40-42 block 1 and the counter 9 in original condition and available at the output 34 of the system, whence it is fed to the control input of buffer memory (not shown). This signal at the output of the buffer memory will be presented first substantial account of the next seller, which is part of the file updated.

Third, this same pulse received at the input 106 of the block 8, which comes at the counting input of the counter 102, locking in the counter unit as the fact of updating all records of the first seller in the database server.

In addition, this same pulse is delayed by element 103 delays the actuation time counter 102 and is supplied to the clock input of the comparator 101, compares the ID number of sellers in the register 43, received from the input unit 105 8 counter 102 sellers.

If the counter 102 will be less code number of vendors represented in the register 43, the output 107 of the comparator pulse appears that through the entrance 51 of the block 1 and the elements 45-47 OR fed to the clock inputs is ahistrom 40-42, putting them in the recording file updating another seller from the buffer memory, and the process of updating the records of the next seller in the database server will continue in this manner until, until you have updated all the records of all vendors from file updated.

The end of the process of updating the database will be fixed at the moment of appearance of the pulse at the output 108 of the comparator 101 unit 8, which will reflect the fact that the code of the counter 102 is equal to the code number of sellers in the register 43 block 1.

This impulse is, firstly, through the element 16 OR arrives at the installation inputs of the reversible counter 9 and the block 1 and sets the reversible counter 9 and registers 40-42 unit 1 to its original state.

Secondly, this same pulse output 108 through the inlet 53 of the block 1 is supplied on the installation input register 43 and the installation log trigger 44, returning to their original state, when the trigger 44 removes deny the potential of the input element 17 And, suggesting that the process of updating the database of this information and marketing centre is completed and the system users can now get all the help from the database server.

Structure codogram formed on workstations has the following form.

To obtain relevant information from the database of the EMC each user on his arme chooses the seller is offering interested in his product, and press the View button. While codes ID and seller ID ArmA user through input 22 are received in the register 5, where they are recorded clock pulse input 26. From the first output register 5 identifier code of the seller enters through the inlet 79 unit 3 to the input of the decoder 72.

The decoder 72 decodes the code of the seller, throwing on one of its outputs a high potential. For definiteness, suppose that a high potential is received at one input element 75 I.

In parallel, the clock pulse from the output element 17 And through the inlet 80 of the block 3 is delayed element 77 at the time of entering code in the register 5 and the operation of the decoder 72 and then polls the status of the items 73-75 I.

Given the fact that open on one input will be only element 75 And then passing this element And the sync pulse arrives, firstly, to the input of the read fixed memory permanent storage device 71.

In the fixed memory cell stores the code of the reference address of the first memory cell of the seller in the database server and the code number of records in the server database relating to trade offers is the interest of the seller.

Structure codogram has the following form.

Code reference address of the first memory cell and the code number of records this seller is read from a fixed memory location and proceed to different outputs of the device 3.

Code reference address of the first memory cell from the output 81 of the device 3 through the elements 18 OR the group comes to the information input of reversible counter 9.

In parallel, the pulse reading fixed memory cells, having the element 76 OR delay element 78 delay time read the contents of a fixed cell ROM. Next, the output 82 of the device 3, this pulse passes through the element 14 OR to the sync input of the reversible counter 9, locking in the counter code reference address of the first memory cell of the seller in the database server.

In addition, the same pulse from the output 82 of the device 3 passes element 13 OR delayed by the delay element 20 at the time of entry code reference address counter 9 and the output 33 of the system it goes to the second input of the interrupt server. On this signal, the server goes on a routine survey of the contents of the memory cell at the address formed by the address output of the system 31 and outputting the read data through the entrance 23 system information to the input of the register 6, where they recorded synchronize the ith pulse server, at the input 27 of the system.

Code number of records selected from the seller to the output 83 of the device 3 is supplied through the inlet 125 unit 10 to the information input of the register 110, which is also written by a pulse from the output 82 of the device 3.

In parallel with this ID code ArmA user with the second output of the register 5 is supplied through the inlet 79 of the device 4 to the input of the decoder 72.

The decoder 72 decodes the ID code ArmA user, throwing on one of its outputs a high potential. For definiteness, suppose that a high potential is received at one input element 75 I.

In parallel, the clock pulse from the inlet 27 through the inlet 80 of the block 4 is delayed element 77 at the time of operation of the decoder 72 and then polls the status of the items 73-75 I.

Given the fact that open on one input will be only element 75 And then passing this element And the sync pulse arrives, firstly, to the input of the read fixed memory permanent storage device 71 that stores the address code ArmA user, and reads it through the outlet 81 of the device 4 on the information input 146 of the block 11.

Secondly, the same pulse reading, passing the element 76 OR delay element 78 delay time read the contents of a fixed cell ROM. Next, the output 82 of the device 4 is the pulse enters through the inlet 148 of the block 11 on the clock input of the register 140, locking in the register address code ArmA user.

The decoder 141 decodes address code ArmA user and a high potential on one of its outputs open items And one of the groups 142-144. Simultaneously, the pulse input 148 of the block 11, the delayed delay element 145 on the response time of the decoder 141, the code first few entries from the output of the register 6 through the input 147 of the block 11 and the corresponding group elements And 132-134, through the corresponding output 35-37 issued on the arm of the user.

The user is able to view all entries for the selected vendor in the database server and make appropriate conclusions on his trade proposals.

To do this, the user uses the buttons “Forward” and “Back”, the signals from which are received at control inputs 28, 29 system, respectively.

Given that users view the selected records of the seller is only possible after the end of the update mode of the database server, the high potential of the trigger 44 block 1, coming from the output 55 of the block 1 to the input 127 of the block 10 elements 115, 116 And will be opened.

When you press “Forward” pulse input 28 of the system passes through the element 115 And to the counting input of the counter 111, the locking viewership records. This is the number of viewings of records is compared by the comparator 113 is the number of records of the seller, recorded in the register 110, the signal from the output of the delay element 120, delaying the pulse from the output of element 115 And the actuation time counter 111.

If the number of hits is less than the specified number of entries in the register 110, the output 130 of the comparator 113 is formed pulse received through element 118 OR the output 128 of the block 10 and then through the element 15 OR the summing input of the reversible counter 9, which form the next address is read at the output 31.

In addition, the same pulse, after passing through the element 13 and the delay element 20, delaying the impulse response time reversible counter is held at the output 33 and then again fed to the input of the second channel interrupt server.

On this signal, the server goes back to a routine survey of the contents of the memory cell at the address formed by the address output of the system 31 and outputting the read data through the entrance 23 system information to the input of the register 6, where they are recorded synchronizing pulse server at the input 27 of the system.

Describes the process of reading records from the database server and issue them on a workstation user continues until the number of entries in the register 110 unit 10 will not be equal to the number read from the database records, recorded by the counter 111. At asany moment will be recorded by the issuance of the pulse at the output 131 of the comparator 113.

The pulse output from the comparator 131 113, first, through the element 119 OR output 129 unit 10 and further to the subtractive input of the reversible counter 9, reducing its readings on the unit. In addition, the same pulse, after passing through the element 13 and the delay element 20, delaying the impulse response time reversible counter is held at the output 33 and then again fed to the input of the second channel interrupt server.

On this signal, the server goes back to a routine survey of the contents of the memory cell at the address formed by the address output of the system 31 and outputting the read data through the entrance 23 system information to the input of the register 6, where they are recorded synchronizing pulse server at the input 27 of the system.

Secondly, the same pulse from the output 131 of the comparator 113 is delayed by the delay element 122 for the duration of the pulse and through the element 117 OR supplied to the subtractive input of the counter 111, reducing his testimony.

The user then goes to the opposite view records of the seller by pressing “Back”. Pulse input 29 through the element 116 OR, first goes to the subtractive input of the counter 111, and, secondly, after a delay element 121 at the time of actuation of the counter 111 is supplied to the clock input of the comparator 114. On this signal, the comparator 114 with anyway counter 111 with a “zero”. If the counter 111 is greater than zero, then the output 132 of the comparator 114, a signal is generated, through which the element 119 OR output 129 unit 10 and further to the subtractive input of the reversible counter 9.

If the counter 111 will be equal to zero, then the output 133 of the comparator 114 is formed impulse, which, through element 118 OR passes to the output 128 of the block 10 and then enters the summing input of the reversible counter 9, putting the user in direct view of the records of the seller in the database server.

Thus, the introduction of new units will significantly improve system performance by eliminating search address of data to be updating, and implementation of directly addressing the change data records in the database of the information and marketing centers.

Sources of information

1. The Japan patent No. 4-38021. from 23.06.92.

2. U.S. patent No. 5136708. MCL G 06 F 15/16 from 04.08.92.

System updating of databases of information and marketing centers of e-Commerce containing block receive files updating, the information input of which is the first information input of the system, the first and second clock inputs of the specified block are first and second clock inputs of the system, and the first information output information is the traditional output system, the first device selection reference recording address data input connected to the second information output unit receive files updating, synchronizing input connected to the clock output unit receive files updating, the information specified output device is connected with one input element OR group, and the clock output is connected to one input of the first element OR the output of which is connected to the input of the first delay element, the output of which is the first clock output system, the first register, the information input of which is the second information input system clock input connected to the output element And one input which is the third clock input system, and the other is connected to control the output unit receive files actualization, the second element OR the output of which is connected to the input of the second delay element, the output of which is the second clock output system, the second register, the information input which is the third information input system clock input is the fourth synchronizing input of the system, and the output is connected to one information input block grant data, information outputs of which are informational outputs group is s system, the third element OR, one input of which is connected to the synchronizing output of the first device selection reference address database entries, the device selection address of the working place of the user, an information input connected to one output of the first register, a clock input connected to the fourth clock input of the system, and information and synchronize the output device selection address of the working place of the user connected to another information and clock inputs of the block of data output, respectively, the fourth and fifth elements OR, characterized in that it contains the first block of comparison codes, information whose input is connected to the third information output unit receive files updating, synchronizing the input is connected to the output of the first delay element, the first output of the first block of code compares connected to the third clock input unit receiving files updating to another input of the first element OR to one input of the fourth element OR the second output of the first unit of comparison codes connected with one input of the fifth element OR, and the third output unit is the third synchronizing system output, the second block of code compares, an information input connected to the fourth information output unit receiving allow actualization the clock input is connected to the second output of the first block of code compares the first output of the second unit of comparison codes connected with the fourth clock input unit receiving files actualization, and the second output of the second block of code compares is connected to another input of the fifth element OR the output of which is connected with the first installation unit receive files actualization, and the second installation unit receive files actualization, reversible counter, an information input connected to the output element OR group, the clock input connected to the output of the third element OR summing input coupled to the output of the fourth element OR setting input connected to the output the fifth element OR, as the input of reversible counter is the address of the system output, a second device selection address write data input connected to another output of the first register, a clock input connected to the output element And the first information output connected to other inputs of the elements OR groups, and the clock output is connected to the other inputs of the second and third elements of the block select address data input connected to another output of the second device selection reference address database entries, to synchronise the speaker input is connected to the synchronizing output of the second device selection reference address record database the first and second control inputs of the block selection address database are first and second control inputs of the system, and a third control input connected to the control output unit receive files updating, with the first output of the block selection address database connected to other inputs of the second and fourth elements OR, and the second output is connected to the subtractive input of the reversible counter and the other input of the second OR element.