Device for increasing speed of operation of local ethernet network adapter. RU patent 2248039.
 Method for automated active control of electric energy quality coefficients / 2248038Method includes estimation of quality coefficients of electric energy in electric energy system, determining degree of matching of these coefficients to normal values, forming of control signal for correcting devices and predicting electric energy characteristics expected after effect of these devices. On basis of analysis of predicted characteristics quality coefficients are newly estimated and if necessary control signals for correction devices are formed. Estimation of not only voltage and frequency is provided, but also current. Whole cycle is repeated for each node of electric energy system. |
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Method for automated active control of electric energy quality coefficients / 2248038 Method includes estimation of quality coefficients of electric energy in electric energy system, determining degree of matching of these coefficients to normal values, forming of control signal for correcting devices and predicting electric energy characteristics expected after effect of these devices. On basis of analysis of predicted characteristics quality coefficients are newly estimated and if necessary control signals for correction devices are formed. Estimation of not only voltage and frequency is provided, but also current. Whole cycle is repeated for each node of electric energy system. |
 Device for increasing speed of operation of local ethernet network adapter / 2248039Device has pulse generator and OR element. First input of OR element is connected to input of pulse generator and is meant for receiving signal, being sign of data transfer in local network. Output of generator is connected to second input of OR element. Output of the latter is meant for output of signal, matching condition of data bus of a network. |
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 Message exchange module / 2249849Device has a group of buffer blocks from first to eighth, direction correction block, direction selection block, first registers group, output register, first decoder, multiplexer, first counter, group of switchboards from first to eighth, launch trigger, first and second univibrators, OR elements from first to third, first and second AND elements, clock pulses generator. Also inserted are buffer block, second and third registers group, second decoder, a group of demultiplexers from first to eighth, second counter, third univibrator, first and second groups of OR elements and fourth and fifth elements. |
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 Extensible automatic system / 2260835The proposed extensible automatic system has the following units: two programmable controllers, capable of autonomous operation; module of the interface of the first type; module of the interface of the second type; switch; decoder; bus shapers, used as attached elements; adapters; modules of expansion of the first type; modules of expansion of the second type; interface bus; information bus of the first type and information bus of the second type. |
 Communication processor / 2260841Device has communication blocks for direct and main communications, control block, environment adjustment block, routing block, inner exchange environment. |
 Multiprocessor controller for controlling a complicated technological object / 2263952Device has block for forming geographical address, interfaces of serial system bus, processor modules, consisting of processor, memory block, logical control block, input-output sub-modules, interfaces for measuring and controlling an object, connected by system bus, while processor modules are connected by determined local network of low level as clusters. |
 Method and device for use in conjunction with electronic mail / 2267228Method for notification of user about receipt of electronic mail message by mail center, wherein information is stored, related to mail accounts, assigned to identifiers of decoder receivers, enables transfer of notification message in broadcast signal, while notification message includes at least additional portion of text of electronic mail message and identifier of decoder receiver targeted as destination for current notification message. Described transmission is realized by appropriate devices and decoder receivers. |
FIELD: computers.
SUBSTANCE: device has pulse generator and OR element. First input of OR element is connected to input of pulse generator and is meant for receiving signal, being sign of data transfer in local network. Output of generator is connected to second input of OR element. Output of the latter is meant for output of signal, matching condition of data bus of a network.
EFFECT: higher speed of data transfer, higher reliability of operation of Ethernet network.
3 dwg, 2 tbl
The invention relates to automatic control and computer engineering, more specifically to communication systems, and in particular to devices for subscriber access system bus local area network, and can be used in the adapter local area Ethernet network.
Currently wide spread use in the world of local area Ethernet network. They consist of the subscribers local area network, network adapters that are connected directly to the subscribers of local computer networks, cabling, hubs, bridges, gateways, and so on.
Known network adapters Ethernet, which produced a large number of businesses worldwide.
However, when using these adapters, as shown by numerous theoretical studies and observations in the real local area Ethernet networks, when the network flow is greater than 1/e of the maximum flow, which is about 3 Mbps, you can increase the number of collisions on the network, until the development of the clinch, where the bus bandwidth local area network drops to zero.
The objective of the invention is to provide such a device to improve the performance of the adapter local area Ethernet network, which would significantly increase the speed and reliability of computer networks.
This task is solved in that the device performance of the adapter local area Ethernet network includes a pulse shaper and the element OR the first input element OR is connected to the input of the pulse shaper and is designed to receive a signal indicating the data channel of the computer network, the output of the pulse shaper is connected with the second input member OR the output of which is designed to generate signals corresponding to the state data bus local area network.
This greatly increases the speed of information transmission on the data bus and the reliability of the computer network.
Further patentable invention is illustrated by the description of specific examples of its implementation and the attached drawings, in which: figure 1 schematically depicts a simplified configuration of local area network according to the invention, figure 2 is a block diagram of adapter local area Ethernet network, figure 3 is a block diagram of the device performance of the adapter local area Ethernet network according to the invention.
Simplified configuration of the local computer network depicted in figure 1.
A computer network consists of N subscribers A 1 And 2 ... And i ... A N , each of which, through its adapter D 1 , D 2 ... , D i ... ., D N associated with the data bus.
Subscribers A 1 , A 2 ... , A i,..., A N can be a separate computer that communicate with each other using network adapters D 1 , D 2 ... , D i ... ., D N , nodal processors, through which a separate local area networks are networked larger functional units of a computer system, connected by a data bus, and so on.
The data bus may be coaxial cable, segments of coaxial cables, twisted pair conductors, radio and the like.
A simplified block diagram of adapter D i a local area Ethernet network depicted in figure 2. Adapter D i consists of the transceiver 1 is connected to the data bus, a local area network, codec 2, engaged in the selection of the clock signals and data from synchromesh transmitted over the bus, a local area data network, and the transformation is prepared to transmit data and clock signals in synchromesh, the network controller 3 which controls the codec 2, data buffering, serial-to-parallel data conversion, maintenance control sequences of bits of the reception data, forming and decoding addresses and so forth, in accordance with the IEEE 802.3 (Ethernet/Cheapernet), and block 4 connection with subscriber And i .
The block diagram of patented devices improve the performance of the adapter local area Ethernet network is shown in figure 3.
Patent-pending device 5 includes a pulse shaper 6 and the element OR 7, the first input of the OR element 7 is connected to the input of the pulse shaper 6 and is connected to the input/output, which demonstrates the data channel of the computer network, the output of pulse shaper 6 is connected with the second input element OR 7, the output of the OR element 7 is connected to the input/output, which demonstrates the transmission of data in the channel network.
Data from input/output showing data transfer in the channel area network, is fed to the input of pulse shaper 6 and to the first input element OR 7. The output signal from the pulse shaper 6 is supplied to the second input of the OR element 7. The combined signal from the output element OR 7 is fed to the input/output indicating the data channel of the computer network.
The device operates as follows.
The device is installed in the adapter D i between 2 codec and the network controller 3 adapter D i .
Blocks messages intended for transmission over the data bus, proceed to the second input/output unit 4 communication with a subscriber from the first input/output unit 4 communication with the subscriber arrives at the second input/output network controller 3. From the first input/output network controller 3 information and clock pulses are passed to the second input/output codec 2. From the first input/output codec 2 transmitted blocks messages in the form of synchromesh come to the second input/output of the transceiver 1, and further from the first input/output of the transceiver 1 transmit data on the bus data In a local area Ethernet network.
Subscribers A 1 , a 2 ,... A N area network transmit blocks of messages on the data bus, using adapters D 1 , D 2 ... D N . To do this, each subscriber And i (1≅ i≅ N) prepare a series of messages passed through the input/output unit 4 connection with the subscription to the second input network controller 3 and memorize it. At the third output network controller 3 sets the voltage level of the logical unit.
Information about the messages transmitted on the bus In the data that is supplied from the second input/output of the transceiver 1 to the first input/output codec 2. From the second input/output codec 2 decoded data and clock are received at the first input/output network controller 3. The signal corresponding to the state of the data bus local area network, CRS (Carrier Sense)form at the output of the codec 2. This signal CRS through the element OR 7 to the input of the pulse shaper 6. The negative differential signal CRS initiates the operation of the pulse shaper 6. At the output of the pulse shaper 6 form the pulse lockout duration 1-2000 ISS, located at a distance of 1-2 μs from the trailing edge of the signal CRS. This pulse lock is supplied to the second input element OR 7 and further to the input CRS network controller 3. The advent of the level of logical units on input CRS network controller 3 blocks counter pause, part of the network controller 3 and the delay thus for a time equal to the pulse duration of the lock, the start of transmission of the message block, if the network controller 3 waits for release of the data bus local area network in order to transmit a message block.
If a conflict occurs in a local area network, the conflict signal is passed from the second input/output of the transceiver 1 to the first input/output codec 2. From the second input/output codec 2 this signal is passed to the first input/output network controller 3, which handles this situation in accordance with IEEE 802.3.
All elements of the claimed device are typical nodes that are performed in such manner as is customary in the art of receiving and processing the data used for its intended purpose.
As of 2 codec can be used with chip DP8391 company National Semiconductor (USA).
The pulse shaper 6 may be performed using a circuit CAG included in a generic manner to form two consistently run the one-shot. At that second, third, tenth and eleventh leg of the chip CAG connect with the potential level of the logic unit, the first leg of the chip CAG is the input of the pulse shaper 6, the ninth leg of the chip CAG connect with thirteen foot chip CAG, the fifth leg of the chip CAG is the output of the pulse shaper 6.
The duration of the pulse generated at the thirteenth leg chips CAG, set approximately equal to 1.5 ICC, the duration of the pulse generated at the fifth leg of the chip CAG set in the range of 1.0 to 20.0 μs external variable resistor or set of resistors with a switch (figure 3 not shown).
The application of the proposed device is not associated with any change in mathematical provision network.
If you install the device at all adapters Di(1≅ i≅ N) network Ethernet connection and in each of them to set their own pulse duration of the lock, so that the difference between the pulse durations of blocking any pair of adapters Di(1≅ i≅ N) is not less than double the time of signal propagation from one end to the other local area network, conflicts between adapters Di(1≅ i≅ N) will be almost impossible, because every time after the liberation of the bus data In local area networks of different adapters Di(1≅ i≅ N) will try to take the bus data local area network at different times.
Normally the main source of the data flow in the local area network is the server. If you install the device server adapter, as shown by a software simulation of a local area network, the number of collisions on the network under heavy load is significantly reduced, resulting in network bandwidth increases.
Simulation shows LAN length 1000 m, which are evenly distributed 30 stations transmitting packets of messages average size of 150 bytes, the bandwidth of a communication channel using the proposed device increases by 2-3 times, reliability is increased not less than 10 times. Data on the increase in the average data transfer speed depending on the input stream LAN and the number of highly active subscribers, each of which is supplied by the proposed device is shown in table 1, similar data on the reduction of the maximum delivery time of the message are shown in table 2.
These software models are tested on a technological stand available to the author. According to the results of measuring the ratio of average delays of service in a standard Ethernet network to delays in service with the use of the proposed device is of 1.56 and a maximum of 30.7. The maximum delay of service constitute the results of the measurements in standard Ethernet networks 6500 ISS, using the proposed device 212 ISS.
Checking in real local area network Ethernet 10 MHz, working with Netware network operating system, includes 3 workstations i80386, the server i80386 and server i80486, showed that when the network load streams broadcast parcels duration 1088 bytes program IPX Load Programm V2.32 package IPX Test two workstations for approximately 70% of the inclusion network adapters workstations offer devices with pulse durations lock 2 and 4 ISS increases the speed of read/write server about 2 times.
This was not noted whether any changes in the used software.
All of the above allows us to recommend the use of the proposed device and the network office type of servers in the first place to guarantee the performance of the network at various bursts of activity subscribers.
The device performance of the adapter of the computing Ethernet network containing the pulse shaper and the element OR the first input element OR is connected to the input of the pulse shaper and is designed to receive a signal indicating the data channel of the computer network, the output of the pulse shaper is connected with the second input member OR the output of which is designed to generate signals corresponding to the state data bus local area network.