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Analogue computers (G06G)

Method and apparatus for error-compensation two-step integration

Device includes two identical integration sections which perform integration on two consecutive time sections, and an adder, wherein each integration section comprises an integrator, two closing switches, a commutator switch, two analogue memory units and an adder.

Method and apparatus for two-step integration

Group of inventions relates to automation and analogue computer engineering and is intended to build precision analogue control devices in aerospace engineering, functional units of analogue computers and analogue processors. The apparatus comprises an integrator, a switch, two closing switches, two analogue memory units and two adders.

Relator unit

Relator unit

Invention can be used in analogue computer systems as a means of pre-processing information. The result is facilitating the execution of any of the functions of the type ext1(x1, ext2(x2, ext3(x3, ext4(x4, x5)))), where x1, …, x5 are input analogue signals; extm=max or extm =min ( m = 1,4 ¯ ) , for maximum signal propagation delay time equal to the relator delay time. The device includes ten relators (11, …, 1010), each having a comparator (2), an XOR element (3), an opening switch and a closing switch (41 and 42).

Rank filter

Rank filter

Invention can be used to build functional nodes of analogue computers, automatic adjustment and control equipment for analogue processes. The rank filter includes nine relators, each having a comparator, an XOR element, a closing switch and an opening switch.

Digital predicting and differentiating device

Digital predicting and differentiating device

Predicting and differentiating device includes a smoothing unit, a prediction unit, a first subunit for calculating the first derivative (y'n-1) from one adder, a second subunit for calculating the first derivative (y'n-1) from one adder, a third subunit for calculating the first derivative (y'n-2) from an inverter and an adder, wherein the input of the first term of the adder of the third subunit for calculating the first derivative is connected through an inverter unit to the data output of the first subunit for calculating the first derivative, and the input of the second term of the adder of the third subunit is connected to the data output of the second subunit for calculating the first derivative, with shift of the term input buses one bit towards higher-order bits.

Method of shooting training in case of variable wind

Method of shooting training in case of variable wind is carried out using a computer complex. After the reference aiming the pointing of the rifle barrel and subsequent adjustment are deleted. Then shooting to the target bull's-eye is mastered to achieve the greatest density of hits, aiming is carried out with the distant offset corresponding to the strong wind, and finally with an average offset which corresponds to the weak wind. The result of the shot is evaluated, the errors are identified which were made in the process of aiming and processing of pull-off, and the information about this is clearly provided to the shooter.

Analogue selector

Analogue selector

Device includes two sorters (11, 12), two MAX elements (21, 22) and two MIN elements (31, 32), wherein each sorter includes a comparator (4), an XOR element (5) and two switches (61, 62).

Analogue logic element

Analogue logic element

Device includes n relators (11,…,1n), each having a comparator (2) connected by the output to the control input of two switches (31, 32) in the last relator and the control input of four switches (31, 32, 33, 34) in all relators except the last.

Search and detection of infrastructure facility and route laying

Search and detection of infrastructure facility and route laying

Invention relates to navigation systems for laying a route to at least one infrastructure facility. Data on a point of reference which are independent of the route for detecting at least one infrastructure facility are obtained. At least one search parameter is obtained for searching for said at least one infrastructure facility relative said point of reference. Sorting criteria are obtained for sorting infrastructure facilities, where the sorting criteria include at least one of the criteria: consumer rating, price, time, alphabetical order or reverse alphabetical order. Said at least one infrastructure facility is detected based on search parameters, sorting criteria and the reference point. At least one selected infrastructure facility sorted based on the sorting criteria is obtained. The route to the at least one selected infrastructure facility is calculated based on the selection. The route is displayed.

System for imitating infrared environment for mathematical modelling

System for imitating infrared environment for mathematical modelling

Invention relates to empirical research of temperature changes in different fields of science and can be used, for example, in weather and environmental research. The system for imitating an infrared environment for mathematical modelling includes a first computer configured to load data on an object in form of a mathematical model by creating a set of digital data and transmitting said data to a controller connected to a DMD matrix, which is configured to display on the field of said matrix in graphic form an image of the mathematical model of the object, a device for illuminating said image with infrared radiation on the field of the DMD matrix, which is connected to a projecting device which transmits an optical data stream to a thermal imaging receiving device which is connected to a second computer which processes data and generates the functioning algorithm of the object.

Device to model combined power flow controller

Device to model combined power flow controller

Device comprises a computing block of capacitor batteries, a block of multi-channel analogue-to-digital conversion, a block of microprocessors, a voltage-current converter, two identical blocks of voltage transformation and conversion, each comprising a computing block of the transformer, three blocks of voltage-current converters, two blocks of digitally controlled transverse switching, two blocks of digitally controlled longitudinal switching, a unit of static voltage converter.

Apparatus and method for simulating magnetohydrodynamics

Apparatus and method for simulating magnetohydrodynamics

Magnetohydrodynamic simulation device includes a plasma container holding a first ionisable gas, a first electrical loop placed next to the plasma container, having a space interval, electrical contacts on the first and second sides of the interval, a first substance having at least low magnetic susceptibility or high conductivity. The first electrical loop can be composed of one or more wire loop coils. In such cases, electrical contact is established through ends of the coil wires. The magnetohydrodynamic simulation device includes an electroconductive first coil wound around the plasma container and through the first electrical loop.

Functional shaper

Functional shaper

Device comprises position identifiers grouped in n-1 groups so that the k ( k = 1, n − 1 ¯ ) group contains k1 position identifiers, every of which comprises k comparators and k switches.

Device to model static synchronous compensator

Device to model static synchronous compensator

Device to model a static synchronous compensator comprises a unit of microprocessors, connected to a unit of reactor modelling, a unit of digitally controlled longitudinal switching, units of digitally controlled transverse switching, a unit of modelling of a static voltage converter, a unit of DC circuit modelling, a unit of filter modelling, to a unit of multi-channel analogue-to-digital conversion. The reactor modelling unit is connected with voltage-current converters, with the filter modelling unit. The first; second and third voltage-current converters are connected with the first unit of digitally-controlled transverse switching and with the unit of digitally controlled longitudinal switching. The fourth, fifth and sixth voltage-current converters are connected to the second unit of digitally-controlled transverse switching and with the unit of modelling of the static voltage converter, which is connected to the unit of DC circuit modelling and with the seventh, eighth and ninth voltage-current converters.

Address identifier

Address identifier

Device includes three comparators, five switches and five XOR elements.

Relator unit

Relator unit

Relator unit is designed to select the minimum, median or maximum of three input analogue signals and can be used in analogue computer systems as an information preprocessing means. The relator unit includes five relators (11,…,15), each having a comparator (2), an XOR element (3), an opening switch and a closing switch (41 and 42).

Amplitude filter

Amplitude filter

Amplitude filter is designed to perform rejection or selective filtration of analogue signal levels and can be used in analogue computer systems as an information preprocessing means. The amplitude filter has two differential comparators (11, 12), three switches (21, 22, 23) and an XOR element (3).

Rank selector

Rank selector

Rank selector has n differential comparators (11,…,1n), n AND elements (21,…,2n), 4n+3 switches (311,…,3(n+1)3), n+1 resistors (41,…,4n+1) and n+1 RS flip-flops (51,…,5n+1).

Prokofyev self-oscillation generator

Prokofyev self-oscillation generator

Self-oscillation generator by Prokofyev includes an LC oscillating circuit, a scaling operating amplifier, a non-linear feedback that includes a resistive summing network for two inputs, a normally open fixed contact of an electronic switch of a pulse non-linear element that includes a RS trigger and two comparators, chains of introduction of special initial conditions of regulated oscillations (RO), which consist of a single toggle switch of RO+ and RO- modes, a double start-up toggle switch and resistors, control voltage potentiometer A, voltage sources, a start-up capacitor; regulated stabilised self-oscillations, which are steady-state as to amplitude at the output of the scaling operating amplifier, are determined with the specified ratios of parameters of the elements expressed in the form of mathematical expressions.

Device for modelling three-phase multiple-winding transformer

Device for modelling three-phase multiple-winding transformer

Proposed is a device intended for modelling a three-phase multiple-winding transformer containing a computing unit; the digital input of the computing unit is connected to the digital input-output of the microprocessors unit, to the digital input-output of the multi-channel analogue-digital conversion unit, to the digital outputs of the digital-controlled longitudinal commutation units and the digital-controlled transversal commutation units; the other digital input-output of the microprocessors unit is connected to the PC/server; connected to the computing unit outputs are the multi-channel analogue-digital conversion unit and 3n voltage/current converters the number whereof is determined depending on the number of windings of the transformer being modelled, n, where n≥2; the outputs of each group of three per phase installed voltage/current converters are connected to the inputs of the computing unit, the inputs of the corresponding digital-controlled longitudinal commutation units and the digital-controlled transversal commutation units; the inputs/outputs of the digital-controlled longitudinal commutation units represent phase inputs/outputs of the device.

Differentiating unit

Differentiating unit

Method is implemented as per the means of high-quality filling of the shaped pulse-width sequences and allocation by means of a reversible pulse counter of pulse difference in adjacent pulse groups, which is the measure of derived physical quantity with further conversion of pulse difference with demodulator 9 to proportional DC voltage. In the proposed device, the information on the derivative is supplied not only in an analogue form as in a prototype, but also in a digital form, which allows using differentiator in digital adjustment and control systems at the information processing stage prior to the processor.

Pulse selector

Pulse selector

Pulse selector has 3n-4 switches and a resistor, wherein the (3n-5)-th, (3n-4)-th switches are opening switches, and the remaining 3n-6 switches are grouped into n-2 groups such that the k-th group comprises the first, third and second switches which are opening and closing switches, respectively, and the input and output of the second switch are respectively connected to the input of the third and the output of the first switch; the control input of the three switches of that group forms the input of the pulse selector; outputs of the first and third switches of the m-th group are respectively connected to inputs of the first and third switches of the (m+1)-th group, and the input and control input of the (3n-5)-th switch are respectively connected to a zero potential bus and the first input of the pulse selector, which is connected by the n-th input to the control input of the (3n-4)-th switch, whose output is connected to the output of the pulse selector, which is connected through a resistor to a unit potential bus.

Digital predictor

Digital predictor

Digital predictor comprises: a smoothing unit having an adder, first and second bidirectional counters, a single-channel smoothing subunit consisting of an adder and a register, a deviation ratio setting subunit having a register, a counter and a delay element, a real deviation subunit having an inverter unit, two comparators and an AND element, a unit increment subunit having two AND elements and an inverter, a dynamic characteristic control subunit having two pulse formers, an OR element, a counter, three AND elements and a mode flip-flop, an information output of the smoothing unit, an information input, a first control input and a clock input of the device; a prediction unit clocking unit having a delay element, a flip-flop, a pulse generator, an AND element and a shift register; a prediction unit having first and second subtractors, each having a register memory unit, a multiplexer, an inverter unit and an adder, a quadratic prediction subunit having an inverter, first and second adders; a dynamic prediction control unit having registers for storing address of the ordinate of the input process history, a comparator, an inverter, an AND element and an address counter, a linear prediction subunit.

Flight experiment control system

Flight experiment control system

Proposed system comprises onboard system of radiotelemetric measurements including the following components: data acquisition system, transducers of flight parameters, aircraft systems operation, encoding unit and radiotelemetric system transmitter, and measuring complex installed on the surface that comprises: radiotelemetric system receiving stations, system of outer-trajectory measurements, universal time system, communication lines, flight experiment control station comprising: data input unit, computation complex including local computation network of light info real-time computer-based processing system, computation complex integrated into local display and control computation circuit including, in its turn, automated workstations of test leader and control team specialists as well as means for radio communication with tested aircraft crew and operative-command communication with aforesaid measuring complex.

Adaptive digital predicting and differentiating device

Adaptive digital predicting and differentiating device

Device includes: a smoothing unit, a deviation ratio setting subunit, a real deviation subunit, a unit increment subunit, a dynamic characteristic control subunit, a smoothing unit data output, data, first control and clock inputs of the device; a clocking unit for a prediction unit; a prediction unit, a quadratic prediction subunit, a linear prediction subunit, a first derivative estimating unit, having a first subunit for calculating the first derivative, a second subunit for calculating the first derivative; a prediction behaviour control unit, having a register for storing the address of the ordinate of the history of the input process, the input of which is the second control input of the device, a comparator, an inverter, an AND element and an address counter. The prediction unit includes an adaptation unit, having a first and a second XOR element, an OR element, an inverter, a first and a second AND element, a flip-flop and a multiplexer, the output of which is the first data output of the device.

Analogue processor

Analogue processor

Device has twelve relators, each having a comparator, an XOR element, a closing switch and an opening switch.

Multipoint integrating ac voltage controller with automatic control channel backup

Multipoint integrating ac voltage controller with automatic control channel backup

Invention relates to controllers. Disclosed is a controller, having series-connected control signal source - input terminal, a first adder, an integrator whose output is connected to the input of the first, second and third relay elements, whose outputs are connected to inputs of the first, second and third comparators, respectively; the output of the first, second and third comparators is connected to the D input of a first, second and third dynamic D flip-flops, respectively, phase A, B and C buses connected to the corresponding inputs of a three-phase load with a neutral terminal through the first, second and third power switches, respectively, whose control inputs are respectively connected to the output of the first, second and third dynamic D flip-flop; the controller also has a second adder whose output is connected to the second input of the first adder; fourth, fifth and sixth comparators whose inputs are connected to phase A, B and C buses, respectively; the outputs of the fourth, fifth and sixth comparator are connected to the C input of the first, second and third dynamic D flip-flop, respectively; wherein the controller also has seventh, eighth and ninth comparators, whose outputs are connected to corresponding inputs of the second adder, and the inputs of the seventh, eighth and ninth comparators are connected to outputs of the first, second and third dynamic D flip-flops, respectively.

Digital predicting and differentiating device

Digital predicting and differentiating device

Invention relates to automatic and computer equipment and can be used to predict stationary and non-stationary random processes, increasing quality and accuracy of control in digital systems for controlling and guiding various objects. The prediction unit includes a first derivative estimation unit. The estimation unit has three subunits for calculating first derivatives. The first subunit, which is meant for the first n-th (current) reference point of the history of the predicted process, consists of one adder. The second subunit, which is meant for the second (n-1)-th history reference point, consists of one adder. The third subunit, which is meant for the third (n-2)-th history reference point, consists of two adders and an inverter unit. Outputs of the subunits are the data outputs of the device.

Device to model three-phase power transmission line with distributed parameters

Device to model three-phase power transmission line with distributed parameters

Device is composed of the following components: a unit of a power transmission line model, a microprocessor unit, a unit of multichannel analog-digital conversion, units of longitudinal-transverse switching, a unit to implement a system of equations of zero sequence components, a unit to implement a system of equations, units of voltage-current conversion units.

Device to model three-phase power transmission line with focused parameters

Device to model three-phase power transmission line with focused parameters

As a model of a line, a unit of line modelling is used. A microprocessor unit is connected to the line modelling unit, to a unit of multichannel analog-digital conversion, with two units of digitally controlled longitudinal-transverse switching, with a PC/server. Six converters of voltage-current type and a unit of multichannel analog-digital conversion are connected to analog outputs of the line modelling unit. The line modelling unit comprises units of A, B and C phase modelling, every of which comprises two units to implement equations of appropriate phases, a unit to calculate currents of transverse conductivity of a phase and a unit of voltage calculation on a transverse phase conductivity.

Device for potential separation of dc circuits

Device for potential separation of dc circuits

Device comprises an amplifier - limiter, an amplitude modulator with transformer separation of an "input-output" circuit, a summator, an integrator, a relay element, a unit of a logical function "Equivalence", a frequency divider, a separation transformer, a rectifier (demodulator).

Continuous-logic device

Continuous-logic device

Device has five comparators, five closing and five opening switches.

Multizone frequency-pulse-duration alternating voltage controller

Multizone frequency-pulse-duration alternating voltage controller

Multizone frequency-pulse-duration alternating voltage controller has a terminal, a setting signal source, first and second adders, an integrator, first, second and third relay elements, first, second, third, fourth, fifth and sixth comparators, first, second and third D flip-flops, first, second and third power switches, a load distributed on phases A, B, C, terminals for connecting a three-phase voltage source A, B, C, and output terminals.

Integrated display and management of data entities based on social, time and spatial parameters

Integrated display and management of data entities based on social, time and spatial parameters

Request including a social parameter, a time parameter and a spatial parameter which relate to a user is received and the desirable visual presentation of the set of data entities is indicated. Indicators with which the social, time and spatial parameters of the request are associated with each of set of data entities in the social, time and spatial dimensions, respectively, are determined. A first visual presentation of at least part of the set of data entities is displayed for the user based on whether corresponding parameters of the request correspond to the defined indicators of the relationship in the social, time and spatial dimensions.

Analogue-digital zero current sensor

Analogue-digital zero current sensor

Device has a signal source, an input four-terminal network, an adder, an integrator, a relay element, a switch element, a four-terminal feedback network, a nonlinear link with a dead zone, two univibrators, a count pulse generator, an adding counter, a memory register, a digital comparator, a binary signal source, a delay element and logic elements AND, OR and NAND.

Multi-zone analogue-discrete current sensor

Multi-zone analogue-discrete current sensor

Multi-zone analogue-discrete current sensor has a first and a second operating four-terminal network, a group of switch elements equal to the number n of relay elements, a pulse generator, a univibrator, a first and a second NOT logic element, a first and a second three-input AND logic element, a delay element, a first and a second binary counter, a first and a second memory register, an arithmetic-logic unit, which compares codes, counts the number of '0' and '1' signals, and also performs the inhibit function if the number of '0' and '1' signals is not equal.

Digital predictor

Digital predictor

In a digital predictor, the dynamic characteristic control subunit (DCCS) of the smoothing unit of the device includes a third AND element whose first input is connected to the clock input of the device, and the second input is connected to the complementary output of DCCS mode flip-flop. The prediction unit of the device also includes a dynamic prediction control unit, having a register for storing the ordinate address (calculated points) of the input process history, the input of which is the second control input of the device, a which sets the prediction time, a comparator, an inverter, an AND element and an address counter. The data output of the address counter is connected to address buses of multiplexers of all three subtractors and the first input of the comparator, the second input of which is connected to the output of the address storage register. The output of the comparator is connected through the inverter to the first input of the AND element, the second input of which is connected to the output of third AND element of the DCCS. The output of the AND element is connected to the complementing input of the address counter, the reset bus of which is connected to the output of the second AND element of the DCCS of the smoothing unit.

Method of selecting model of system under investigation based on calculated entropy potentials of events thereof and apparatus for realising said method

Method of selecting model of system under investigation based on calculated entropy potentials of events thereof and apparatus for realising said method

Method involves forming an array of elements comprising measured parameters and observed factors which characterise the state of the system; a series of ordered system element identifiers is formed; a standard series of events detected; the standard series of events is labelled with the ordered identifiers; the labelled standard series of events is stored; modelling systems are formed; entropy potentials of events of the system are calculated; the optimum modelling system whose function, in accordance with the selected comparison criterion, best matches the function describing the system, is selected.

Phase location finder

Phase location finder

Phase location finder comprises two antenna inputs, two receiving devices, three frequency converters, a heterodyne, a total frequency filter, a differential frequency filter, two narrow band filters.

Signal mixer

Signal mixer

Signal mixer comprises a multiplying Hilbert cell, the first and the second output transistors of the channel "Y", the first and second dividing separators, from the first to the third current-stabilising dipoles, a load circuit, the first and second additional transistors.

Analogue mixer of two signals with output cascode

Analogue mixer of two signals with output cascode

Analogue mixer of two signals with an output cascode comprises an input multiplying Gilbert cell, the first and second output transistors, the first and second load resistors, the first and second additional resistors, the first and second current-stabilising dipoles.

Analogue mixer of two signals

Analogue mixer of two signals

Analogue mixer of two signals comprises an input multiplying Gilbert cell, the first and second additional transistors, the first and second load resistors, the first and second additional resistors, the first and second dipoles with low differential resistance by AC, the first and second circuits of static mode setting, the first and second additional current-stabilising dipoles.

Digital predicting and differentiating device

Digital predicting and differentiating device

Device has a smoothing unit; a prediction unit having a first, a second and a third subtractor; a second derivative estimating unit having a subunit for calculating a second derivative at a second (n-1)-th reference point of the input process history consisting of an adder and a block of inverters, in which the addend input of the adder is connected to the data output of the smoothing unit, and the augend input of the adder is connected through the block of inverters to the output of the second adder of the subtractor, the output of the adder of the subunit is the third data output of the device, and the subunit for calculating the second derivative at the third (n-2)-th reference point of the input process history consisting of two adders, in which the addend input of the first adder is connected to the output of the multiplexer of the first subtractor, and the augend input is connected to the output of the block of inverters of the second subtractor. With wiring shift of the bus by one bit towards the most significant bits of the adder, the output of the first adder is connected to the second input of the second adder, the first input of which is connected to the output of the multiplexer of the third subtractor, and the output of the second adder of the subunit is the fourth data output of the device.

Method and apparatus for intelligent information processing in neural network

Method and apparatus for intelligent information processing in neural network

When processing a signal in a recurrent multilayer network with feedback, which closes the loop with unit character delay time less than the nonsusceptibility time of neurons in the network after excitation thereof, with shift of sets of unit characters along layers when transmitting sets of unit characters from layer to layer, said sets are delayed based on the current state of the layers.

Analogue processor

Analogue processor

Analogue processor has nineteen relators, each having a comparator connected by its output to the first input of an XOR element, the second input of which is the control input of the relator, and the output is connected to the control input of the closing and opening switch, the outputs of which are combined and form the output of the relator, where all relators are grouped into six group such that the i-th and the sixth group contain three and four relators, respectively.

Digital predictor

Digital predictor

Disclosed device includes a smoothing unit which comprises an arithmetic unit, a shift pulse generating unit, a deviation count pulse generating unit, a dynamic characteristic control unit, a deviation ratio setting unit, a first and a second bidirectional counter and a prediction unit clocking unit; a prediction unit, having a first, a second and a third substractor, each having a register storage unit, a multiplexer, an inverter unit and adder; a quadratic (nonlinear) prediction subunit, having a first and a second adder; a prehistory ordinate address register and a linear prediction subunit, having a first and a second adder.

Relator module

Relator module

Invention may be used to reproduce nonrepetitive functions of infinite-valued logics (min(x1,x2,x3), min(x1,max(x2,x3)), max(x1,min(x2,x3)), max(x1,x2,x3), depending on three arguments - input analog signals. The device comprises three relators, every of which comprises a differential comparator, a boolean element EXCLUSIVE OR, a closing and an opening keys.

Device for the knapsack problem solution

Device for the knapsack problem solution

FIELD: computational engineering. SUBSTANCE: additional groups of m fifth I elements, a delay element, a trigger, a group of elements, a group of sixth registers were introduced, wherein the output of each of them being connected to the first input of the fifth I elements group, the second input of which is connected to the startup unit, the delay element input is connected startup unit, its output being connected to the first trigger input and the second input of which is connected to the counter overflow output and the output being connected to the second I element input. EFFECT: enhanced the functional capabilities of the device with reference to fast determination of optimum knapsack filling with various items in such a the total value of the knapsack is as large as possible, its total weight being fixed. 1 dwg, 1 dwg

Device for imitating carrier apparatus for controlling information exchange with rocket

Device for imitating carrier apparatus for controlling information exchange with rocket

Device has a housing with a digital data input/output socket, a one-time command input/output socket, an information display module socket and a parameter setting module socket, and a digital data input/output module, a one-time command input/output module, a control module, an apparatus timer module, a data storage module and an expansion board, located outside the housing: parameter setting module and information display module, and the group of inputs/outputs of the switching unit is connected to the on-board socket of the rocket under test.

Analogue multiplier of voltages

Analogue multiplier of voltages

Analogue multiplier of voltages comprises a multiplying Gilbert cell, a symmetric load circuit, a voltage to current converter, the first and second input transistors, the first and second logarithm-taking p-n transitions, a circuit of potentials matching, a scaling resistor, the first and second sources of reference voltage, the first and second group of auxiliary transistors.

Another patent 2513094.

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