Method of forming epitaxial copper nanostructures on surface of semiconductor substrates

FIELD: chemistry.

SUBSTANCE: method of forming epitaxial copper nanostructures on the surface of semiconductor substrates includes formation of a monoatomic layer of copper silicide Cu₂Si on a preliminarily prepared atomically clean surface of Si(111)7×7 at a temperature of 550-600°C under conditions of superhigh vacuum, further precipitation of copper on it at a temperature of 500-550°C with efficient copper thickness from 0.4 to 2.5 nm. With efficient copper thickness from 0.4 to 0.8 nm islands of epitaxial copper nanostructures of a triangular and polygonal shape are formed, and if copper thickness is in the range from 0.8 to 2.5 nm, in addition to copper islands of the triangular and polygonal shapes ideally even copper wires are formed. The formed epitaxial copper nanostructures possess faceting, are oriented along crystallographic directions <110>Cu||<112>Si.

EFFECT: invention provides a possibility of controlled formation of epitaxial copper nanostructures with a specified shape and dimensions on the surface of semiconductor substrates.

2 cl, 6 dwg

The invention relates to the field of nanotechnology, namely, how to create epitaxial copper structures on the surface of the semiconductor substrate and can be used to create solid-state electronic devices.

Problems of formation and studies ordered nanostruc metals, the stability of the obtained forms in the system is a semiconductor substrate a buffer layer of copper silicide - nanostructure - are relevant to microelectronics and intensively investigated recently [1-5].

There is a method of creating nanostruc Ge on the surface of Si(111) [1], consisting in the deposition of Ge at a rate of 0.2-0.5 monolayer per minute and a thickness of from 3 to 9 monolayers on the surface of Si(111) in ultrahigh vacuum conditions (base pressure of 2·10^-10Torr). The temperature of the substrate during deposition of 450-500°C. When the thickness of the Ge layer from 3-5 monolayers begin to grow three-dimensional Islands with an average height of about 80 nm and a width of 200 nm. The disadvantage of this method is that it is possible to form only the Ge Islands.

There is a method of deposition of Cu on the Si111 surface) when the temperature of the substrate 100°C [2]. The deposition rate of copper is 0.02 nm/s; vacuum deposition process is not worse than 1·10^-9Torr. The thickness of the deposited film of copper equal to 100 nm. At the initial growth stages is formed by the e epitaxial silicide copper Cu ₂Si thickness up to 6 monolayers. Then begins to grow a film of copper.

There is a method of two-dimensional growth of epitaxial nanostruc copper on Si(111), which use the deposition on cooled to 160°K of the substrate [3]. The method consists in the formation of epitaxial silicide layer copper Cu₂Si in the deposition process from 2 to 8 monolayers of copper. Further copper deposition leads to the formation of two-dimensional copper Islands, which are then fused. The disadvantage of this method is the impossibility of obtaining individual nanostruc copper, as well as the necessity of forming a thick layer of silicide, which increases the surface roughness of the sample and the number of defects in the copper layer.

Closest to the claimed technical solution is described in the article [4] and patent [5]was chosen for the prototype on essential features and the achieved result. The essence of this method consists in the creation of conductive nanowires on the surface of the semiconductor substrate; for this purpose, the copper precipitated on the surface of the silicon Si(111) with the formation of the buffer layer of silicide copper Cu₂Si monoatomic thickness at 500°C in ultrahigh vacuum conditions, and then at a temperature of 20°C at the atomic steps of the surface of the buffer layer is precipitated at least 10 layers of copper, which form the nanowires is epitaxial copper, oriented along the atomic steps of the substrate.

The disadvantage of this method is that the resulting wire consist of nanostruc copper, which are fused between themselves and contain a large number of defects; border nanowires uneven, it is also possible the connection of wires between them. At the height of the wires is 1-2 nm. This can lead to high values of current density and local heating in the defective areas of the wires and their subsequent rupture.

The task we address the inventive method for a copper nanostructures on the surface of semiconductor substrates, is to develop a method of forming epitaxial nanostructures of copper of different geometric shapes - triangular and polygonal Islands and wires.

Technical results that may be obtained when implementing the present invention are:

- the ability to control the type and size of the formed epitaxial nanostructures of copper;

- getting a perfectly flat copper wires.

The problem is solved by a method of forming epitaxial nanostructures of copper on the surface of the semiconductor substrate, including forming a buffer layer of silicide copper Cu₂Si monoatomic thickness on an atomically clean surface of the silicon Si(111) in ultrahigh VA is uuma when the temperature of the substrate 550-600°C and the deposition rate of copper 1 nm/min Then at a temperature of 500-550°C in the resulting silicide copper, precipitated copper with a thickness varied in the range from 0.4 to 2.5 nm. When the effective thickness of copper from 0.4 to 0.8 nm are formed Islands of epitaxial nanostructures of copper triangular and polygonal shapes, and the copper thickness in the range from 0.8 to 2.5 nm along with the Islands of copper triangular and polygonal shapes are formed perfectly flat copper wire. The side faces of the Islands and wires oriented along crystallographic directions <110>Cu║<112>Si.

Distinctive features of the claimed method for creating nanostructures on the surface of semiconductor substrates are:

forming on the buffer monolayer of copper silicide Cu₂Si at a temperature of 500-550°C islets of copper of different geometrical shapes depending on the effective thickness of deposited copper, namely:

- Islands triangular and polygonal forms when copper thickness from 0.4 to 0.8 nm;

- Islands triangular and polygonal shapes, and perfectly smooth wires of copper when the copper thickness from 0.8 to 2.5 nm.

Comparative analysis of the essential features of the proposed method with the essential features unique and prototype demonstrates its compliance with the criterion of "novelty".

The proposed method is illustrated by diagrams, charts and images, is shown in figure 1-6:

on IG is a diagram of successive operations in the present method of forming nanostructures of copper on a silicon substrate using a monatomic layer of copper silicide;

- figure 2 shows a plot of the average diameter and height of the nanostructures from the effective thickness of deposited copper;

- figure 3 shows images of the surface of a semiconductor substrate of Si(111) reconstruction of the 7×7 (a), monatomic layer of copper silicide Cu₂Si (b) and nanostructures obtained after deposition of copper effective thickness of 0.4 nm (). The insets represent the image with high magnification obtained by means of scanning tunneling microscopy (STM).

- figure 4 shows the image of scanning electron microscopy (SEM) nanostructures obtained on the semiconductor substrate after deposition of copper effective thickness is 0.84 nm;

- figure 5 presents the SEM image of the nanostructures obtained on the semiconductor substrate after the deposition of copper effective thickness 1,68 nm;

- figure 6 presents the SEM image of the nanostructures obtained on the semiconductor substrate after deposition of copper effective thickness of 2.5 nm.

The inventive method for a copper nanostructures on the surface of the semiconductor substrate is implemented as follows.

At the first stage of implementation of the invention is prepared, the surface of Si(111)7×7 by heating the sample for 8 hours at a temperature of 500-550°C, and then at a temperature of 1200°C for 20 s in terms of SV is Rysakova vacuum < 10^-10Torr; receive an atomically clean surface of Si(111)7×7 (figa).

In the second stage (Fig) to clean the surface without breaking UHV conditions precipitated film of copper with a thickness of 0.2 nm. Copper is precipitated from effusions cell with a speed of 1 nm/min and the temperature of the substrate during deposition of 550-600°C. the film Thickness is controlled quartz gauge thickness. In the reaction of precipitated copper with silicon atoms on the substrate surface to form a continuous layer of copper silicide Cu₂Si monoatomic thickness.

In the third phase (pigv) on the surface of the buffer layer Cu₂Si at a temperature of 500-550°C precipitated copper effective thickness in the range from 0.4 to 2.5 nm. This precipitated copper is condensed in the form of Islands of various shapes, the side faces of which are oriented along the crystallographic directions <110>Cu║<112>Si(111). The average diameter of the Islands with the increase of the effective thickness varies from 170 to 1200 nm, and the average height from 36,6 to 22 nm. When the effective thickness of copper is less than 0.8 nm are formed nanostructures triangular form (53% of the total number of islets) and polygonal shapes (47% of the total number of islets) /example 1/.

When the effective thickness of copper is 0.84 nm along with copper Islands begin to form perfectly smooth nanowires of copper. Experimentally shown /example 21/that when t is line copper, equal 0,84 nm, are formed nanostructures triangular (68% of the total number of islets), a polygonal shape (28% of the total number of islets) and wire (4% of the total number of Islands).

When the effective thickness of copper more than 0.8 nm along with copper Islands begin to form perfectly smooth nanowires of copper. Experimentally shown /example 3/that when the thickness of the copper equal 1,68 nm, are formed nanostructures triangular (58% of the total number of islets), a polygonal shape (30% of the total number of islets) and wire (12% of the total number of Islands).

Experiments have shown that a further increase in the thickness of deposited copper leads to an increase in the area of the formed Islands, their accretion and the formation of a continuous film of copper. When the effective thickness of 2.5 nm /example 4/ begins the healing of the Islands and wires between them.

In the prior art it is known that the effective thickness of copper is less than 0.4 nm obtained wire consist of nanostruc copper, which are fused between themselves and contain a large number of defects. Nanowires have a zigzag shape with variable cross-sectional area along their length [4, 5].

From this it follows that, unlike the prototype, in the present method of forming nanostructures of copper on the surface of the semiconductor substrate, poaul who is able not only to create structures of different geometric shapes depending on the specified parameters, but also to control the diameter and height of the nanostructures, as well as their shape. This gives the ability to use the obtained nanostructures as a template for the formation of magnetic nanostructures in the subsequent sputtering of ferromagnetic materials.

In addition, nanowires of copper, which can be formed by the claimed method are the perfect shape and a much greater length than in the known analogues. However, they do not grow between them, so you can use them to create nanoscale current-carrying paths of constant cross-section and high conductivity.

Thus, experimentally proved the possibility of the formation of self-ordered clusters and nanowires of copper on the surface of the semiconductor substrate at a high temperature two-step deposition of Cu on Si(111).

In the process of deposition of copper, the quality of the coatings was controlled by diffraction of fast electrons (the RHEED). The shape and size of islets (diameter and area) were determined from images of scanning electron microscopy (SEM), followed by processing special software Lispix []. The height of the Islands was determined using the STM in ultrahigh vacuum conditions and atomic force microscopy (AFM) in air. A plot of the averaged parameters of the islets of copper from the effective thickness of osajda is my copper are presented in figure 2. Experimentally established that the average diameter of the Islands with the increase of the effective thickness of copper from 0.4 to 2.5 nm varies from 170 to 1200 nm, and the average height from 36,6 to 22 nm.

The possibility of implementation of the present invention is confirmed by the following examples.

Example 1. The formation of epitaxial Islands of copper triangular and polygonal forms monatomic layer of copper silicide at the effective thickness of copper equal to at 0.42 nm. At the first stage, the surface preparation of Si(111)7×7 by heating the sample for 8 hours at a temperature of 500-550°C, and then at a temperature of 1200°C for 20 ° C in ultrahigh vacuum conditions <10^-10Torr. The result is an atomically clean surface of Si(111)7×7 with a concentration of structural defects less than 3%. On figa presents the image surface Si(111)7×7 obtained by the method of PL.

In the second phase on the surface of the silicon form a monatomic layer of copper silicide by deposition of copper with a thickness of 0.2 nm at the temperature of the substrate 550-600°C. the reaction precipitated copper with silicon atoms on the substrate surface to form a continuous layer of copper silicide Cu₂Si monoatomic thickness. The copper deposition is performed by the method of molecular beam epitaxy in an ultrahigh-vacuum chamber of the firm "OMICRON". During deposition the pressure does not exceed 5·10^{-10 Torr. Copper is evaporated from commercial effusion cells; the deposition rate of Cu 1 nm/min coating Thickness is controlled quartz gauge thickness firm OMICRON"; the calibration of the quartz sensor is implemented by the RHEED and STM. The structure of the films examined in situ by the method of the RHEED energy electron beam of 15 Kev and STM (voltage ±2.0 B, the tunneling current 1) production firm "OMICRON". The surface morphology examined ex situ by scanning electron microscopy and atomic force microscopy. On figb presents research results of the layer of copper silicide Cu₂Si-STM method; it is seen that the silicide repeats the relief of silicon; observed on the image step is atomic. In the third phase on the surface of the buffer layer Cu₂Si at a temperature of 500-550°C precipitated copper with an effective thickness of 0.42 nm. This precipitated copper is condensed in the form of islets of triangular shape (53% of the total number of islets), and the part has a polygonal shape (47% of the total number of islets). Of the paintings in the diffraction of fast electrons, and STM images found that the side faces of the Islands are oriented along the crystallographic directions <110>Cu║<112>Si. The average diameter of the Islands is equal to 170 nm, and the average height of 36.6 nm. On FIGU, presents the AFM image of the nanostructures obtained on the surface of the floor is provodnikovoj substrate.}

^{Example 2. The formation of epitaxial nanostructures of copper on monatomic layer of copper silicide at the effective thickness of copper is 0,84 nm. Example 2 is conducted according to example 1, but the effective thickness of a layer of copper deposited on Cu₂Si is 0,84 nm. This precipitated copper is condensed in the form of islets of triangular shape (68% of the total number of islets), a polygonal shape (28% of the total number of islets) and nanowires (4% of the total number of islets). The side faces of the Islands are oriented along the crystallographic directions <110>Cu║<112> Si(111). The average diameter of the Islands is equal to 0.38 μm, and the average height of the 33.2 nm. Figure 4 presents the SEM image of the nanostructures obtained on the semiconductor substrate. Experimentally determined maximum length of the formed nanowires of Cu is equal to 4 μm, and the average length of the nanowires is 1.5 μm with an average width of 70 nm.}

^{Example 3. The formation of epitaxial nanostructures of copper on monatomic layer of copper silicide at the effective thickness of copper equal 1,68 nm. Example 3 is conducted according to example 1, but the effective thickness of a layer of copper deposited on Cu₂Si is 1,68 nm. This precipitated copper is condensed in the form of Islands triangular (58% of the total number of islets), a polygonal shape (30% of the total number of islets) and nanowires (12% of the total number OS is Ravkov). The side faces of the Islands are oriented along the crystallographic directions <110>Cu║<112>Si(111). The average diameter of the Islands is equal 0,76 µm, and the average height 26,2 nm. Figure 5 presents the SEM image of the nanostructures obtained on the semiconductor substrate. Experimentally determined maximum length of the formed nanowires of Cu is equal to 8 μm, and the average length of the nanowires is 4 microns with an average width of 100 nm.}

^{Example 4. The formation of epitaxial nanostructures of copper on monatomic layer of copper silicide at the effective thickness of copper equal to 2.5 nm. Example 4 is conducted according to example 1, but the effective thickness of a layer of copper deposited on Cu₂Si is 2.5 nm. This precipitated copper is condensed in the form of Islands triangular form (80% of the total number of islets), a polygonal shape (12% of the total number of islets) and nanowires (8% of the total number of islets). The side faces of the Islands are oriented along the crystallographic directions <110>Cu║<112>Si(111). The average diameter of the Islands is equal to 1 μm, and the average height of 22 nm. Figure 6 presents the SEM image of the nanostructures of copper obtained on the semiconductor substrate. The SEM image shows that the effective thickness of copper equal to 2.5 nm, begins the healing of the Islands and wires between them. Experimentally determined maximum length of the form is aligned nanowires of Cu is equal to 8 μm, the average length of the nanowires is 4 μm with an average width of 100 nm.}

^{Empirically it is shown that when the effective thickness of deposited copper, equal to 2.5 nm /example 4/begins the healing of the Islands and copper wires between them.}

^{From the experimental data it follows that the inventive method allows to reliably control the size and type of nanostructures and forming epitaxial copper nanostructures on the surface of a semiconductor of a better quality than in the known analogues. Nanostructures have cut, oriented along crystallographic directions <110>Cu║<112>Si and can be used as templates for the formation of magnetic nanostructures, as well as biological and gas sensors. Literature:}

^{1. N.Motta Self-assembling and ordering of Ge/Si(111) quantum dots: scanning probe microscopy studies // J. Phys.: Condens. Matter 14 (2002), 8353-8378.}

^{2. F.J.Walker, E.D.Specht, R.A.McKee, Film/substrate registry as measured by anomalous x-ray scattering at a reacted & overly strict rules, epitaxial Cu/Si(l 11) interface // Phys.Rev. Lett. 67 (1991), 2818.}

^{3. Z.H.Zhang, S.Hasegawa, S.Ino Epitaxial growth of Cu onto Si(l 11) surfaces at low temperature. // Surface Science 415 (1998), 363-375.}

^{4. A.V.Zotov a, b, c, D.V.Gruznev a, O.A.Utas a, V.G.Kotlyar a, A.A.Saranin Multi-mode growth in Cu/Si(111) system: Magic nanoclustering, layer-by-layer epitaxy and nanowire formation // Surface Science 602 (2008), 391-398.}

^{5. The patent of Russian Federation №2359356, publ. 20.06.2009,}

^{1. The method of forming epitaxial nanostructures of copper on the surface of semiconductor substrates, comprising sadeniemi on an atomically clean surface of Si(111)7×7 with the formation of the buffer layer of silicide copper Cu ₂Si monoatomic thickness at a temperature of 550-600°C in ultrahigh vacuum conditions with the subsequent deposition of the copper, wherein the copper deposition on the prepared substrate of copper silicide is carried out at a temperature of the substrate 500-550°C and the effective thickness of copper in the range from 0.4 to 2.5 nm at the fact that when the effective thickness of copper from 0.4 to 0.8 nm form the Islands of epitaxial nanostructures of copper triangular and polygonal shapes, and the copper thickness in the range from 0.8 to 2.5 nm along with the Islands of copper triangular and polygonal shapes form a perfectly flat copper wire.}

^{2. The method according to claim 1, characterized in that the side faces of the formed epitaxial nanostructures are oriented along the crystallographic directions <110>Cu║<112>Si.}