Composite transistor. RU patent 2519563.

FIELD: electricity.

SUBSTANCE: composite transistor contains an input transistor (1) which base is the base (2) and emitter is the emitter (3) of the composite transistor, an output transistor (4) which collector is the collector (5) of the composite transistor and its emitter is connected to the collector of the input transistor (1), at that in the circuit there is an additional transistor (6) which static mode against the emitter current is set by an additional reference power supply source (7) coupled between the first (8) power supply bus and the emitter of the additional transistor (6), at that the base of the additional transistor (6) is connected to the base of the input transistor (1), its collector is connected to the emitter of the input transistor (1) and the emitter is connected to the base of the output transistor (4).

EFFECT: increasing upper limit frequency of different amplifiers due to reduction of the input and output capacity for the composite transistor used in them.

2 cl, 10 dwg

The invention relates to the field of radio engineering and communication and can be used as a device strengthening of analog signals in the structure of analog chips of different functional purposes (for example, broadband and electoral amplifiers HF and SHF ranges).

In modern microelectronics find wide application classic kaskadnye amplifiers (CU) with resistive load (figure 1)included in the collector circuit of the input transistor - stage with common-emitter [1-15]. The active part KU containing the input 1 and output 4 transistors, can be regarded as an integral transistor (ARTICLE)that can be included in different electronic circuits.

The closest to the technical nature of the claimed device is a component of the transistor in the circuit KU (1) the patent US 5.304.946, fig. 14, which is also shown on the drawing figure 2. It contains the input transistor 1, the base of which is the base 2, and the emitter - emitter 3 composite transistor output transistor 4, manifold which is a collector 5 composite transistor.

A significant disadvantage ART, the architecture of which is present in many other chastnyh amplifiers [1-15], is that it has a relatively large output With output and input Rin parasitic capacitances, which affects the range of working frequencies in the structure of different amplifiers.

The main objective of the proposed invention consists in reducing the input and output composite tanks transistor and, as consequence, increase in 8-10 times the upper frequency limit of different amplifiers on the basis of the inventive ARTICLE.

The problem is solved by the fact that in composite transistor 1, containing the input transistor 1, the base of which is the base 2, and the emitter - emitter 3 composite transistor output transistor 4, manifold which is a collector 5 composite transistor, and the emitter connected to the header of the input transistor 1, there are new elements and communications - in the scheme introduced additional transistor 6, static mode which current emitter is installed an additional source of reference current 7, included between the first 8 bus power supply and emitter additional transistor 6, and the additional base transistor 6 are connected with the base of the input transistor 1, it collector is connected with the emitter of the input transistor 1, and the emitter connected to the output transistor 4.

The scheme chastnogo amplifier based on the composite transistor prototype is shown on the drawing figure 1. On the drawing figure 2 presents separately scheme ST-prototype.

Drawing 3 shows the inventive ARTICLE in accordance with paragraph 1 of the claims.

On the drawing figure 4 shows the scheme chastnogo amplifier on the basis of ARTICLE 3, the corresponding claim 2.

On the drawing figure 5 presents the scheme chastnogo amplifier on the basis of ARTICLE prototype 2 (voltage power supply S p =±5, transistors TN50S FGUP NPP "pulsar").

On the drawing 6 shows a diagram of chastnogo amplifier on the basis of the proposed ARTICLE 3 (E. p =±5, transistors TN50S, TP50S FGUP NPP "pulsar").

On the drawing 7 shows the dependence of the gain on the voltage of the frequency scheme chastnogo amplifier on the basis of ARTICLE prototype figure 5 and RL with the proposed ARTICLE 3 (transistors TN50S, TP50S FGUP NPP "pulsar). This graph shows that the claimed device is 7-8 times best value upper frequency limit of f B .

On the drawing Fig presents the dependence of the complex input resistance of frequency for schemes chastnogo amplifier on the basis of ARTICLE prototype 2 and amplifier with the proposed ARTICLE 3 (transistors TN50S, TR FGUP NPP "pulsar). This graph shows that the input capacitance of the device is 3-4 times less than in the famous ST.

On the drawing figure 9 shows the scheme chastnogo amplifier on the basis of the proposed ARTICLE, which has close to zero input static current.

On the drawing figure 10 shows the dependence of input static power compared schemes figure 5 and figure 9 on temperature.

These graphs show that the proposed scheme is much more static input current, which brings its properties in this parameter to field transistors.

Composite transistor figure 3 contains the input transistor 1, the base of which is the base 2, and the emitter - emitter 3 composite transistor output transistor 4, manifold which is a collector 5 composite transistor, and the emitter connected to the header of the input transistor 1. The scheme introduced additional transistor 6, static mode which current emitter is installed an additional source of reference current 7, included between the first 8 bus power supply and emitter additional transistor 6, and the base of the additional transistor 6 are connected with the base of the input transistor 1, it collector is connected with the emitter of the input transistor 1, and the emitter connected to the output transistor 4.

On the drawing figure 4, in accordance with claim 2, the base of the input transistor 1 is connected to the input voltage 9, between the first 8 bus power supply and output transistor collector 4 included resistor collector load 10, and the emitter input transistor 1 is connected to AC with the second 11 bus power source through a resistor local feedback 12, and is connected with the second 11 bus power supply through ecostability dvuhgolosyj 13. Capacitor 14 performs classical role separation capacity.

Consider the work of the remote control figure 3 in the diagram of figure 4.

The increment voltage collector "To" (site 5) composite of the transistor in the circuit figure 4 changes the current i c4 through capacitance collector-base With Q4 output transistor 4. The current supplied to the emitter, and then in transistor collector 6:

& alpha i of about 1 - gain current emitter of the first transistor.

In the emitter circuit of the transistor 1 if the resistance of the capacitor 14 much smaller than R 12 , there is a redistribution of current α 6 i c4 between emitter transistor 1 and resistor local feedback 12:

- division ratio of current i K6 between r l and R 12 ;

r l ≈20% to 30 Ohm - impedance emitter junction p-n junction transistor 1.

Thus, the collector current of the transistor 4 and, consequently, the total current collector composite transistor

i K4 =α 6 α 1 α 4 K d i c4 , (3)

i Σ =i c4-i C4 =c4 i (1-alpha 6 α 1 α 4 K (d ). (4)

From (4) it follows that the effective output capacity of the proposed ARTICLE is reduced

C AFK =(1-alpha 6 α 1 α 4 K (d )=C K4 (1-T i ), (5)

where T i =α 6 α 1 α K d 4 of about 1.

As a consequence, decreases equivalent time constant collector circuit load ST (t EQ ) and increase the upper cutoff frequency KU f in figure 4 :

t EQ =C Q4 R 10 ·(1-T i ), (6)

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- upper cutoff frequency in the QU with composite transistor-the prototype of figure 1.

The data confirm theoretical conclusions the simulation results, shown on the drawing 7, upper cutoff frequency f in increases in 7-8 times (for process FGUP NPP "pulsar").

The second remarkable feature of the inventive ARTICLE - compensation for the effects of stray capacitance collector-base C KL and K6 transistors 1 and 6 on the entrance of the complex conductivity of the scheme. Indeed equivalent input capacitance KU in the scheme figure 4:

With I =K1 (1-U1 )+K6 (1-U2 )<<With K1 , (8)

- transfer coefficient voltage u of I in the emitter transistor 4;

- transfer coefficient voltage u of I in the emitter transistor 1.

A third remarkable feature of the inventive ARTICLE - small static input current, which can be similar to that in the parameter field-effect transistors:

where I l , I B6 - static current base of transistor 1 and 6;

β l,? 6 - gain current base of transistor 1 and 6.

From (9) follows that, through the appropriate choice of the static current reference voltage 7 you can get a zero input current in the circuit figure 4 and its relatively weak temperature dependence (see figure 10).

The data confirm theoretical conclusions graphics figure 10, from which it follows that the temperature increment of the input current of the inventive ARTICLE in the temperature range from 60% to 80 C in 9-10 times less than in the scheme of ARTICLE prototype.

Thus, the claimed circuit decision ARTICLE characterized by higher values of the upper cutoff frequency, lower input capacity, lower level of the input of the static current and temperature drift.

THE BIBLIOGRAPHIC LIST

1. US patent # 6.825.723 fig.3

2. US patent # 4.151.483 fig.2

3. US patent # 4.151.484

4. US patent # 3.882.410 fig.3

5. Patent application WO 2004/030207

6. US patent # 4.021.749 fig.2

7. US patent # 3.693.108 fig.9

8. US patent # 6.278.329

9. Patent application US 2005/0225397

10. US patent # 5.451.906

11. Patent England GB №1431481 fig.2

12. The US patent №3.693.108 fig. 9

13. The US patent №4.021.749 fig. 2

14. The patent application US 2005/0225397

15. The US patent №6.278.329.

1. Composite transistor containing the input transistor (1), the base of which is the base (2)and emitter - emitter (3) composite transistor output transistor (4), the collector of which is the collector (5) composite of the transistor, and the emitter connected to the header of the input transistor (1), wherein the

the scheme introduced additional transistor (6), static mode which current emitter is installed an additional source of reference current (7), placed between the first (8) bus power supply and emitter additional transistor (6), with the base of the additional transistor (6) is connected to the base of the input transistor (1), the collector is connected with the emitter of the input transistor (1), and the emitter connected to the output transistor (4).