IPC classes for russian patent Device for comparing binary numbers. RU patent 2504825. (RU 2504825):
Another patents in same IPC classes:
Time-spatial switching method / 2458383
When switching timing channels, a computer selects free timing channels of incoming and outgoing communication lines which need switching and writes the address of the channels of the outgoing lines into memory cells belonging to channels of incoming communication lines. Intermediate paths of the digital switching system under investigation are not selected in advance, which significantly reduces the load on the computer. |
System and method to compare files based on functionality templates / 2427890
Method to determine belonging of files to collections of available files on the basis of files comparison with the help of functionality templates includes stages, at which functionality templates are generated on the basis of information on the executed file. Then extracted noise information is deleted from functionality templates of the executed file. Then units of functionality templates of the executed file are reduced to normalised view. Then these units are compared to units of functionality templates of available files, and using comparison results, decision is made on belonging of the unit to one of functionality templates of available files. Creating functionality templates by available malicious software, newly arrived files may be compared with them, and automatic records may be added with condition of similarity; characteristic logical units are extracted from collections of malicious programs, and heuristic rules are created by these units; automatic descriptions are generated. Also the possibility appears to carry out clusterisation of objects, which helps to accelerate their further processing. |
Tracking and synchronising partial change in elements / 2421780
Changes in elements are tracked in accordance with a defined group of properties, and each group is tracked independent of the other. For example, one group may contain large data elements, for example inputs, while the other group may include highly changeable properties, such as an execution control flag feature. Rate of synchronisation between a client and a server is increased by synchronising only selected parts of the element which have changed without controlling change in each separate property within the element. Accordingly, if change has been made with respect to a small information property (for example, an execution control flag feature) in a relatively large email message, such a change will not initiate a large load on the client working in cache mode, and will also not require considerable storage space and processing in order to track each separate property. |
Device for comparing binary numbers / 2420789
Situations A≥B and A<B or A>B and A≤B or A=B and A≠B, where A=an-1…a0, B=bn-i…b0 - n -bit binary numbers given by binary signals a0,…, an-1 b0…, bn-1∈{0,1}, are detected and the relationship between bitness of the compared binary numbers and the maximum signal propagation delay time is excluded. The device has n groups of switches, each consisting of 6 switches. |
Comparator of binary numbers / 2393526
Invention may be used to build means of automatics, functional units of control systems. Device comprises two delay elements, two AND elements, four OR elements, two NOT elements. |
Binary number comparator / 2389063
Invention can be used to design automation apparatus and functional parts of control systems. The comparator has 29 transistors grouped into nine groups and 14 resistors. |
Binary number selector / 2365975
Invention relates to computer engineering and can be used as a means of information preprocessing. The device contains 4n inhibit circuits, 2n 2OR elements, 2n opening and 2n closing switches. |
Device for evaluating and comparing operating efficiency of same-type organisations / 2363042
Invention relates to computer engineering and can be used for evaluating and comparing operating efficiency of same-type organisations with the objective of drawing up recommendations for improving quality of their operation. The device contains groups of input and output registers, a group of subtracting units, group of squaring devices, groups of delay elements, groups of adders, square-root extractor, groups of commutators, groups of display units, clock-pulse generator, pulse distributor, input registers and dividers. |
Device for selecting binary numbers / 2363038
Invention relates to computer engineering and can be used in digital computer engineering systems as an information pre-processing device. The device contains 7n majority elements, each with three inputs, and 2n NOT elements. |
Device for selecting the lesser one of two binary numbers / 2300130
Device for selecting the lesser one of two binary numbers contains AND element, 4(n-1) implication units and 3(n-2)+1 AND elements. Implication units and AND elements are grouped in n groups. Group number J contains two implication units and AND element. Group number M additionally contains two implication units and two AND elements. In group number r the output of i implication unit is connected to i input of first AND element. In m group output of i implication unit, connected by inverting input to first input of (i+1) AND element, and output of (i+1) AND element, connected by second input to of (3-i) implication unit, are connected respectively to inverting and non-inverting inputs of (i+2) implication unit. In first group, inverting and non-inverting inputs of first implication unit are connected respectively to non-inverting and inverting inputs of second implication unit, first and second inputs of first AND element. Output of i implication unit of first group and output of (i+2) implication unit of m group are connected respectively to inverting input of i implication unit of second group to inverting input of i implication unit of (m+1) group. Inputs of first AND element of first group, non-inverting inputs of implication units of r group and output of first AND element of j group form respectively (n+1), r, (n+r) inputs and j output of device for selecting the lesser one of two binary numbers. |
Binary number comparator / 2300131
Binary number comparator contains OR logical element, OR-NOT logical element and two XOR logical elements, three AND-NOT logical elements. First input and output of i XOR logical element are connected respectively to first and second inputs of i AND-NOT logical element, connected by second input to i input of OR-NOT logical element. First, second inputs and output of OR logical element are connected respectively to output of second, by second input of first logical element AND-NOT and second input of third logical element AND-NOT, connected by first input and output respectively to output of first logical element AND-NOT and to first output of binary number comparator, second output and i, (i+2) inputs of which are connected respectively to output of logical element OR-NOT and first, second inputs of i XOR logical element. |
Binary number comparator / 2300132
In accordance to invention, into comparator of binary numbers, containing two elements "2OR" (2), six elements "2OR" (2ij) are introduced, sixteen elements "forbidden" (1ij), where and element "2OR-NOT" (3), while all elements are grouped in four groups in such a way that j-th group contains two "2OR" (2ij) elements and four "forbidden" elements (1ij), and fourth group additionally contains "2OR-NOT" element (3). |
Method for comparing one-bit binary numbers / 2300134
In accordance to method, for generating sign of equality of two binary signals x1=x2∈{0,1}, setting compared one-bit numbers, these signals are added by modulus two adder, and addition results are inverted by NOT element, for creating a sign of relation x1 < x2, result of modulus two addition of given signals and binary signal x2 are sent to AND element. |
Device for selecting the greater one of two binary numbers / 2300135
Device for selecting the greater one of two binary numbers contains OR element, 2(n-2) AND elements, 3(n-1) AND-NOT elements and 2(n-1) implication units. All implication units and AND, AND-NOT, OR elements are grouped in n groups. Groups numbered k and r contain, respectively, two implication units and three AND-NOT elements. First and m groups additionally contain, respectively, OR element and two AND elements. In r group output of i AND-NOT element, connected by second input to first input of i AND element and output of i AND element, connected by its second input to output of (3-i) AND-NOT element, are connected respectively to inverting and non-inverting inputs of i implication unit. In first group inverting and non-inverting inputs of first implication unit are connected respectively to non-inverting and inverting inputs of second implication unit, first and second inputs of OR element. Output of i implication unit of k group is connected to second input of i element AND-NOT of (k+1) group, while first inputs of first and second AND-NOT elements of r group, first and second inputs of OR element and output of third AND-NOT element of r group, output of OR element form, respectively, r, (n+r), (n+1), first inputs and r, first outputs of device for selecting the greater one of two binary numbers. |
|
FIELD: information technology.
SUBSTANCE: device can be used to design automation apparatus and functional parts of control systems. The device includes four XOR elements, four closing switches and four opening switches.
EFFECT: simplification of the device.
1 dwg, 1 tbl
The invention relates to the computer engineering and may be used for construction of facilities of automation of the functional units of control systems and other
Known devices comparison of binary numbers (see, e.g., patent of the Russian Federation 2363037, cl. G06F 7/02, 2009), carrying out with the help of pulse signal recognition relations A>,=,<, where A=3 and 2 and 1 and 0,=b 3 b 2 b 1 b 0 - four binary numbers, asked binary signals a 0 ,...,a 3 , b 0 ,...,b 3 belongs to{0,1}.
The reasons that impede the achievement of specified below technical result, when using the known devices comparison of binary numbers include dependency between the maximum time of the signal propagation delay and the capacity compared in binary, and the complexity of these devices due to the fact that the price , in particular, referred to analogue is 36.
The closest device to the same destination to the claimed invention by a combination of traits is adopted as a prototype device comparison of binary numbers (RF patent 2324971, cl. G06F 7/00, 2008), which contains four elements XOR and using a pulsed signal performs recognition relations A>,=,<, where A=a 3 a 2 a 1 a 0 , A=b 3 b 2 b 1 b 0 - four binary numbers, asked binary signals a 0 ,...,a 3 , b 0 ,...,b 3 belongs to{0,1}.
The reasons that impede the achievement of specified below technical result, when using the prototype include dependency between the maximum time of the signal propagation delay and the capacity compared in binary, as well as the complexity of the prototype, due to the fact that its price on equal to 32.
The technical result of the invention is to simplify device by reducing its prices in and eliminating dependency between the maximum time of the signal propagation delay and the capacity compared binary numbers while maintaining the functionality of the prototype.
This technical result is achieved by carrying out the invention of the device comparison of binary numbers, containing four items EXCLUSIVE OR, where the first and second inputs of the i-th to (i=
) XOR gates connected respectively with the i-th and (4+i)th inputs comparator binary numbers peculiarity lies in the fact that it additionally introduced four guard and four break key, and its first input and output of the i-th element EXCLUSIVE OR connected respectively with the entrance of the i-th test of the key and the control input of the United outputs i-s, normally open, normally closed keys, and the output of the previous, fourth exit and entrance of the first NC keys are connected respectively with entrance subsequent NC key, output and tuning input device comparison of binary numbers.
In Fig. a diagram of the proposed device comparison of binary numbers.
Device comparison of binary numbers contains elements XOR 1 1 ,..., 1 4 , no and NC keys 2 1 ,...,2 4, 3 1 ,...,3 4 , the first entrance and exit item 1 i (i=
) are connected respectively with the input of key 2 i and control input United outputs keys 2 i 3 i , and the outputs of keys 3 j (j=
), 34 and entrance key 3 i connected respectively with the input of key 3 j+1 , output and tuning input device comparison of binary numbers, the i-th and (4+i)-th, the inlets of which are connected respectively with the first and the second inputs item 1 i .
Operation of the proposed device comparison of binary numbers is as follows. On its adjustment input positive pulse signal z 0 belongs to{0,1}. On his first,..., fourth and fifth,..., eighth inputs are served respectively arbitrary binary signals and 0 ,...,3 belongs to{0,1} and b 0 ,...,b 3 belongs to{0,1}that ask for comparison four binary numbers A=3 and 2 and 1 and 0 and B=b 3 b 2 b 1 b 0 (0 , b 0 set the value of LSB). If a i-1 PD b i-1 (i=
) or a i-1 =b (i-1 , switch 2, respectively, closed or open, and the key 3 i - open or closed. Then the United outputs keys 2 i 3 i will play the function z i (a (i-1 , b i-1 , z (i-1 ), which defines the table below. a i-1 b i-1 z i-1 z i 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 0 1 1 1 1
Analysis of the data given in the table allows us to conclude that when a i-1 >b (i-1 , a i-1 <b i-1, a i-1 =b (i-1 have respectively z i =1, z i =0, z i =i z-1 . Thus, if A>And<A or A=b, then the output of the proposed device accordingly obtain a logical «1»logic «0» or positive pulse signal z 0 .
The above data allow to draw a conclusion, that the proposed device comparison of binary numbers using a pulsed signal performs recognition relations A>,=,<, where A=3 and 2 and 1 and 0,=b 3 b 2 b 1 b 0 - four binary numbers, asked binary signals a 0 ,...,a 3 , b 0 ,...,b 3 belongs to{0,1}and is compared with the prototype simpler, while the price for the proposed device is equal to 20. In addition, the proposed device, the comparison of binary numbers maximum time s propagation delay does not depend on the bitness of the compared binary numbers, as τ=TS . +τ CL , where τ . and t CL is the duration of the delay introduced element XOR and key.
Device comparison of binary numbers, containing four XOR gates, of which the first and second inputs of the i-th
XOR gates connected respectively with the i-th and (4+i)th inputs device comparison of binary numbers is different because it introduced additional four guard and four break key, and its first input and output of the i-th element EXCLUSIVE OR connected respectively with the entrance of the i-th test of the key and the control input of the United outputs i-s, normally open, normally closed keys, and the output of the previous, fourth and first entrance NC keys are connected respectively with entrance subsequent NC key, output and tuning input device comparison of binary numbers.
|