Device for evaluating and comparing operating efficiency of same-type organisations
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 Device for estimation and comparing of functioning efficiency of same organisations / 2349954Device contains group of input registers, group of output registers, the block of allocation of the maximum number, two groups of delay devices, group of subtract units, group of adders, group squaring devices, the block of taking the square root, group of switchboards, group of indication blocks, generator of clock impulses, distributor of impulses, group of elements OR, S groups of registers. |
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 Device for selecting binary numbers / 2363038Invention relates to computer engineering and can be used in digital computer engineering systems as an information pre-processing device. The device contains 7n majority elements, each with three inputs, and 2n NOT elements. |
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 Device for comparing binary numbers / 2363036Invention relates to computer engineering and can be used in digital comparators, associative processors and database machines. The technical outcome of the invention is increased functionalities due to recognition of relationships A>B and A=B. The device for comparing binary numbers is meant for comparing four-bit binary numbers A and B, defined by binary signals. The device contains four EXCLUSIVE OR elements (11, …,14), four inhibition elements (21,…,24), four 3AND elements (31,…,34), four 2OR elements (41,…,44) and a NOT element (5). Functionalities of the device are increased due to the given elements and a new connection circuit. |
 Device for comparing binary numbers / 2363035Invention relates to computer engineering and can be used in digital comparators, associative processors and database machines. The device for comparing binary numbers is meant identifying characters xn-1,…x0 > yn-1,…y0, xn-1,…x0 = yn-1,y0, xn-1,…x0 < yn-1,…y0, where xn-1,…x0, yn-1,…y0 n-bit binary numbers, defined by binary signals x0,…,xn-1, y0,…yn-1∈{0,1}. The device contains 4(n-1)+2 implicators (111, I21, 112,…14n), 2(n-1) conjunctors (212, …,22n). The maximum signal propagation delay time is reduced due to the given logic elements and a new connection circuit. |
 Device for selecting greater of two binary numbers / 2363034Invention relates to computer engineering and can be used in digital computer engineering systems as an information pre-processing device. The said device for selecting the greater of two binary numbers is meant for processing n-bit binary numbers, defined by binary signals. The device comprises 4(n-1) inhibition gates (111, 121, 112,…( 14(n-1), 11n, 12n and 3(n-2)+2 OR elements 212,…,23(n-1), 211, 21n). Compositional uniformity is increased due to the given elements and connections between them. |
 One-dimensional median filter with modular architecture / 2362209Invention relates to special-purpose computer equipment and can be used in systems in which there is need for hardware implementation of digital signal filtering algorithms. The device contains N input signal delay elements, connected in series, N modules for sorting and storing readings, each of which consists of a bus commutator, two comparators, register and combinational circuit, meant for controlling data transfer between modules, based on logic processing of results of comparing input code signals and control signals from two neighbouring modules. |
 Binary number comparator / 2361266Invention relates to computer engineering and can be used in making automation equipment and functional parts of control systems. The aim of the invention is increase in functional capabilities due to provision for the relationships A>B, A=B, where A, B are binary numbers, assigned by binary numbers, when comparing three-digit binary numbers. The binary number comparator contains three EXCLUSIVE OR elements, four NO-AND elements, three OR elements, NO-OR element and an AND element, connected accordingly to inputs and outputs of the binary number comparator. |
 Binary digits comparison device / 2353966Invention can be used for creation of automation equipment and control system functional assemblies. The device contains 2n+2(n-1) of implicators and 2(n-1) of AND elements. |
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Device for estimation and comparing of functioning efficiency of same organisations / 2349954 Device contains group of input registers, group of output registers, the block of allocation of the maximum number, two groups of delay devices, group of subtract units, group of adders, group squaring devices, the block of taking the square root, group of switchboards, group of indication blocks, generator of clock impulses, distributor of impulses, group of elements OR, S groups of registers. |
 Binary code comparator device / 2329530Invention can be used in digital comparators, associative processors and database devices. The binary code comparator device is designated for realisation of the A≥B operator, where A=an-1...a0, B=bn-1...b0, i.e. the n-bit binary codes defined by the binary signals a0,..., an-1, b0, ..., bn-1 ∈{0,l}. The device includes n "NO" elemens and n majority logic elements, each with 3 inputs. |
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One-dimensional median filter with modular architecture / 2362209 Invention relates to special-purpose computer equipment and can be used in systems in which there is need for hardware implementation of digital signal filtering algorithms. The device contains N input signal delay elements, connected in series, N modules for sorting and storing readings, each of which consists of a bus commutator, two comparators, register and combinational circuit, meant for controlling data transfer between modules, based on logic processing of results of comparing input code signals and control signals from two neighbouring modules. |
FIELD: computer engineering.
SUBSTANCE: invention relates to computer engineering and can be used for evaluating and comparing operating efficiency of same-type organisations with the objective of drawing up recommendations for improving quality of their operation. The device contains groups of input and output registers, a group of subtracting units, group of squaring devices, groups of delay elements, groups of adders, square-root extractor, groups of commutators, groups of display units, clock-pulse generator, pulse distributor, input registers and dividers.
EFFECT: increased functionalities of the device.
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The invention relates to computing and can be used to assess the functioning of similar organizations with a view to making recommendations to improve the quality of their work.
A device for evaluating and comparing the effectiveness of the functioning of similar organizations, containing groups of input registers, a group of blocks subtraction, Quad band, a group of delay elements, a group of adders, the block extracting the square root, a group of switches, a group of output registers, a group of display units, a generator of clock pulses and the pulse distributor (Eurasian patent №008678, CL G06F 17/00, 15/00, 2007).
Evaluation and comparison of efficiency of functioning of similar organizations with the help of this device is as follows. Is determined by the difference ΔWjibetween the i-th component of the vector efficiency of the basic organization ΔWδiand the i-th component of the vector efficiency of the j-th organization Wji:
where M is the number of similar organizations;
S is the number of components of vector efficiency.
If organizations are educational (schools, colleges, institutes, universities, etc), the values of Wjican appear, for example, the relative number of doctors and candidates of Sciences of prepodavatel the second part, the relative number of graduates who continued their education at a higher level and so on
If the organization engaged in the manufacture of some products, the values of Wjican be, for example, the relative number of workers with a high discharge, the relative amount of products with high quality and so on
Next, the estimated modulus of the difference δWjfor the j-th organization by the formula:
The less δWjthe better the organization operates, as its effectiveness is closest to the effectiveness of the basic organization.
A disadvantage of the known device is the lack of evaluation of the effectiveness of the funding organizations.
The technical result of the claimed invention is the extension of functionality due to the presence of evaluating the effectiveness of the funding organizations. This value allows you to determine the sustainable funding of the assessed organization. Comparison of estimates of effectiveness of the financing of similar organizations will identify the worst of them and to take measures to increase the effectiveness of their funding.
The magnitude of effectiveness of the financing of the j-th organization Wjis estimated by the following formula:
where Wcpj/sub> - the average of all S-parameters of vector efficiency of the j-th of the organization;
Withj- the cost of funding the j-th organization.
The value of Wcpjis determined by the formula:
Comparing Wjcalculated according to the formula (3) for various organizations, you can select the best of them in terms of efficiency financing. These organizations will have the highest value of Wj. The worst of the organization, with lower values of Wjare subject to additional verification and implementation of measures on increase of efficiency of their funding.
The technical result is achieved in that the device for evaluating and comparing the effectiveness of the functioning of similar organizations, containing the first and second groups of input registers, a group of blocks subtraction, a group of Quad, the first group of delay elements (EZ), the first group of adders, the block extracting the square root, the first group of switches, the first group of output registers, the first group of display units, a generator of clock pulses and the pulse distributor, the input connected to the output of the clock generator pulses, the first and second outputs of the pulse distributor - with inputs recording respectively the first and second groups of input registers, each of which is from the S the of ways, the information input of each of which is a reference input source information device, the information inputs of the first group of input registers are values of Wδicharacterizing the i-th component of the vector efficiency of the basic organization, and information on the inputs of the second group of input registers are values of Wjicharacterizing the i-th component of the vector efficiency of the j-th organization, third and fourth outputs of the pulse distributor connected to inputs of reading, respectively, the first and second groups of input registers, fifth and sixth outputs - control inputs, respectively, of the first and second elements of the first group of switches and to the inputs of the recording respectively the first and second elements of the first group of output registers, from the ninth through (6+M)-th outputs of the pulse distributor is connected with the control inputs, respectively, from the third to the M-th elements of the first group of switches and inputs write respectively from the third to the M-th the elements of the first group of output registers, (7+M)-th output of the pulse distributor connected to the inputs of the reading of each of the M elements of the first group of output registers, the output of each element of the first group of input registers connected respectively to the inputs of reducing each element of the group of blocks subtraction, the state is the soup of S elements, the output of each of which is connected to the inputs of each group element Quad, consisting of S elements, the outputs of the first and second elements of the group Quad connected respectively to first and second inputs of the first element of the first group of adders consisting of (S-1) elements, and the other inputs of the Quad, starting with the third connected to inputs of corresponding elements of the first group EZ consisting of (S-2) elements, the outputs of each of which is connected to the first inputs of the respective elements of the first group of adders, starting from the second element, the outputs of each of which, including the first element and except for the last element, is connected with the second inputs of the subsequent elements of the first group of adders, and the output of the last element, i.e. the (S-1)-th adder connected to the input unit, extracting the square root, the output of which is connected to information inputs of each of the elements of the first group of switches consisting of M elements, the outputs of each element of which is connected to information inputs of the respective elements of the first group of output registers, consisting of M elements, the outputs of each element which are connected with inputs of the respective elements of the first group of display units, consisting of M elements, further comprises first and second the input registers, the WTO is a second group of EZE, consisting of (S-2) elements, where S is the number of components of vector efficiency, third EZE group consisting of S elements, a second group of adders consisting of (S-1) elements, the first and second blocks dividing the second group of switches consisting of M elements, where M is the number of similar organizations, the second group of output registers and indicators, each of which consists of M elements, the information input of the first register is the input source of the information device, which receives the value of S, the input of the first register connected to the first the output of the pulse distributor, a second output of which is connected to the input of the recording of the second input register, the fifth and sixth outputs - control inputs, respectively, of the first and second elements of the second group of switches and to the inputs of the recording respectively the first and second elements of the second group of output registers, from the ninth through (6+M)-th outputs of the pulse distributor is connected with the control inputs, respectively, from the third to the M-th elements of the second group of switches and inputs write respectively from the third to the M-th elements of the second group of output registers, (7+M)-th output of the pulse distributor connected to the inputs of the reading of each of the M elements of the second group of output registers, and the seventh and eighth outputs to the inputs of read is of respectively the first and second input registers, information input is the last input source information of the device that receives the values of Cj, characterizing the cost of funding the j-th organization, the output of the second input register is connected to the input of the divider of the second unit, the output of which is connected to the information inputs of each of the M elements of the second group of switches, and the log dividend - to the output of the first unit, the log dividend which is connected to the output of the last (S-1)-th element of the second group of adders, and the input of the divider with the output of the first input register, the output of each element of the second group of input registers connected to the inputs the corresponding elements of the third group of EZE, the outputs of which are connected with inputs wichitaeagle relevant elements of the group of blocks subtracting the outputs of the first and second elements of the second group of input registers connected respectively to first and second inputs of the first element of the second group of adders, the other outputs of the input registers of the second group, beginning with the third, connected to inputs of corresponding elements of the second group of EZE, the outputs of each of which is connected to the first inputs of the corresponding elements of the second group of adders, starting from the second element, the outputs of each of these elements including the first element except the last element, uedineny with the second inputs of the subsequent elements the second group of adders, the outputs of each element of the second group of switches connected to information inputs of the corresponding elements of the second group of output registers, the outputs of each of which are connected with the inputs of the corresponding elements of the second group of display units.
Figure 1 and 2 shows the functional diagram of the device for evaluating and comparing the effectiveness of the functioning of similar organizations (to eliminate the bulkiness of communication between the pulse distributor and the control inputs of the respective blocks are not shown in full, as indicated by the numbering of the inputs and outputs). Figure 3 shows the sequence diagram of the operation of the claimed device (y-axis the numbers of outputs of the pulse distributor, and the abscissa axis is the number of cycles and duration of the various computational operations (addition and subtraction - one step, squaring - eight clock cycles, divide - sixteen bars, taking the square root of twenty cycles) in the upper part of figure 3 (for execution timeline adopted S=6, M=4, although these values can take arbitrary values).
The device for evaluating and comparing the effectiveness of the functioning of similar organizations (figure 1 and 2) contains the first 1 and second 2 groups of input registers, consisting of S elements, group 3 blocks subtraction, consisting of S, group 4 Quad, consisting of S elements, the first group of 5 EZ consisting of (S-2) elements, the first group of 6 adders consisting of (S-1) elements, block 7 extracting the square root, the first group of 8 switches, consisting of M elements, the first group of 9 of the output registers, consisting of M elements, the first group 10 display units consisting of M elements, the generator 11 clock pulses, the dispenser 12 pulses, the first 13 and second 14 input registers, the second 15 the EZE group consisting of (S-2) elements, the third 16 the EZE group consisting of S elements, the second group 17 adders consisting of (S-1) elements, the first 18 and second 19 blocks dividing the second group of 20 switches, consisting of M elements, a second group 21 of the output registers and the second group 22 display units.
The device for evaluating and comparing the effectiveness of the functioning of similar organizations working in the following way. For informational inputs of each of the elements of the first group 1 input registers (1 and 2) zasilacze values of the components of the vector efficiency Wδibasic organization, and the information input of the first input register 13 value of S is the number of components of vector efficiency. When this control signal to the inputs of record group 1 and the register 13 is supplied from the first output of the distributor 12 pulse, the pace of work is otorongo is set by the generator 11 clock pulses.
For informational inputs of each of the elements of the second group 2 input registers are served values of the components of the vector efficiency of the first organization W1iand on the information input in the second input register 14 is written the value of C1the financing costs of the first organization. In this situation, the control signal at the inputs of record group 2 and the register 14 is supplied from the second output of the distributor 12 pulses.
The signal from the third output of the distributor 12 pulses on the inputs read each element of the first group 1 input registers values of Wδizasilacze on reducing inputs of the respective elements of the group 3 blocks subtraction. With outputs of each element of the second group 2 input registers signal from the fourth output of the pulse distributor 12 values of W1iare fed to the inputs wichitaeagle relevant elements of groups 3 blocks subtraction through the appropriate EZ group 16. The presence of this group EZ necessary in order to provide simultaneous signals on the information inputs of the first 8 and second 20 groups of switches. The value of ΔW1idefined by the formula (1), are fed to the inputs of the group 4 Quad, with outputs of the first two elements of which the values ofand
serves respectively to first and second inputs of the first adder of the first group of 6 adders. From outputs of other elements of group 4 of the Quad, starting with the third value
go through the appropriate elements of group 5 EZ on the first inputs of the respective elements of the first group of 6 adders, starting with the second. From the output of the last adder group 6
being introduced to the input unit 7 taking the square root. From the output of the unit 7 the value of δW1characterizing the modulus of the difference between the efficacies of the basic functioning of the organization and of the first organization, defined by the formula (2), served on the information inputs of the first group of switches 8.
The values of the first two performance indicators of the first organization W11and W12serves respectively to the first and second inputs of the first adder group 17. From outputs of other elements of group 2 input registers starting with the third value of W1igo through the appropriate EZ group 15 to the first inputs of the corresponding elements of the second group 17 adders, starting with the second. From the output of the last adder group 17being introduced to the input of the dividend first block 18 division at the input of the divider which is fed to the first input of the register 13, the value of S on a signal from the seventh output of the distributor 12 pulses to the input of read is of the block 13. From the output of block 18 is Wcp1- the average value of S indices vector efficiencies of the first organization, which is estimated by the formula (4), is fed to the input dividend of the second unit 19 division. At the input of the divider of this unit is C1the financing costs of the first organization from the output of the second input register 14 by the signal from the eighth output of the distributor 12 pulses to the input of the reading unit 14. Therefore, the output unit 19, the magnitude of effectiveness of the financing of the first organization WF1defined by the formula (3), served on the information inputs of the second group 20 of communicators.
Due to the presence of the control signal from the fifth output of the distributor 12 pulses on the control inputs of the first elements of the first 8 and second 20 groups of communicators and to the input of the first elements of the first 9 and second 21 groups of the output registers of the values of W1and WF1will be fixed in the first elements of the groups 9 and 21 of the output registers.
In further operation of the device is repeated according to the already described circuit. The difference is that on the information inputs of the second group 2 input registers will be made by the component values of the vector efficiency W2iand on the information input in the second input register 14 - the cost of funding the second organization - From2. After the evershine second cycle of operation of the device to the information inputs of the second group elements 9 and 21 of the output registers zasilacze respectively the values of δW 2and WF2. The procedure for obtaining the values of δWjand Wjclearly presents the sequence diagram of the operation of the device (figure 3).
After completion of the M-th operation of the device in the M elements of group 9 and 21 of the output registers (figure 2) will be fixed M value δWjand Wj. According to the signal (5+M)-th output of the distributor 12 pulses at the inputs of the read element groups 9 and 21 of the output registers of M values δWjand Wjcome from the outputs of these groups to the corresponding elements of groups 10 and 22 display units.
By visual analysis by comparing the values of δWjidentify those organizations that have the lowest efficiency (i.e. the largest value δWjand need recommendations for improving the quality of their work. The same analysis is performed for Wj. In this case, the worst will be those organizations that have the lowest value of Wj.
Thus, the technical result of the claimed invention is not achieved at the expense of the mathematical apparatus, and through technical means (blocks and items), referred to in the description of the additional devices responsible for expanding the functionality of this device. The described device allows to assess the the effectiveness of funding that enables you to define a rational amount of funding.
Industrial applicability of the invention is that it can be used in different areas (sectors) production in the calculations associated with recommendations to improve the quality of work of similar organizations.
The device for evaluating and comparing the effectiveness of the functioning of similar organizations, containing the first and second groups of input registers, a group of blocks subtraction, a group of Quad, the first group of delay elements (EZ), the first group of adders, the block extracting the square root, the first group of switches, the first group of output registers, the first group of display units, a generator of clock pulses and the pulse distributor, the input connected to the output of the clock generator pulses, the first and second outputs of the pulse distributor - with inputs recording respectively the first and second groups of input registers, each of which consists of S elements, the information input each of which is a reference input source information device, the information inputs of the first group of input registers values arrive Wδi, characterizing the i-th component of the vector efficiency of the basic organization, and information on the inputs of the second group of input registers are values Wji characterizing the i-th component of the vector efficiency of the j-th of the organizations the third and fourth outputs of the pulse distributor connected to inputs of reading, respectively, the first and second groups of input registers, fifth and sixth outputs - control inputs, respectively, of the first and second elements of the first group of switches and to the inputs of the recording respectively the first and second elements of the first group of output registers, from the ninth through (6+M)-th outputs of the pulse distributor is connected with the control inputs, respectively, from the third to the M-th elements of the first group of switches and inputs write respectively from the third to the M-th elements of the first group of output registers, (7+M)-th the output of the pulse distributor connected to the inputs of the reading of each of the M elements of the first group of output registers, the output of each element of the first group of input registers connected respectively to the inputs of reducing each element of the group of blocks subtraction consisting of S elements, each of which is connected to the inputs of each group element Quad, consisting of S elements, the outputs of the first and second elements of the group Quad connected respectively to first and second inputs of the first element of the first group of adders consisting of (S-1) elements, and the other inputs of the Quad, starting with the third connected to inputs of corresponding elements the first EZE group consisting of (S-2) elements, the outputs of each of which is connected to the first inputs of the respective elements of the first group of adders, starting from the second element, the outputs of each of which, including the first item, except the last element, is connected with the second inputs of the subsequent elements of the first group of adders, and the output of the last element, i.e. the (S-1)-th adder connected to the input unit, extracting the square root, the output of which is connected to information inputs of each of the elements of the first group of switches consisting of M elements, the outputs of each element of which is connected to information inputs of the respective elements of the first group of output registers, consisting of M elements, the outputs of each element which are connected with inputs of the respective elements of the first group of display units, consisting of M elements, characterized in that it further comprises first and second input registers, the second EZE group consisting of (S-2) elements, where S is the number of components of vector efficiency, third EZE group consisting of S elements, a second group of adders consisting of (S-1) elements, the first and second blocks dividing the second group of switches consisting of M elements, where M is the number of similar organizations second group of output registers and indicators, each of which consists of M elements, and the information input of the first register is the input source of the information device, which receives the value of S, the input of the first register is connected to the first output of the pulse distributor, a second output of which is connected to the input of the recording of the second input register, the fifth and sixth outputs - control inputs, respectively, of the first and second elements of the second group of switches and to the inputs of the recording respectively the first and second elements of the second group of output registers, from the ninth through (6+M)-th outputs of the pulse distributor is connected with the control inputs, respectively, from the third to the M-th elements of the second group of switches and inputs write respectively from the third to the M-th elements of the second group the output registers, (7+M)-th output of the pulse distributor connected to the inputs of the reading of each of the M elements of the second group of output registers, and the seventh and eighth outputs - inputs are read, respectively, the first and second input registers, the information input is the last input source information of the device that receives the values of Cj, characterizing the cost of funding the j-th organization, the output of the second input register is connected to the input of the divider of the second unit, the output of which is connected to the information inputs of each of the M elements of the second group of switches, and the log dividend - to the output of the first block division, the log dividend to the which is connected to the output of the last (S-1)-th element of the second group of adders, and the input of the divider with the output of the first input register, the output of each element of the second group of input registers connected to the inputs of the corresponding elements of the third group of EZE, the outputs of which are connected with inputs wichitaeagle relevant elements of the group of blocks subtracting the outputs of the first and second elements of the second group of input registers connected respectively to first and second inputs of the first element of the second group of adders, the other outputs of the input registers of the second group, beginning with the third, connected to inputs of corresponding elements of the second group of EZE, the outputs of each of which is connected to the first inputs of the corresponding elements of the second group of adders, starting from the second element, the outputs each of these items including the first item, except the last element, is connected with the second inputs of the subsequent elements of the second group of adders, the outputs of each element of the second group of switches connected to information inputs of the corresponding elements of the second group of output registers, the outputs of each of which are connected with the inputs of the corresponding elements of the second group of display units.