RussianPatents.com
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Device for selecting maximal one out of two binary numbers. RU patent 2298219. |
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FIELD: computer engineering, possible use for building means of automatics, functional units and control systems. SUBSTANCE: device contains two AND elements, two OR elements, two implicative devices. EFFECT: expanded functional capabilities. 1 dwg, 1 tbl
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![]() Device contains matrix of unary first memory registers and matrix of unary registers of second memory, which are identical to each other. Between them a commutator is positioned. Unary memory registers, positioned conditionally in one row, are connected between each other as shifting row registers. Commutator on basis of law given externally connects output of shifting register of first memory, corresponding to i-numbered row, to input of shifting register of second memory, corresponding to j-numbered row in second memory. After sending a packet of shifting pulses to shifting input of i-numbered shifting register of first memory, information from it moves to j-numbered shifting register of second memory. Therefore, transfer of i-numbered row to j-numbered position in new array occurs. Transfer of rows can be realized row-wise, or simultaneously for all, while structure of commutator is different for different cases. |
![]() Device has n-1 logic modules, each of which has register, locking and unlocking keys, ROM device. |
![]() Device has numeric conversion block for converting numbers to digit-wise signals, block for forming selection strobes, commutator of selection of minimal or maximal number. |
![]() Device has block of registers of first memory, block of registers of second memory, block for controlling reading of columns, block for controlling reading of rows, block for controlling reverse recording; according to second variant, device has same elements excluding block for controlling reverse recording. Third variant of device is different from second variant by absence of block for controlling reading of columns, and fourth variant of device is different from second one by absence of block for controlling reading of rows. |
![]() Device has numeric conversion block for converting numbers to digit-wise signals, block for forming selection strobes, commutator of selection of minimal or maximal number. |
![]() Device has coefficients memory elements, comparison blocks, keys, OR elements, indicators. |
![]() Device has coefficients memory elements, comparison blocks, keys, OR elements, indicators. |
![]() Device has numeric conversion block for converting numbers to digit-wise signals, block for forming selection strobes, commutator of selection of minimal or maximal number. |
![]() Device contains two AND elements, two OR elements, two implicative devices. |
![]() Device contains 2(n-1) AND elements, 2(n-1) AND-NOT elements, 2n implicative devices. |
![]() Device for selecting the lesser one of two binary numbers contains AND element, 4(n-1) implication units and 3(n-2)+1 AND elements. Implication units and AND elements are grouped in n groups. Group number J contains two implication units and AND element. Group number M additionally contains two implication units and two AND elements. In group number r the output of i implication unit is connected to i input of first AND element. In m group output of i implication unit, connected by inverting input to first input of (i+1) AND element, and output of (i+1) AND element, connected by second input to of (3-i) implication unit, are connected respectively to inverting and non-inverting inputs of (i+2) implication unit. In first group, inverting and non-inverting inputs of first implication unit are connected respectively to non-inverting and inverting inputs of second implication unit, first and second inputs of first AND element. Output of i implication unit of first group and output of (i+2) implication unit of m group are connected respectively to inverting input of i implication unit of second group to inverting input of i implication unit of (m+1) group. Inputs of first AND element of first group, non-inverting inputs of implication units of r group and output of first AND element of j group form respectively (n+1), r, (n+r) inputs and j output of device for selecting the lesser one of two binary numbers. |
![]() Binary number comparator contains OR logical element, OR-NOT logical element and two XOR logical elements, three AND-NOT logical elements. First input and output of i XOR logical element are connected respectively to first and second inputs of i AND-NOT logical element, connected by second input to i input of OR-NOT logical element. First, second inputs and output of OR logical element are connected respectively to output of second, by second input of first logical element AND-NOT and second input of third logical element AND-NOT, connected by first input and output respectively to output of first logical element AND-NOT and to first output of binary number comparator, second output and i, (i+2) inputs of which are connected respectively to output of logical element OR-NOT and first, second inputs of i XOR logical element. |
![]() In accordance to invention, into comparator of binary numbers, containing two elements "2OR" (2), six elements "2OR" (2ij) are introduced, sixteen elements "forbidden" (1ij), where and element "2OR-NOT" (3), while all elements are grouped in four groups in such a way that j-th group contains two "2OR" (2ij) elements and four "forbidden" elements (1ij), and fourth group additionally contains "2OR-NOT" element (3). |
![]() Device contains two NOT elements, four AND elements and two OR elements. |
![]() In accordance to method, for generating sign of equality of two binary signals x1=x2∈{0,1}, setting compared one-bit numbers, these signals are added by modulus two adder, and addition results are inverted by NOT element, for creating a sign of relation x1 < x2, result of modulus two addition of given signals and binary signal x2 are sent to AND element. |
![]() Device for selecting the greater one of two binary numbers contains OR element, 2(n-2) AND elements, 3(n-1) AND-NOT elements and 2(n-1) implication units. All implication units and AND, AND-NOT, OR elements are grouped in n groups. Groups numbered k and r contain, respectively, two implication units and three AND-NOT elements. First and m groups additionally contain, respectively, OR element and two AND elements. In r group output of i AND-NOT element, connected by second input to first input of i AND element and output of i AND element, connected by its second input to output of (3-i) AND-NOT element, are connected respectively to inverting and non-inverting inputs of i implication unit. In first group inverting and non-inverting inputs of first implication unit are connected respectively to non-inverting and inverting inputs of second implication unit, first and second inputs of OR element. Output of i implication unit of k group is connected to second input of i element AND-NOT of (k+1) group, while first inputs of first and second AND-NOT elements of r group, first and second inputs of OR element and output of third AND-NOT element of r group, output of OR element form, respectively, r, (n+r), (n+1), first inputs and r, first outputs of device for selecting the greater one of two binary numbers. |
![]() Device has block of registers of first memory, block of registers of second memory, block for controlling reading of columns, block for controlling reading of rows, block for controlling reverse recording; according to second variant, device has same elements excluding block for controlling reverse recording. Third variant of device is different from second variant by absence of block for controlling reading of columns, and fourth variant of device is different from second one by absence of block for controlling reading of rows. |
![]() Device has numeric conversion block for converting numbers to digit-wise signals, block for forming selection strobes, commutator of selection of minimal or maximal number. |
![]() Device has n-1 logic modules, each of which has register, locking and unlocking keys, ROM device. |
![]() Device contains matrix of unary first memory registers and matrix of unary registers of second memory, which are identical to each other. Between them a commutator is positioned. Unary memory registers, positioned conditionally in one row, are connected between each other as shifting row registers. Commutator on basis of law given externally connects output of shifting register of first memory, corresponding to i-numbered row, to input of shifting register of second memory, corresponding to j-numbered row in second memory. After sending a packet of shifting pulses to shifting input of i-numbered shifting register of first memory, information from it moves to j-numbered shifting register of second memory. Therefore, transfer of i-numbered row to j-numbered position in new array occurs. Transfer of rows can be realized row-wise, or simultaneously for all, while structure of commutator is different for different cases. |
![]() Device contains two AND elements, two OR elements, two implicative devices. |
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