RussianPatents.com

Method for encoding sparse parity control code. RU patent 2308803.

Method for encoding sparse parity control code. RU patent 2308803.

FIELD: data encoding methods.

SUBSTANCE: proposed method for encoding sparse parity control code formed from information-section matrix and from parity-section matrix includes steps of information-section matrix conversion into array code structure and assignment of exponent sequences to each column of sub-matrix; extension of two-diagonal matrix corresponding to parity-section matrix so that amount of displacement between diagonals were of random value; enhancement of normalized two-diagonal matrix; evaluation of degree of displacement for cyclic shift of columns in each sub-matrix of higher normalized two-diagonal matrix; and definition of parity symbol corresponding to column in parity control matrix.

EFFECT: enhanced encoding efficiency.

9 cl, 25 dwg, 5 tbl

 


 

IPC classes for russian patent Method for encoding sparse parity control code. RU patent 2308803. (RU 2308803):

H03M13/11 - using multiple parity bits
Another patents in same IPC classes:
Fault-tolerant device Fault-tolerant device / 2297036
Device contains original circuit, four groups of AND elements, group of OR elements, encoding device, folding circuit, register, error syndrome circuit, checks circuit, three decoders, corrector.
Fault-tolerant memorizing device Fault-tolerant memorizing device / 2297035
Device contains memorizing device, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, decoder, inversion block, even parity check circuit, corrector.
Fault-tolerant information storage device Fault-tolerant information storage device / 2297034
Device contains memorizing device, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, inversion block, decoder, even parity check circuit, corrector.
Self-correcting device Self-correcting device / 2297033
Device contains original circuit, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, decoder, corrector.
Self-correcting memorizing device Self-correcting memorizing device / 2297032
Device contains memorizing device, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, inversion block, decoder, corrector.
Fault-tolerant device Fault-tolerant device / 2297031
Device contains original circuit, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, decoder, even parity check circuit, corrector.
Self-correcting information storage device Self-correcting information storage device / 2297030
Device contains memorizing device, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, decoder, inversion block, even parity check circuit, corrector.
Self-correcting device Self-correcting device / 2297029
Device contains original circuit, four groups of AND elements, group of OR elements, encoding device, register, error syndrome circuit, checks circuit, three decoders, corrector.
Self-controlled device Self-controlled device / 2297028
Device contains original circuit, three groups of AND elements, AND element, group of OR elements, OR element, encoding device, register, error syndrome circuit, checks circuit, three decoders.
Self-controlled device Self-controlled device / 2297028
Device contains original circuit, three groups of AND elements, AND element, group of OR elements, OR element, encoding device, register, error syndrome circuit, checks circuit, three decoders.
Self-correcting device Self-correcting device / 2297029
Device contains original circuit, four groups of AND elements, group of OR elements, encoding device, register, error syndrome circuit, checks circuit, three decoders, corrector.
Self-correcting information storage device Self-correcting information storage device / 2297030
Device contains memorizing device, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, decoder, inversion block, even parity check circuit, corrector.
Fault-tolerant device Fault-tolerant device / 2297031
Device contains original circuit, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, decoder, even parity check circuit, corrector.
Self-correcting memorizing device Self-correcting memorizing device / 2297032
Device contains memorizing device, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, inversion block, decoder, corrector.
Self-correcting device Self-correcting device / 2297033
Device contains original circuit, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, decoder, corrector.
Fault-tolerant information storage device Fault-tolerant information storage device / 2297034
Device contains memorizing device, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, inversion block, decoder, even parity check circuit, corrector.
Fault-tolerant memorizing device Fault-tolerant memorizing device / 2297035
Device contains memorizing device, four groups of AND elements, AND element, group of OR elements, seven OR elements, encoding device, register, error syndrome circuit, NOT element, decoder, inversion block, even parity check circuit, corrector.
Fault-tolerant device Fault-tolerant device / 2297036
Device contains original circuit, four groups of AND elements, group of OR elements, encoding device, folding circuit, register, error syndrome circuit, checks circuit, three decoders, corrector.
Method for encoding sparse parity control code Method for encoding sparse parity control code / 2308803
Proposed method for encoding sparse parity control code formed from information-section matrix and from parity-section matrix includes steps of information-section matrix conversion into array code structure and assignment of exponent sequences to each column of sub-matrix; extension of two-diagonal matrix corresponding to parity-section matrix so that amount of displacement between diagonals were of random value; enhancement of normalized two-diagonal matrix; evaluation of degree of displacement for cyclic shift of columns in each sub-matrix of higher normalized two-diagonal matrix; and definition of parity symbol corresponding to column in parity control matrix.
© 2013-2014 Russian business network RussianPatents.com - Special Russian commercial information project for world wide. Foreign filing in English.