RussianPatents.com
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Method for processing with use of one commands stream and multiple data streams. RU patent 2279706. |
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FIELD: engineering of data processing systems, which realize operations of type "one command stream and multiple data streams". SUBSTANCE: system is disclosed with command (ADD8TO16), which decompresses non-adjacent parts of data word with utilization of signed or zero expansion and combines them by means of arithmetic operation "one command stream, multiple data streams", such as adding, performed in response to one and the same command. Command is especially useful for utilization in systems having a data channel, containing a shifting circuit before the arithmetic circuit. EFFECT: possible use for existing processing resources in data processing system in a more efficient way. 3 cl, 5 dwg
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Method and device for parallel conjunction of data with shift to the right / 2273044 Method includes in parallel with shift to left for 'L - M' data elements of first operand having first set of L data elements, second operand is shifted having second set of L data elements, to the right for M data elements, and aforementioned shifted first set is combined with aforementioned shifted second set for producing a result having L data elements. |
Method for processing with use of one commands stream and multiple data streams / 2279706 System is disclosed with command (ADD8TO16), which decompresses non-adjacent parts of data word with utilization of signed or zero expansion and combines them by means of arithmetic operation "one command stream, multiple data streams", such as adding, performed in response to one and the same command. Command is especially useful for utilization in systems having a data channel, containing a shifting circuit before the arithmetic circuit. |
Configurable computing device / 2291477 Device consists of two computing device units, each of them divided into at least four subunits, which consist of a quantity of unit cells. Named units are spatially located so that the distance between unit cell of first unit and equal unit cell in the second unit is minimal. Computing device configuration can be changed using configurational switches, which are installed between device subunits. |
Method and device for parallel conjunction of data with shift to the right / 2273044 Method includes in parallel with shift to left for 'L - M' data elements of first operand having first set of L data elements, second operand is shifted having second set of L data elements, to the right for M data elements, and aforementioned shifted first set is combined with aforementioned shifted second set for producing a result having L data elements. |
Method for processing with use of one commands stream and multiple data streams / 2279706 System is disclosed with command (ADD8TO16), which decompresses non-adjacent parts of data word with utilization of signed or zero expansion and combines them by means of arithmetic operation "one command stream, multiple data streams", such as adding, performed in response to one and the same command. Command is especially useful for utilization in systems having a data channel, containing a shifting circuit before the arithmetic circuit. |
Loading/moving and copying commands for processor / 2292581 Processor contains first logical means for preserving set of bit groups into non-adjacent groups of storage cells and second logical means for storing a copy of a set of non-adjacent bit groups. In accordance to method, set of bit groups is saved to set of non-adjacent storage cells and set of non-adjacent bit groups is copied into remaining groups of bit storage cells. System contains memory and processor for storing first bit group in first and second storage cell groups and for storing second bit group in third and fourth storage cells. Device contains execution module for storing bits [31-0] in positions [31-0] and [62-32], bits [95-64] in positions [95-64] and [127-96] of destination register bits. |
Device for priority servicing of requests / 2320001 Device contains request register, AND element, two OR elements, modulus two addition element, clock impulses generator, control trigger, counter, decoder, switches, additionally incorporated AND element, additionally incorporated OR elements, number of which is equal to capacity of request register. |
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