Method and apparatus for channel encoding and decoding in communication system using low-density parity check codes

FIELD: radio engineering, communication.

SUBSTANCE: invention relates to a communication system which employs low-density parity check (LDPC) codes. The method for channel decoding using a LDPC code includes a step of demodulating a signal transmitted from a transmitter. The method also includes a step of determining positions of punctured parity bits by evaluating information on a predetermined order of sets of parity bits to be punctured and the number of sets of parity bits. Further, data are decoded using said positions of punctured parity bits.

EFFECT: high efficiency of channel encoding/decoding using LDPC codes.

12 cl, 17 dwg, 4 tbl

The technical field

The present invention relates to a communication system that uses codes parity with low density (LDPC). In particular, the present invention relates to a method and device channel coding/decoding for generating LDPC codes with different lengths of the code words and different speeds encoding of the LDPC code specified in the modulation of the highest order.

The level of technology

In wireless communication systems line performance is significantly degraded due to various noise channels, fading and intersymbol interference (ISI). Therefore, in order to realize high-speed digital communication system, which require large bandwidth and high reliability, such as mobile communication systems of the next generation of digital broadcasting systems and portable Internet, it is important to develop technology to overcome channel noise, fading and ISI. Recently conducted extensive research in the field codes with error correction, which are considered as a way to improve the connection reliability through efficient recovery of distorted information.

LDPC code, first presented by Galaeron in the 1960s, eventually lost its appeal because of the complexity associated with the level of technology at that time. However, the since the turbo code, which was opened in 1993, berrou, Glavu and Tetamashimba, provides levels of performance at about the level limit channel Shannon, studies have been conducted iterative decoding and channel coding based on graph analysis and performance characteristics of turbo code. This was the impetus for re-exploring LDPC code at the end of 1990-X. These studies have shown that LDPC code provides performance similar to the limit of the channel Shannon, if the LDPC-code decoding by applying iterative decoding on the basis of the algorithm the sum-product relative to the Tanner graph (a special kind of bipartite graph)corresponding to the LDPC code.

LDPC code is typically represented as a graph, and many features can be analyzed using methods based on graph theory, algebra and probability theory. Typically, the channel model codes in the form of a graph useful for describing the codes, and by comparing the information on coded bits to the vertices in the graph and the mapping relations between bits to the edges of the graph can represent a communication network in which the vertices are exchanging predetermined messages through the fins. Thus, it is possible to derive the natural decoding algorithm. For example, the decoding algorithm,derived from the lattice, which can be considered as some type of graph may include the well-known Viterbi algorithm, and the algorithm of Bahl-Cocke-Jelinek-Raviv (BCJR).

LDPC code is typically determined by the matrix parity, and it can be expressed as a bipartite graph, which is called the Tanner graph. The term "bipartite graph" denotes the graph whose vertices are divided into two different types, and the LDPC code is represented as a bipartite graph that includes vertices, some of which are called variable nodes, while others are called control nodes. Variable nodes one-to-one mapped coded bits.

The way to view the graph for the LDPC code is described below, with reference to figures 1 and 2.

Figure 1 is an illustration of an example of the matrix H₁parity LDPC code that contains 4 rows and 8 columns. Referring to figure 1, because the number of columns is 8, the matrix H₁parity represents an LDPC code, which generates a code word length of 8, and columns one-to-one map 8 coded bits.

Figure 2 is an illustration of a Tanner graph corresponding to the matrix H₁parity with figure 1.

Referring to figure 2, the Tanner graph for the LDPC code includes 8 node variables x₁(202), x₂(204), x₃(206), x₄(208), x₅(210), x₆(22), x₇(214) and x₈(216), and 4 control node 218, 220, 222 and 224. the i-th column and j-th row of the matrix H₁parity LDPC code are mapped to variable node x_iand j-th check node, respectively. In addition, the value of 1, i.e. a non-zero value at the point where the i-th column and j-th row in the matrix H₁parity LDPC code indicates that there is an edge between a variable node x₁and the j-th reference node in the Tanner graph from figure 2.

In the Tanner graph for the LDPC code degree variable node and check node indicates the number of edges attached to each corresponding node, and this degree is equal to the number of nonzero elements in the column or row that matches the specified node in the matrix of the parity check LDPC code. For example, referring to figure 2, the degree of variable nodes x₁(202), x₂(204), x₃(206), x₄(208), x₅(210), x₆(212), x₇(214) and x₈(216) equal 4, 3, 3, 3, 2, 2, 2 and 2, respectively, and the degree of control nodes 218, 220, 222 and 224 is equal to 6, 5, 5 and 5, respectively. In addition, the number of nonzero elements in the columns of the matrix H₁parity with figure 1, which correspond to variable nodes with 2, coincide with their degrees 4, 3, 3, 3, 2, 2, 2 and 2, and the number of nonzero elements in the rows of the matrix H₁parity with figure 1, which correspond to the completed nodes 2, coincide with their degrees 6, 5, 5 and 5.

To Express the degree distribution for nodes of the LDPC code, the ratio of variable nodes with degree i to the total number of variable nodes is defined as f_iand the ratio of the number of control nodes with degree j to the total number of control nodes is defined as g_j. For example, for the LDPC code corresponding to figures 1 and 2, f₂=4/8, f₃=3/8, f₄=1/8 and f_i=0 for i≠2, 3, 4, and g₅=3/4, g₆=1/4 and g_j=0 for j≠5, 6. When the length of the LDPC code is defined as N, i.e. the number of columns is N, and when the number of rows is defined as N/2, the density of nonzero elements in the entire matrix parity with the above distribution of the degree is calculated according to Equation (1).

...(1)

In Equation (1) with increasing N, the density of elements "1" in the matrix parity decreases. In General, LDPC code, since the length N of the code word is inversely proportional to the density of nonzero elements, LDPC code with a large value of N has a very low density of nonzero elements. The term "low density" in the name of the LDPC code is associated with this aspect.

Below, with reference to figure 3, describes the characteristics of the matrix of the parity of a structured LDPC code according to the present invention. Figure 3 is an illustration of a LDPC code, when estomago in the standard 2-Generation Satellite Transmission - Digital Video (Digital Video Broadcasting-Satellite Transmission 2^ndGeneration, DVB-S2), which is one of the European standards for digital broadcasting.

Figure 3N₁andK₁denote the length of the code word and the length (or the length of a data word) LDPC code, respectively, and(N₁-K₁)specifies the length of the parity. In addition, the whole M₁andqare determined so as to satisfy the equalityq=(N₁-K₁)/M₁.Preferably, the value ofK₁/M₁also is the whole. In this document matrix parity with figure 3 for convenience referred to as the first matrix H₁parity.

Referring to figure 3, the structure of the part of the parity, i.e. fragment withKthe first column (N₁-1)-th column in the matrix parity, has a dual-diagonal form. Therefore, with regard to the distribution of degrees in the columns corresponding to the part of the parity, then all columns are of degree 2, except for the last column, which has a level "1".

In the matrix of the parity structure of information, i.e. the fragment with the 0-th column (K₁-1)-th column is generated by application of the following rules.

Rule 1: Generated onlyK /M₁column groups by groupingK₁columns corresponding to an information word in a matrix of parity, in many groups, each of which includesM₁columns. Method for forming columns in each group is determined by the following Rule 2.

Rule 2: First, we determine the position of elements "1" in each of the 0-th column inith column group (wherei=1, ..., K₁/M₁).The degree of the 0-th column in eachith column group is denoted asD_i. If the positions of the columns 1 are$$R_{i\mathrm{,0}}^{(1)}$$,$$R_{i\mathrm{,0}}^{(2)}$$, ...,$$R_{i\mathrm{,0}}^{(D_i)}$$then position$$R_{i\mathrm{,0}}^{(2)}$$(k=1, 2, ...,D_i) row 1 are determined according to Equation (2) inj-th column (where j=1, 2 ..., M₁-1)ith column group.

...(2)

Of the foregoing rules, it follows that the degree of all the columns of theithe second group of columns is equal toD_i. For a better understanding of the structure of the DVB-S2 LDPC code, which stores information about the matrix parity according to the aforementioned rules, the following detailed description of one example.

For example, forN₁=30,K₁=15,M₁=5 andq=3 three sequences for information about the positions of rows with the elements of "1" for 0-th column 3 column groups can be expressed as follows. Thus, these sequences are referred to as "sequences of positions with a weight of 1".

With regard to the sequence of items with a weight of 1 for the 0-th column in each column group, then for each group of columns, only the corresponding sequence positions can be expressed as follows. For example:

0 1 2

0 11 13

0 10 14.

In other words,i-I sequence positions with a weight of 1 onithe second line consistently presents information about the positions of rows with item "1" toithe second group of columns.

You can generate the LDPC code with the concept corresponding to the DVB-S2 LDPC code with figure 4, by forming a matrix of control chenost is through information, appropriate referred to the detailed example and Rules 1 and 2.

It is known that the DVB-S2 LDPC code according to Rule 1 and Rule 2 can be efficiently encoded by structural forms. Below is the example described sequential process steps LDPC coding by matrix parity-based DVB-S2.

In the following description of the DVB-S2 LDPC code withN₁=16200,K₁=10800,M₁=360 & q=15, is subjected to the encoding process. For convenience, the information bits of lengthK_irepresented as(i₀i₁, ..., i_N1-K1-1), and the parity data length(N₁-K₁)represented as(p₀p₁, ..., p_N1-K1-1).

Step 1: LDPC code initializes the parity bits as follows:

p₀=p₁= =p_N1-K1-1=0

Step 2: LDPC-encoder reads the information on the line where the element "1" is set in the column group of the 0-th sequence of items with a weight of 1 among the saved sequences, indicating matrix parity.

0 2084 1613 1548 1286 1460 3196 4297 2481 3369 3451 4620 2622

LDPC encoder updates specific bits ofp_xparity according to Equation (3)using the read information and the first information biti₀.Herexperformance, which provides a value of $$R_{\mathrm{1,0}}^{(k)}$$fork=1, 2, ..., 13.

...(3)

In Equation (3)p_x=p_x⊕i₀can also be expressed asp_x←⊕i₀,where⊕represents the binary sum.

Step 3: LDPC-encoder first finds the value in Equation (4) for the next 359 information bits i_m(wherem=1, 2, ..., 359afteri₀.

{x+(mmodM₁)×q}mod(N₁-K₁), M₁=360,m=1, 2, ..., 359 (4)

In Equation (4)xrepresents the value of$$R_{\mathrm{1,0}}^{(k)}$$fork=1, 2, ..., 13. It should be noted that Equation (4) follows the same concept as the Equation (2).

Next, the LDPC encoder performs an operation similar to Equation (3)using the value obtained in Equation (4). That is, the LDPC encoder updates the$$p_{\{x+(m\mathrm{mod}{M}_1)\times q\}\mathrm{mod}(N_1-K_1)}$$ fori_m. For example, form=1, that is, fori₁LDPC encoder updates the parity bits$$p_{(x+q)\mathrm{mod}(N_1-K_1)}$$according to Equation (5).

...(5)

It should be noted that in Equation (5)q=15. LDPC encoder similarly performs the above process form=1, 2, ..., 359.

Step 4: As in Stage 2, the LDPC encoder reads the information of the 1st sequence$$R_{\mathrm{2,0}}^{(k)}$$(k=1, 2, ..., 13) positions with a weight of 1 to 361-th information biti₃₆₀and updates specificp_xwhere the value ofxequal$$R_{\mathrm{2,0}}^{(k)}$$.LDPC encoder updates the$$p_{\{x+(m\mathrm{mod}{M}_1{}_{})\times q\}\mathrm{mod}(N_1-K_1{}_{})}$$,m=361, 362, ..., 719 by applying Equation (4) for the next 359 information bitsi₃₆₁,i₃₆₂, ...,i₇₁₉afteri₃₆₀.

Step 5: LDPC-encoder repeats Steps 2, 3 and 4 for all groups, each of which has a 360 information bits.

Step 6: LDPC-encoder determines the parity data, using Equation (6).

...(6)

Bitsp_iparity in Equation (6) represent the parity bits that have been subjected to LDPC coding.

As described above, DVB-S2 performs encoding by performing Steps 1-6.

Disclosure of invention

Technical problem

For the application of LDPC code to the actual communication system, this LDPC code shall be arranged to provide a data transmission speed required in a given communication system. In particular, not only in the adaptive communication systems, which uses a Hybrid Automatic Request retransmission (Hybrid Automatic Retransmission Request, HARQ) and Adaptive Modulation and Coding (Adaptive Modulation and Coding AMC)and other communication systems that support different service broadcasting, to support different data transmission speeds according to the system requirements necessary LDPC codes with different lengths of the code words.

However, as described above, LPC code, used in the DVB-S2 system has only two type length code word due to limited use, and each type LDPC code requires independent matrix parity. Accordingly, in the prior art there is a need in the way of support for different lengths of code words, to increase the extensibility and flexibility of the system. So, in the DVB-S2 system for transferring information signaling requires the transmission of data from hundreds to thousands of bits. However, because the length of the DVB-S2 LDPC code is available only two options - 16200 and 64800, still there is a need to support different lengths of code words. In addition, since storage independent matrices of the parity for each length code words LDPC code reduces the overall memory efficiency, there is a need in the scheme, providing effective support for different lengths of the code words from the set of the existing matrix parity, without the need for a new matrix parity.

Technical solution

The purpose of a variant of implementation of the present invention is to solve at least the above problems and/or disadvantages and provide at least the advantages described below. Accordingly, one purpose of the present invention is the provision of a method and device channel coding/da is tiravanija to generate from a given LDPC code, a new LDPC code with a different length code words by applying shortening or puncturing, which is determined based on the modulation of the highest level in the communication system using LDPC codes.

Another objective of the present invention is the provision of a method and device channel coding/decoding, to ensure optimum performance regarding the structure of DVB-S2 in the communication system using LDPC codes.

According to one aspect of the present invention provides a method for encoding a channel in a communication system that uses a code Parity with a Low Density (Low-Density Parity-Check LDPC). This method includes the steps are: determine the number of parity bits for puncturing; share the parity data at predefined intervals and determine the number wikilive parity bits that are gouging in the above-mentioned predetermined intervals; determine the modulation scheme; determine the position wikilive parity bits corresponding to the mentioned specific number wikilive bits in the above-mentioned predetermined intervals, according to the modulation scheme; repeatedly perform gouging wikilive parity bits corresponding to the mentioned specific positions in the above-mentioned predetermined intervals; and transmit the remaining bits except the deleted bits according to the modulation scheme.

According to another aspect of the present invention is provided a device for encoding a channel in a communication system that uses a code Parity with a Low Density (Low-Density Parity-Check LDPC). This unit includes the unit application of the puncturing pattern, designed to determine the number of parity bits for puncturing, the separation of parity bits at predetermined intervals, determine the number wikilive parity bits that are gouging in the above-mentioned predetermined intervals, determine the modulation scheme, for determining the positions wikilive parity bits corresponding to a number wikilive parity bits at predetermined intervals according to the modulation scheme, and to repeatedly execute the puncturing parity bits corresponding to the mentioned specific positions in the above-mentioned predetermined intervals; and a transmitter for transmitting the remaining bits except the deleted bits, according to the above-mentioned modulation scheme.

According to another aspect of the present invention provides a method of decoding a channel in a communication system that uses a code Parity with a Low Density (Low-Density Parity-Check LDPC). This method includes the steps in which: demodulated signal, transmitted the transmitter; determine whether any of the deleted bits parity demodulated signal; determine a position of the deleted bits parity by evaluating information about the puncturing pattern when you have deleted the parity data; and decode the data using the mentioned position of the deleted bits of parity. Information about the template puncturing involves puncturing pattern based on the modulation scheme determined by the transmitter.

According to another aspect of the present invention is provided a device for decoding a channel in a communication system that uses a code Parity with a Low Density (Low-Density Parity-Check LDPC). This device includes a demodulator designed for demodulation of a signal transmitted from the transmitter; the evaluation unit of the puncturing pattern that is designed to determine whether any of the deleted parity bits in the demodulated signal, and to determine the positions of the deleted bits parity by evaluating information about the puncturing pattern when there are deleted parity bits; and a decoder designed to decode data using the mentioned position of the deleted bits of parity. Information about the template puncturing involves puncturing pattern based on the modulation scheme determined by the transmitter

Other aspects, advantages and distinctive features of the present invention will be obvious to experts in the art upon studying the following detailed description in conjunction with the attached drawings.

Beneficial effects

Embodiments of the present invention can generate a separate LDPC code with different length code words by optimizing the performance of encoding/decoding using the information about a given matrix parity, in the communication system, which uses higher order modulation and LDPC codes.

Brief description of drawings

The above and other aspects, features and advantages of certain embodiments of the present invention will be apparent from the following detailed description with the accompanying drawings, in which:

figure 1 - illustration of the example matrix of the parity check LDPC code of length 8;

figure 2 - illustration of a Tanner graph for the matrix of the parity check LDPC code of length 8;

figure 3 - illustration of a DVB-S2 LDPC code;

figure 4 - illustration of the example matrix parity DVB-S2 LDPC code;

figure 5(a) illustration of signal constellation for QPSK modulation used in digital communication system;

figure 5(b) illustrates the signal constellation for 16-QAM modulation used in digital communication system;

figure 5(c) - llustrate the signal constellation for 64-QAM modulation, used in the digital communication system;

6 illustrates a structural diagram of a transceiver in a communication system using LDPC code;

7 is a diagram illustrating an example where the LDPC code with 4 applies a random gouging;

Fig diagram illustrating another example, where the LDPC code with 4 applies deliberate gouging;

Fig.9 is a diagram illustrating another example, where the LDPC code with 4 applies deliberate gouging;

figure 10 - illustration of another example of a matrix parity DVB-S2 LDPC code;

11 is an illustration of an example of a puncturing pattern that is determined based on BPSK or QPSK transmission in LDPC code with figure 10;

Fig is an illustration of an example of a puncturing pattern that is determined based on 16-QAM transmission in LDPC code with figure 10;

Fig is an illustration of an example of a puncturing pattern that is determined based on 64-QAM transmission in LDPC code with figure 10;

Fig - precedence diagram illustrating a method of generating LDPC code with different length code words from the matrix of the parity stored LDPC code according to one variant of implementation of the present invention;

Fig - precedence diagram illustrating a method of LDPC decoding in the receiving device according to one variant of implementation of the present invention;

Fig - structural diagram give the it device, uses deleted/shortened LDPC code, according to one variant of implementation of the present invention; and

Fig - structural diagram of a receiving device that uses the deleted/shortened LDPC code, according to one variant of implementation of the present invention.

In all the drawings the same reference numbers denote the same elements, features and patterns.

Option exercise

The following description in conjunction with the accompanying drawings is intended to explain the embodiments of the present invention, as defined by the claims and its equivalents. It includes various specific details that help to understand the invention. However, these specific details should not be considered only as illustrative. Accordingly, specialists in the art it will be obvious that within the scope and essence of the present invention can be made various changes and modifications of the described embodiments. In addition, a description of known functions and constructions are omitted for brevity and clarity.

The terms and words used in the following description and the claims, is not limited to the bibliographical meanings, and they were used by the present inventor to both is that a clear and consistent understanding of the present invention. Accordingly, specialists in the art it will be obvious that the following description of embodiments of the present invention is provided only for purposes of illustration and not to limit the invention, as defined by the appended claims and its equivalents.

It should be understood that the terms in the singular include the plural, unless the context clearly requires otherwise. So, for example, reference to "a surface component" includes reference to one or more of these surfaces.

First described the difference in the reliability of modulation of the highest order. Unlike communication systems that use only Binary Phase shift Keying (Binary Phase Shift Keying, BPSK) or Quadrature Phase shift Keying (a quadrature Phase Shift Keying, QPSK), when in the communication system that requires LDPC Codes with different lengths of the code words, using the modulation of the highest order, the reliability of the bits constituting the characters modulation of the highest order, have different values.

To explain the difference between reliability in the modulation of a higher order description of the constellations signal for Quadrature Amplitude Modulation (a quadrature Amplitude Modulation, QAM), which is a modulation of the highest order. QAM-modulated symbol consists of a real part and an imaginary part, and different symbols mo is ulali can be generated by differentiating the magnitude and the signs of the real and imaginary parts. QAM is described together with QPSK-modulation to highlight the details of the characteristics QAM.

Figure 5(a) is an illustration of signal constellation for conventional QPSK.

Referring to figure 5(a), y₀determines the sign of the real part, whereas y₁determines the sign of the imaginary part. That is the sign of the real part will be a plus (+) for y₀=0 and the minus (-) for y₀=1. In addition, the sign of the imaginary part will be a plus (+) for y₁=0 and the minus (-) for y₁=1. Since y₀and y₁equal in terms of probability of error, since they represent the bits of the display sign, which indicate the respective signs of the real part and the imaginary part, when QPSK reliability bits (y₀, y₁), corresponding to one modulation signal, is equally important. For y_0,qand y_1,qthe second subscript q indicates the q-th output bits forming the modulation signal.

Figure 5(b) is an illustration of signal constellation for a regular 16-QAM modulation.

Referring to figure 5(b), value (y₀, y₁, y₂, y₃), the corresponding bits of one of the modulation signal, described below. Bits y₀and y₂determine the sign and magnitude of the real part, respectively, while bits y₁and y₃determine the sign and magnitude of the imaginary part, respectively. In other words, ysub> 0and y₁determine the signs of the real part and the imaginary part of the modulation signal, and y₂and y₃determine the magnitude of the real part and the imaginary part of the modulation signal. As to distinguish the sign of the modulated signal is easier than to distinguish the value of the modulated signal, y₂and y₃higher than y₀and y₁in terms of the probability of occurrence of the error. Therefore, in terms of the probability of absence of errors (i.e. reliability) of bits is the following relationship - y₀=y₁>y₂=y_3.That is, bits (y₀, y₁, y₂, y₃)forming the signal QAM modulation, in contrast to signal QPSK have different reliability.

When 16-QAM modulation among the 4 bits constituting the signal, and 2 bits determine the signs of the real part and the imaginary part of the signal, and the remaining bits are only required to determine the magnitude of the real part and the imaginary part of the signal. Thus, the magnitude (y₀, y₁, y₂, y₃and the role of each bit is subject to change.

Figure 5(c) is an illustration of the constellation signals for normal 64-QAM modulation.

Among (y₀, y₁, y₂, y₃, y₄, y₅), the corresponding bits of one of the modulation signal, the bits of y₀, y₂and y₄determine the magnitude and sign of the real part, and y bits 1, y₃and y₅determine the magnitude and sign of the imaginary part. So, y₀and y₁determine the signs of the real part and imaginary part, respectively, and the combination of y₂andy₄and the combination of y₃and y₅determine the magnitude of the real part and imaginary part, respectively. As to discern the signs of the modulated signal is easier than to distinguish the magnitude of the modulated signal, the reliability of y₀and y₁higher than the reliability of y₂, y₃, y₄and y₅. Bits y₂and y₃determined depending on whether more or less than the magnitude of the modulated symbol than 4, and the bits of y₄and y₅determined according to the closer if the magnitude of the modulated symbol to the value 4 or 0, where the value 2 is located between them, or to the value 4 or 8, where the value of 6 is located between them. Thus, the range in which the value is determined by y₂and y₃is 4, whereas the range for y₄and y₅is 2. In the result, y₂and y₃higher reliability than y₄and y₅. In conclusion, in terms of the probability of absence of errors (i.e. reliability) of bits is the following relationship - y₀=y₁>y₂=y₃>y₄=y₅.

When 64-QAM modulation among the 6 bits forming signal is l, 2 bits determine the signs of the real part and the imaginary part of the signal, and the remaining 4 bits are required only to determine the magnitude of the real part and the imaginary part of the signal. Thus, the magnitude (y₀, y₁, y₂, y₃, y₄, y₅and the role of each bit change. In addition, in the constellation of the signal at 256-QAM or higher role and reliability of the bits forming the modulation signal, are different, as described above. A detailed description of this case is omitted.

Therefore, embodiments of the present invention provide a method and apparatus to support LDPC codes with different lengths of the code words, suitable for modulation of the highest order, using the matrix parity structured LDPC code of a certain type. In addition, the present invention provides a device to support different lengths of the code words according to the modulation of the highest order in the communication system, which uses LDPC code of a particular type, and method for operating such a device. In particular, the present invention provides a method for generating LDPC code, using the matrix of the parity of a given LDPC code, where the generated LDPC code is shorter in length than a given LDPC code, and the appropriate device.

6 is a block diagram premobilization communication system, which uses LDPC code.

Referring to Fig.6, the messageuintroduced in LDPC-encoder 611 in the transmitter 610 to perform transmission to the receiver 630. LDPC encoder 611 encodes the entered messageuand outputs the coded signalcin the modulator 613. Modulator 613 modulates the encoded signalcand transmits the modulated signalsin the receiver 630 through a wireless channel 620. The demodulator 631 in the receiver 630 demodulates the received signalrand outputs the demodulated signalxin LDPC decoder 633. LDPC decoder 633 finds assessment

u

messages on the basis of data received through a wireless channel 620 by decoding the demodulated signalx.

Using a predefined scheme, LDPC encoder 611 generates a matrix of parity according to the length of the code words necessary for communication systems. In particular, according to one variant of implementation of the present invention LDPC encoder 611 can support different length code words, using the aforementioned LDPC code without the need for additional stored information.

According to one variant of implementation of the present invention in the process for different lengths of the code words of a given LDPC code is used, the method of reducing and/or method of puncturing. The term "gouging" means the method, according to which the specified h is here LDPC code word is not transmitted after generation of the code word of the LDPC given a particular matrix parity by performing LDPC encoding. Accordingly, the receiver determines that the uncommitted bits have been removed.

For explanation of the method of puncturing below, with reference to figure 3, detail matrix parity DVB-S2 LDPC code.

The total length of the matrix parity for DVB-S2 LDPC code illustrated in figure 3, is equal toN₁the initial part corresponds to the information bits (i₀,i₁, ...,i_K1-1) and has a length ofK₁and the rear part corresponds to bits (p₀,p₁, ...,p_K1-1) parity and has a length (N₁-K₁).

Usually gouging can be applied to the information bits, and the bits of parity. Although gouging and reduction usually reduce the length of code words, gouging in contrast to the reduction does not restrict the values of specific bits. According to the method of puncturing specific information bits, or a specific portion of the generated parity bits are simply not transmitted so that the receiver can delete the appropriate bits. In other words, by failing to perform transmission of the bits inN_ppredetermined positions in the generated LDPC code word of lengthN₁gouging can provide the same effect as when passing LDPC code word length (N₁-N_p). Since all the columns that correspond to the to it, put out in the matrix of the parity used in its original form in the decoding process, the gouging is clearly different from the reduction.

Additionally, since the position information for the deleted bits may be disseminated or jointly evaluated by the transmitter and receiver when the system is configured, the receiver can simply delete the corresponding deleted bits before decoding.

According to the method of puncturing, because the length of the code words that the transmitter actually transmits equal toN₁-N_pand the length of the information word is constantly equal toK₁the code rate is equal toK₁/(N₁-N_p)that is always greater than the first specified code rateK₁/N₁.

Below is a description of the method of reduction and puncturing method, which is suitable for DVB-S2 LDPC code. DVB-S2 LDPC code, as described above, represents an LDPC code with a specific structure. Accordingly, compared with conventional LDPC codes for DVB-S2 LDPC code may be more efficient to reduce and gouging.

Below, with reference to figure 4, provides a detailed description of the characteristics of the DVB-S2 LDPC code, applies to gouging. It should be noted that for DVB-S2 LDPC code from figure 4,N₁=30,K₁=15,M₁=5 andq=3, and consequently the amount of items with a weight of 1 for the 0-th column in the three groups of columns are expressed as follows:

0 1 2

0 11 13

0 10 14

i-I sequence positions with a weight of 1 oni-m column sequentially represents the information about the positions of rows with item "1" inith column group.

7 is an illustration of example, where the LDPC code with 4 applies a random gouging. Because parity bits, wycliffite 7, are subjected to a removal process in the decoder, the deleted bits parity compared to other undeleted bits do not provide a greater effect of improving performance in the process LDPC-decoding, which reduces their reliability. Therefore, other bits are directly connected with the deleted bits parity with low reliability are also subject to reduction of productivity in the decoding process. The greater the number of edges connected with beats that wycliffite on the Tanner graph, the stronger is expressed, the reduction effect of increasing productivity.

For example, 7 0-th information bit corresponding to the 0-th column is directly connected to the deleted parity twice, 3rd of information bits corresponding to the 3rd column is directly connected to the deleted parity once, and 8 data bits corresponding to the 8-th column is directly connected to the deleted parity three times In this case, 3rd, The 0-th and 8-th information bits are superior in the effect of increasing productivity in the decoding process. In other words, when the degree of variable nodes are equal to each other, the effect of increasing the performance decreases with increasing number of United deleted bits.

From Fig.7, it follows that the number of the deleted parity bits, which are directly connected to respective information bits are random value into force of the random nature of the puncturing pattern. Therefore, there is a high probability that the reliability of the relevant information bits will also be random variables. In other words, along with the fact that some of the information bits can get higher than is actually necessary, the performance of decoding, other data bits may be subjected to significant performance degradation. This pattern of random puncturing can lead to significant irregularities reliability information bits in the decoding process.

Fig is an illustration of a second example, where the LDPC code with 4 applies deliberate gouging. More specifically, in the example Fig applies to non-random puncturing pattern of a particular form.

Referring to Fig, although uses the I with respect to non-random puncturing pattern, connection with the information bits can be largely irregular according to the corresponding puncturing pattern. Non-random puncturing pattern with pig may be more irregular compared with random puncturing pattern with 7.

In the case of LDPC code matrix parity with the concrete structure, such as a DVB-S2 LDPC code, the connection between the information bits and bits parity deleted according to the puncturing pattern, can fluctuate significantly.

Embodiments of the present invention offer a puncturing pattern that provides stable performance of the decoding by the maximum suppress irregularities in the reliability information bits in the decoding process, using the structural characteristics of the DVB-S2 LDPC code.

Figure 9 is an illustration of a third example, where the LDPC code with 4 applies deliberate gouging. In the example of figure 9 to the matrix parity with 4 applies the puncturing pattern that provides a constant interval in a 3 element between wycliffite bits parity because the q-value, which is one of the constituent variables equal to 3. As shown in Fig.9, each information bit is evenly twice connected with the deleted bits.

The irregularity between gouged out bi the AMI and information bits is decreasing, when the interval between the deleted bits parity is set according to the value ofqthat due to the structure of DVB-S2 LDPC code. This is described in detail with reference to figure 3.

Referring to Rule 1 and Rule 2, and figure 3, the position of elements "1" in the first column in a corresponding column group to determine the position of elements "1" in the other columns. The indices of rows, where the element "1" is set in the other columns differ from the index of the row where the element "1" is set in the first line, exactly multiplierqrelatively module(N₁-K₁)whereN₁indicates the length of the LDPC code word, andK₁indicates the length of the information word. More specifically, the index of the row where the element "1" is set in two consecutive columns in a column differ from each other by exactly the value ofqthe module's(N₁-K₁).

Another feature of DVB-S2 LDPC code is associated with pediatrica, the relevant part of the parity check matrix of the parity. Referring to figure 3, the portion of the parity has the structure of a triangular matrix in which the element "1" is present in all diagonal parts, and in this structure,ith parity bit corresponds to the element "1", located in thei-th row.

Given the structural characteristics of the DVB-S2 LDPC code, assuming that wycliffite specific parity bits, if gouging parts parity is repeated exactly at intervalsqthe number of information bits ribs connected with bits parity deleted in a specific column group has a maximum regularity. For example, assuming thatith parity bit wycliffite for0≤i<qand(i+kq)th parity bit repeatedly wycliffite for0≤k<M₁information bits connected withi-m parity indicates that the item is "1" exists in thei-th row for the column corresponding to the corresponding information bit. Therefore, the element "1" exists in the(i+kq)-th row in the column corresponding to the information bit, which is separated from the upstream information bits onkelements among the columns in the column group pursuant to Rule 1 and Rule 2. Accordingly, the information bit is connected with put out(i+kq)the first bit.

For DVB-S2 LDPC code, because the degree of variable nodes corresponding to a information word are equal to each other in one column group, and when applying the puncturing pattern with a periodicity of q in one row of information bits corresponding to the same column group are connected with the same number of the deleted bits. Therefore, the connection between gouged out the bits and information bits become regular, and in the decoding process can be expected stability.

As described above, for DVB-S2 LDPC code, a method of puncturing with a period ofqcould have beneficial effect to improve performance through the use of structural characteristics of DVB-S2 LDPC code. However, relatively optimized puncturing pattern based on puncturing with period q, at present known only to the results obtained by setting BPSK or QPSK.

In addition to the method of puncturing with a period of q there are ways that can optimize the performance according to the coding rate or the length of the code word, when the General LDPC code is applied to reduce or gouging. However, because the known methods of search template reduction/puncturing perform the optimization process only considering BPSK or QPSK, for a given LDPC code can be only one optimized template reduction/puncturing.

However, optimized puncturing pattern/reduction obtained when using higher modulation order and the definition of the schema mapping constellation of signal bits (matching bits constellation signal)may differ from the corresponding template for BPSK or QPSK.

When BPSK or QPSK modulation, because the reliability of the bits constituting the symbol equal, reliability bits of the code word will be equal to the code word of the LDPC after it undergoes reduction or gouging, so there is no need to consider the modulation scheme in the search template reduction/puncturing. However, as described above, when the higher order modulation such as 16-QAM, 64-QAM or 256-QAM, since the reliability of the bits forming a symbol differ when determined by the modulation scheme of the highest order and schema mapping constellation of signal bits, reliability bits of the code word in the code word of the LDPC after applying shortening or puncturing may differ from reliability to the application of puncturing or shortening.

Figure 10 is an illustration of another example of a matrix parity DVB-S2 LDPC code.

Figure 10N₁=40, K₁=10,M₁=5 andq=6and the sequence of items with a weight of 1 for the 0-th columns in two column groups of the information word are expressed as follows:

0 5 10 20 25

7 15 26

i-I sequence positions with a weight of 1 oni-m column sequentially represents the information about the positions of rows with item "1" inith column group.

Referring to figure 10, the degree of each column corresponding to the first group of columns equal to 5, and the degree of each column, with the subsequent second group of columns, equal 3. Usually for the LDPC code, the effect of improving performance in the decoding process has a higher value with increasing degrees. Accordingly, it is expected that the performance after decoding, the bits corresponding to the first column group is higher compared with the second group of columns.

Below, with reference to 11, a brief description of the puncturing pattern, which is suitable when BPSK or QPSK modulation is applied to the LDPC code matrix parity with figure 10. Figure 11 y₀and y₁indicate each BPSK symbol or indicates two bits forming one QPSK symbol. Therefore, y₀and y₁have equal reliability in the signal constellation.

Referring to 11, after puncturing the parity bits corresponding to the 5-th column in pegmatite corresponding random bit parity, one parity bit wycliffite four times with a period ofq.Thus, the data bits that correspond to the columns of degree 5, is connected with the deleted bits parity 2 ribs, and data bits that correspond to the columns of degree 3, not connected with the deleted bits parity on the Tanner graph.

Usually bits, United with many of the deleted bits are low effect of increasing productivity in the decoding process. However, on 11 columns extent 5 they shall have 3 fins, which is not connected with the deleted bits, so performance may not be reduced during the decoding process. In addition, since the information bits in the columns of degree 3 is not directly connected to the deleted bits parity in the decoding process may not occur in a significant degradation of performance.

Here it is assumed that the columns of degree 5 more than columns of degree 3 in terms of the effect of increasing productivity in the decoding process. However, this assumption is true only for BPSK or QPSK, and it is not applicable for modulation of the highest order in all cases.

For example, as shown in Fig, modulation 16-QAM can be applied to the LDPC code matrix parity with figure 10. Referring to Fig, y₀and y₁indicate the bits with high reliability, which determine the signs of the real part and the imaginary part of the symbol, 16-QAM, respectively. That is, the ratio of reliability for these bits is defined as y₀=y₁>y₂=y₃.

Referring to Fig, columns, grade 5 are mapped to y₃and the columns of degree 3 are mapped to y₁. In other words, the columns of degree 5 are mapped with a bit less reliable, and the columns of degree 3 are mapped to a bit with a higher reliability in the signal constellation.

In this case, not ESA to say, that the columns of degree 5 have a greater effect of increasing productivity in the decoding process. This is due to the following. Taking into account the characteristics of the 16-QAM modulation, because the columns of degree 5 are mapped information with less reliability in the signal taken from the channel, increasing their reliability is very slow in the decoding process. On the other hand, the columns of degree 3, although they have a lesser degree, are mapped information is less reliable, so that the effect of increasing reliability is very fast.

As described above, it is impossible to guarantee that the bits that correspond to the columns of the highest degree, will always have the best performance in the LDPC code, applies to the modulation of the highest order.

Referring to Fig, in one implementation, after puncturing the parity bits corresponding to the 4-th column in pegmatite corresponding random bit parity, one parity bit wycliffite four times with a period ofq.Thus, the data bits in the columns of degree 5 and columns of degree 3 are connected with the deleted bits through one edge in the Tanner graph.

In the puncturing pattern used figure 11, the deleted bits are connected only to the columns of degree 5, because the effect of increasing the performance of the columns of degree 5 has a high level when BPSK QPSK-modulation. However, in the puncturing pattern shown in Fig, the deleted bits are uniformly distributed, taking into account the difference between the reliability corresponding to each group of columns in the modulation scheme. The analysis of this case shows that because the columns of degree 5 is connected to only one bit put out, there is a high probability that significant performance degradation will be no more. In addition, although the columns of degree 3 are connected with one pulled out a bit, they match the information with high reliability of the received signal, so that there is a high probability that significant performance degradation will not.

Similarly, even when a 64-QAM modulation is applied to the LDPC code matrix parity with figure 10, as shown in Fig, the characteristics may differ from the characteristics for BPSK, QPSK and 16-QAM. Referring to Fig, y₀and y₁indicate the bits with high reliability, which determine the signs of the real part and the imaginary part of the symbol is 64-QAM, respectively. Relative reliability between these bits is defined as y₀=y₁>y₂=y₃>y₄=y₅.

Fig is an illustration of one example of a puncturing pattern based on parity bits corresponding to columns of degree 2. On figa for 16-QAM although the deleted bits parity only 3 bits are connected to bits y ₂and y₃least reliable, as the information bits corresponding to the columns in the grade 5 or grade 3, have good performance, the performance degradation may not occur. However, Fig, which uses 64-QAM, wheny₄and y₅connected too many parity bits, with a very low reliability may be degraded. Therefore, the reliability of the corresponding bits parity should also be considered.

Referring to Fig and 13, it should be noted that when the length of the code word LDPC code is reduced due to the reduction or puncturing, orders of bits corresponding to the constellation of the signal are equal, but the bits are reduced with a predetermined coefficient. For example, on Fig and 13 for LDPC-code orders (y₃, y₁, y₀, y₂, y₁, y₃, y₂, y₀) and (y₅, y₁, y₃, y₄, y₀, y₂, y₃, y₅, y₁, y₂, y₄, y₀) bits corresponding to the constellation of the signal is preserved, but the bits corresponding to each constellation of the signal is reduced in proportion to the length of the LDPC code word.

As shown in figure 10, 11, 12 and 13, it can be expected that the same puncturing pattern can be changed according to the modulation scheme. That is, when for a given LDPC-adapelene the modulation scheme of the highest order and schema mapping constellation of signal bits, the optimal puncturing pattern is changed according to the connection between the deleted bits and navicularii bits. Thus, the modulation must be applied to different puncturing patterns to minimize the performance degradation caused by gouging.

The General process for applying the above-described puncturing scheme can be reduced to the following 5 stages. For convenience in the following description it is assumed thatN₁indicates the length of the LDPC code words, each group of columns contains theM₁columns and gouging are N_pparity bits. Following the puncturing process is illustrated in Fig.

Stage 1 Puncturing

The transmitting device generates an existing abbreviation/unabridged code word DVB-S2 LDPC to step 1301.

Stage 2 Puncturing

The transmitting device determines the number ofN_pparity bits for puncturing at step 1303 and defines

$$A=\lfloor \frac{N_p}{M_1}\rfloor$$

at step 1305, where

the x is

represents the maximum integer that is less than or equal tox.

Step 3 Puncturing

At step 1307, the sending device is istwo defines the bits of p_i0p_i1, ..., p_iA-1parity, which should be subjected to gouging for0≤x<Aand0≤i_x<q. It is assumed that0≤x<qi_xwere previously identified with regard to the performance of (here set againstA≤q).

Step 4 Puncturing

At step 1307 the transmitting device applies gouging all bits parity$${\rho }_{i_k+kqB}$$for0≤x<Aand0≤k<M₁. Here the constantBis a preset non-zero whole.

Step 5 Puncturing

At step 1307 the transmitting device additionally pokes out parity bits$${\rho }_{i_{\lambda }+kqB}$$for0≤k<N_p-AM₁. Next, at step 1309 the transmitting device transmits all the bits, except the deleted bits.

Obviously, the puncturing pattern can be accurately determined when we know the number ofN_pthe bits that you want to poke out,i_xdetermining information sequence, and the value ofq.

For detailed descriptions of examples in which vysheupomjanutye puncturing is performed according to the modulation schemes, in Table 1A and 1B shows less than optimal (i.e. suboptimal) puncturing patterns for DVB-S2 LDPC code, whereN₁=16200,K₁=7200,M₁=360 Andq=25. The following steps detail the process of selecting suboptimal templates puncturing.

In Table 1A and Table 1B(p₀p₁p₂, ..., p₈₉₉₉)okazywane all parity bits DVB-S2 LDPC code, which numbered in the same row.

0≤Np<9000

For a value of$$m=\lfloor \frac{Np}{36}\rfloor$$taking all parity bits corresponding tomsets parity bitsPπ(0),Pπ(1), ...,Pπ(m-1)and in addition to taking(Np-360m)parity bits among parity bits corresponding toPπ(m).Here πdenotes the permutation function, which is a puncturing pattern, and the parity data corresponding to the sets of parity bits, shown in the lower part of the table.

Referring to Table 1A and Table 1B, it can be noted that when determining the length of the parity bits that need to be deleted, the process of puncturing based on suboptimal templates puncturing is performed by a predetermined process, regardless of the modulation scheme, but the relationship between permutations, pointing optimized puncturing patterns differ according to the modulation schemes. That is, when the method of puncturing is applied without taking into account the modulation scheme, depending on the modulation schemes can have significant degradation of performance.

It is obvious that in the process of puncturingAM₁parity bits wycliffite on phase 3 of the Puncturing and Stage 4 Puncturing, and(N_p-AM₁)parity bits wycliffite in Step 5, Puncturing, wycliffite justN_pparity bits.

Suboptimal puncturing patterns shown in Table 1A and Table 1B, may not be unique under the terms of the search templates puncturing. Because in the process of selecting templates puncturing possible different choices that will be described below, may be there are many template is in puncturing, which provide good performance. In fact, the puncturing patterns shown in Table 2A and Table 2B, can also provide very good performance, similar to those which provide templates puncturing with Table 1A and Table 1B.

Table 2A
The main variables DVB-S2 LDPC code	N1=16200,K1=7200,M1=360,q=25
Grouping bits parity	To determine the set ofPisatisfying the following characteristics for 0≤j<q=25: Pj={pk|t≡jmod 25,0≤k<9000}. SetPjcontains 360 parity bits as elements.
The rangeNp	Method of puncturing
0≤Np<9000	For a value of$$m=\lfloor \frac{Np}{360}\rfloor$$taking all parity bits corresponding tomsets parity bitsPπ(0),Pπ(1), ...,Pπ(m-1)and on the additional poking (Np-360m)parity bits among parity bits corresponding toPπ(m).Here πdenotes the permutation function, which is a puncturing pattern, and the parity data corresponding to the sets of parity bits, shown in the lower part of the table.

A method of mapping bits corresponding to the signal constellations used for 16-QAM and 64-QAM modulations of Table 2A and Table 2B provides the results obtained by applying the same mapping schemas bits that were illustrated in Fig and 13.

Code word DVB-S2 LDPC passed after puncturing, is restored to the original shape of the received signal in the receiving device, where the decoding process according Fig.

Fig is a precedence diagram illustrating a method of receiving in the receiving device according to one variant of implementation of the present invention.

Referring to Fig, at step 1401 the receiving device determines or estimates the template puncturing/shortening of the received signal. Next, at step 1403 the receiving device determines whether any of the deleted or shortened bits. If the deleted or shortened bits are missing, the receiving device performs the decoding at step 1409. However, when there are deleted or shortened bits, at step 1405 the receiving device provides a template puncturing/shortening in LDPC-encoder 1560, which is described below with reference to Fig.

At step 1407 LDPC encoder 1560 determines that the deleted bits are deleted bits, and determines that ereatest, the magnitude of reduced bits will be zero (0), is equal to 1. After that, at step 1409, the LDPC encoder 1560 performs decoding.

In the process of puncturing is applied gouging with period q to stabilize the performance of the DVB-S2 LDPC code, using the structural characteristics of the DVB-S2 LDPC code.

The main difference between the present invention and the existing prior art is that this takes into account the reliability of the modulation scheme of the transmission when determining the parity bits that need to be deleted in Step 3 Puncturing. The following is an example of the procedure of selection of the sequence to determine the bits that should be deleted in DVB-S2 LDPC code in Step 3 Puncturing 3. Following the procedure of choice may change when it is applied to other LDPC codes.

Process 1 Choice

First, we determine the bits that are connected with a smaller number of information bits, if possible.

Process 2 Select

Of parity bits that are defined in the Process 1 Choice, determined by the parity bits that reflect the asymptotic performance is made by a method of analysis of the evolution of the density, which is considered as the modulation scheme and the distribution of the degree.

Process 3 Select

On the basis of parity bits, which are subject to you is to alavanyo and identified in the Process 2 Choices, The Selection process 1 and Process 2 Select apply to all bits that should be deleted, except those already selected bits.

Usually when the number ofN_pbits that should be deleted, varies greatly, the puncturing patterns that are optimized based on the value ofN_pmay not have any correlation with respect to each other. In other words, in a system where the value ofN_pvaries greatly, for optimum performance, all templates puncturing optimized on the basis of the value ofN_pshould be stored separately.

However, although the puncturing patterns obtained by applications of the above selection procedures do not guarantee optimal performance in all cases, they will provide a relatively stable performance of the same puncturing pattern with the regular rule, irrespective of the value ofN_p, resulting in a relatively stable performance and easy storage of puncturing patterns.

For example, if orders wikilive bits set asP₁P₂,...,P_q,can be saved only one sequence that specifies the order parity bits to provide effective gouging for a random variableN_pon what redstem Stages Puncturing from 1 to 5.

Method of puncturing can provide improved encoding speed, because it may change the length of the LDPC code word and to reduce the length of code words without changing the length information. Preferably, gouging and reduction can be used together to provide the code rate and the length of the code words, which are required in the system.

Assuming that the length of the code word length information of the LDPC code, which must be obtained from a given LDPC code with lengthN₁code words and the length ofK₁information by cutting and puncturing equal toN₂andK₂accordingly, if the definition ofN₁-N₂=Nand K₁-K₂=K LDPC code with lengthN₂the codeword length and K₂information can be generated by reduction of K bits and puncturing N_p(=N-K) bits from the matrix of the parity of a given LDPC code. If the generated LDPC code for N>0 or K>0, because the code rate is equal to

$$\frac{K_1-K_{\Delta }}{N_1-N_{\Delta }}$$

the length of the puncturing and length contraction can be expressed as N₂and $$\frac{K_1-K_{\Delta }}{N_1-N_{\Delta }}$$.

Fig is a block diagram of the transmitting device that uses the deleted/shortened LDPC code, according to one variant of implementation of the present invention.

Referring to Fig, the transmitting device includes a controller 1510, block 1520 application template reduction, block 1540 extraction matrix parity for the LDPC code, LDPC encoder 1560 and block 1580 use of the puncturing pattern.

Block 1540 extraction matrix parity for LDPC code extracts the matrix of the parity check LDPC code, which was subjected to reduction. The matrix of the parity check LDPC code can be retrieved from memory, can be set in the transmitting device or may be generated by the transmitting device.

The controller 1510 controls the block 1520 application template reduction, to determine the pattern of reduction according to the length information. Block 1520 application template reduction inserts bits with value 0 in the positions corresponding to the shortened bits, or removes columns corresponding to the reduced bits from the matrix of the parity of a given LDPC code. The above template sacramentary to be determined by extracting the template reduction from memory by generating template cuts through the sequence generator (not shown) or by obtaining the template reduction by algorithm analysis of the evolution of the density matrix of the parity and the specified length information.

Block 1520 application template reduction is an optional unit, when the reduction is not required for a given code. In addition, the controller 1510 controls the block 1580 applying the puncturing pattern to determine and apply the puncturing pattern according to the modulation scheme and the length wikilive bits.

Block 1580 applying the puncturing pattern determines the number of parity bits for puncturing, separates the parity bits at predetermined intervals, determines the number wikilive bits that are gouging at predetermined intervals, and determines the modulation scheme determines the position wikilive parity bits corresponding to the mentioned specific number wikilive bits, in the above-mentioned predetermined intervals, and repeatedly applies gouging referred to wycliffism bits parity corresponding to the mentioned specific positions in the above-mentioned predetermined intervals. Mentioned predetermined intervals determined by dividing the length of the parity bits for the length of one group of columns in the matrix parity.

The remaining bits except the deleted bits are transmitted to the receiver according to the modulation scheme via a transmission unit (not showing the n).

LDPC encoder 1560 performs coding based on LDPC code, which has been subjected to reduction by means of the controller block 1510 and 1520 application template reduction.

Fig is a block diagram of a receiving device according to one variant of implementation of the present invention, in which the signal is received, transmitted from a communication system using deleted/reduced DVB-S2 LDPC code, and the user data is restored.

Referring to Fig, the receiving device includes a controller 1610, block 1620 definition/evaluation template shortening/puncturing, the demodulator 1630 and LDPC decoder 1640.

The demodulator 1630 receives and demodulates reduced/deleted LDPC code, and provides the demodulated signal in block 1620 definition/evaluation template shortening/puncturing and LDPC decoder 1640.

Under the control of the controller block 1610 1620 definition/evaluation template shortening/puncturing determines or assesses information about the template puncturing/shortening LDPC code from the demodulated signal and delivers the position information of the deleted/reduced bits in the LDPC decoder 1640. Block 1620 definition/evaluation template shortening/puncturing can determine or estimate the pattern of puncturing/shortening by extracting the template puncturing/shortening from memory, by generating template vakalevu the Oia/abbreviations using a previously implemented method of generating, or by obtaining a template puncturing/shortening, using the algorithm of analysis of the evolution of the density matrix of the parity and the specified length information. LDPC decoder 1640 performs processing of deleting the deleted bits and performs decoding.

When the transmitting device applies as reducing and gouging, block 1620 definition/evaluation template shortening/puncturing in the receiving device may first execute the determination/estimation of the template reduction may first execute the determination/estimation of the puncturing pattern or can directly execute the determination/estimation and template reduction, and the puncturing pattern. Block 1620 definition/evaluation template shortening/puncturing determines the presence/absence of the deleted bits in the demodulated signal. When there are deleted bits, block 1620 definition/evaluation template shortening/puncturing determines the position of the deleted bits parity by evaluating information on the puncturing pattern.

LDPC decoder 1640 decodes the data using the defined position of the deleted bits parity with the assumption that the probability that the deleted bits are equal (0), and the probability that the deleted bits are equal to 1, is equal to 1/2. Since the probability that the value of reduced bits will be null and, equal to 1 (i.e. 100%), LDPC decoder 1640 determines whether it is to participate shortened bits in the decoding operation, in dependence on a value of 1 to the probability that the shortened bits will be zero. When LDPC decoder 1640 receives information about the length of the DVB-S2 LDPC code, reduced through block 1620 definition/evaluation template shortening/puncturing, it restores the user data from the received signals.

As described above with reference to Fig, the reduction is performed on the input stage LDPC-encoder 1560, and gouging is performed on the output stage LDPC-encoder 1560. However, in the receiving device illustrated in Fig to implement decoding, LDPC decoder 1640 should be taken as information about gouging, and information on the reduction.

Although the present invention has been illustrated and described with reference to specific embodiments of, specialists in the art it will be obvious that it can be made various changes in form and detail within the scope and essence of the present invention, as defined by the appended claims and its equivalents.

1. The method of decoding of the channel code parity with low density (LDPC)containing phases in which:
demodulator the signal transmitted from the transmitter; determine the position information of the deleted bits parity by evaluating information about a predefined order sets of parity bits that you want to poke out, and the number of sets of parity bits; and
decode data using the mentioned position of the deleted bits parity
moreover, the definition information of the position of the deleted parity bits includes the steps are:
determine the number of parity bits that you want to poke out;
determine the number of sets of parity bits that you want to poke out, on the basis of a certain number of parity bits that need to be put; and
receive a predefined order sets of parity bits.

2. The method according to claim 1, wherein the predefined order sets of parity bits that need poking, defined as 6, 4, 13, 9, 18, 8, 15, 20, 5, 17, 2, 22, 24, 7, 12, 1, 16, 23, 14, 0, 21, 10, 19, 11, 3, when the length of the codeword is 16200, and length information is 7200, and the modulation scheme is 16QAM.

3. The method according to claim 1, wherein the predefined order sets of parity bits that need poking, defined as 6, 15, 13, 10, 3, 17, 21, 8, 5, 19, 2, 23, 16, 24, 7, 18, 1, 12, 20, 0, 4, 14, 9, 11, 22, when the length of the codeword is 16200, and length information is 7200, and the modulation scheme is 64QAM.

4. The method according to claim 1, additionally containing a stage, on which:
additionally determine a position the rest of the deleted bits parity when the number of the deleted bits is not a multiple of the number of sets of parity bits.

5. The method according to claim 1, in which the number of sets of parity bits are determined by the equations below:
$$A=\lfloor \frac{N_p}{M_1}\rfloor$$,
whereAindicates the number of sets of parity bits for puncturing,N_pindicates the number of parity bits for puncturing,M₁indicates the number of bits in one set of parity bits.

6. The method according to claim 1, in which the sets of parity bits form by the equations below:
P_j={p_k|j≡kmodq0≤k<N₁-K₁},
whereP_jdenotesjthe set of parity bits,N₁indicates the length of the LDPC code word,K₁indicates the length of the information word,M₁indicates the number of bits in one set of parity bits,qis the value that satisfiesq= (N₁-K₁) /M₁whereK₁/M₁is an integer, and0 ≤ j < q.

7. The device for decoding the channel code parity with low density (LDPC)containing
demodulators demodulation signal, transmitted from the transmitter;
the evaluation unit of the puncturing pattern to determine the position information of the deleted bits parity by evaluating information about a predefined order sets of parity bits that you want to poke out, and the number of sets of parity bits; and
a decoder for decoding data using the mentioned position of the deleted bits parity
moreover, the definition information of the position of the deleted bits parity contains:
the determination of the number of parity bits that you want to poke out;
determine number of sets of parity bits that you want to poke out, on the basis of a certain number of parity bits that need to be put; and
receiving a predefined order sets of parity bits.

8. The device according to claim 7, in which a predefined order sets of parity bits that need poking, is defined as 6, 4, 13, 9, 18, 8, 15, 20, 5, 17, 2, 22, 24, 7, 12, 1, 16, 23, 14, 0, 21, 10, 19, 11, 3, when the length of the codeword is 16200, and length information is 7200, and the modulation scheme is 16QAM.

9. The device according to claim 7, in which a predefined order sets of parity bits that need poking, is defined as 6, 15, 13, 10, 3, 17, 21, 8, 5, 19, 2, 23, 16, 24, 7, 18, 1, 12, 20, 0, 4, 14, 9, 11, 22, when the length of the codeword is 16200, and length information is 7200, and the modulation scheme is 64QAM.

10. Give the TWT according to claim 7, in which the evaluation unit of the puncturing pattern contains
the evaluation unit of the puncturing pattern for the determination of the positions of the rest of the deleted bits parity when the number of the deleted bits is not a multiple of the number of sets of parity bits.

11. The device according to claim 7, in which the number of sets of parity bits is determined by the equation below:
$$A=\lfloor \frac{N_p}{M_1}\rfloor$$,
whereAindicates the number of sets of parity bits for puncturing,N_pindicates the number of parity bits for puncturing,M₁indicates the number of bits in one set of parity bits.

12. The device according to claim 7, in which the sets of parity bits are generated by the equations below:
P_j={p_k|j≡kmodq0≤k<N₁-K₁},
whereP_jdenotesjthe set of parity bits,N₁indicates the length of the LDPC code word,K₁indicates the length of the information word,M₁indicates the number of bits in one set of parity bits,qis the value that satisfiesq= (N₁-K₁)/M₁whereK₁/M is an integer, and0 ≤ j < q.