Digital predicting and differentiating device

FIELD: information technology.

SUBSTANCE: digital predicting and differentiating device includes a unit for estimating first derivatives, having a subunit for calculating a first derivative at a second (n-1)-th reference point of process history consisting of three adders, the output of which is the third data output of the device, and a subunit for calculating a first derivative at the third (n-2)-th reference point of the process history consisting of three adders and a block of inverters, the output of the subunit being the fourth data output of the device.

EFFECT: broader functional capabilities of prediction devices by obtaining estimations of first derivatives using numerical differentiation formulae for prehistory nodes of an input smoothed discrete sequence.

5 dwg, 2 tbl

 

The invention relates to automation and computer engineering and can be used for forecasting of stationary and nonstationary random processes, improve the quality and accuracy control in digital systems of control and guidance of various (including ballistic objects.

A device for adaptive extrapolation on avtv No. 1572281 (USSR Author's certificate No. 1572281, CL G06F 15/353, 1988)containing the block smoothing unit extrapolation, which consists of three myCitadel, and the evaluation unit of the first derivative. The latter gives an approximation of the first derivative at the current point in time, i.e. in the first (n)-th of the four reference points (nodes) background extrapolated (predicted) process, however, the formula designed for the third (n-2)-th design point (Demidovich B.P. and Maron I.A. Foundations of computational mathematics. M., "FM", 1960, ch. XV, §4, str). In addition, in the formula for numerical differentiation, the above analogy, used the projected yn+1the process value, i.e. the value that "... will take place in the future, and it cannot be used to determine the unknown parameters in the model (Chuev Y. Prediction of the quantitative characteristics of the processes. M., "CF", 1975, str).

The closest in technical essence to tawlae the WMD device is selected as a prototype digital prediction device according to application No. 2011101014/08 (001268) from 12.01.2011,, containing block smoothing, the node clocking and block prediction, which contains three myCitadel, the register set a time (interval) of the forecast and two subunits: quadratic and linear projections. This device is functionally limited. The technical problem for the proposed device is to expand functionality by obtaining estimates of the first derivatives of the formulas numerical differentiation for equally-spaced points (nodes) the prehistory of the input smoothed discrete sequence.

Therefore, in the digital prediction device according to application No. 2011101014/08 (001268) from 12.01.2011 year, which includes: block smoothing on the application number 2010125733/20 (036608) from 23.06.2010, containing the adder, the first and second reversible counters, single channel subunit smoothing of the series-connected adder and a register, the sub job ratio deviations, containing a register, a counter and a delay element, a subunit of the actual deviations of the containing block inverters, two sets of Comparators and the element And the sub unit increments containing two elements And the inverter, the sub control dynamic characteristic, containing two shaper pulse, the element OR the counter, two elements And trigger mode information output unit smoothing information, the first panel is engaged and pulsing the input device; node clocking unit forecast containing a delay element, a trigger pulse generator, the element And the shift register; block prediction, containing the first, second and third myCitadel, each of which contains a block of register memory, multiplexer, block inverter and adder, sub quadratic forecast, containing three adder and the unit inverters, and the output of the subunit is the first information output device, a subunit of the linear prediction from a single adder, the output of which is the second information output device, the address register y (reference points) the prehistory of the input process, the input of which is the second managing input device, specifies the time (interval) of the forecast for the task entered the evaluation unit of the first derivatives containing subunit of the calculation of the first derivative in the second (n-1)-th point design history input process of the three adders, in which the sign of the first term of the first adder connected to the output of the first myCitadel, the sign of the second term of the adder to the output of the third multiplexer myCitadel, the sign of the first term of the second adder connected to the output of the first adder, and with mounting offset tires on one digit toward the least significant bits, the sign of the second term of the second adder is connected to in the course of the second myCitadel, the sign of the first term of the third adder coupled to the output unit inverters of the second myCitadel, and with mounting offset tires on one digit toward the high-order bits of the adder, the input of the second summand of the adder with the output of the second adder, and the output of the third adder is the output of the subblock and the third information output device for evaluating the first derivative of the second (n-1)-th point design background process, and the sub calculation of the first derivative in the third (n-2)-th point design background process of the three adders and block inverters, in which the sign of the first term of the first adder connected to the output of the third myCitadel, the sign of the second term of the adder to the output of the second myCitadel, and with mounting offset tires on one digit toward the least significant bits of the adder, the input of the first term of the second adder coupled to the output multiplexer of the second myCitadel, the sign of the second term of the adder - information output unit smoothing, and with mounting offset tires on one digit toward the least significant bits of the adder, and the output of the second adder through the power of the inverters connected to the input of the second term of the third adder, the input of the first term of which is connected to the output of the first adder, and the output of the third adder being the output is oblaka and fourth information output device for evaluating the first derivative in the third (n-2)-th point design background process.

The invention is illustrated by drawings, which depict: figure 1 - block diagram of the proposed device; figure 2 - block diagram block smoothing; figure 3 - block diagram single channel subunit smoothing; figure 4 - block diagram of the node clocking block prediction; figure 5 - block diagram block prediction and evaluation unit of the first derivatives.

The device implements a modified quadratic operators [KW] and linear [LN] predictions obtained by approximating polynomials in four points (nodes) y prehistory input smoothed discrete sequence by the method of least squares (Milne VE Numerical analysis. M., "IL", 1951, str):

where Δy1=(2Un-yn-1- birdnest 1-level background process;

Δy2=(2yn-1-yn-2- birdnest 2nd level;

Δy3=(2yn-1-yn-3- birdnest 3rd level;

Δy4=(2yn-2-yn-3birdnest 3rd level;

yn, yn-1, yn-2, yn-3the first, second, third and fourth design points (nodes) y three-level history of the input random smoothed discrete process.

Methods of calculus of finite differences for numerical differentiation and interpolation (extrapolation) b is parallel to the system of equally spaced nodes with step h, in this case, the system y (reference points) in a temporary three-tier continuum background discrete input sequence, where h is already interval between y (points), respectively, while (depth) of the forecast.

Known formulas numerical differentiation for equally spaced points, expressed through the function values at these points (Demidovich B.P. and Maron I.A. Foundations of computational mathematics. M., "FM", 1960, ch. XV §4, str), in particular for the four points are:

Below is a table of correspondence numbering reference points (nodes) background numbering of points in the original.

The number of design points in prehistory4321
yn-iyn-3yn-2yn-1ynyn+1
yiy0 y1y2Y3

To simplify modify (transform) of the formula(3), (4), (5) and (6):

Considering birdnote expressions are transferred in the following form:

As can be seen from the obtained modified formulas of differentiation, the main model elements in their implementation become the adder and the unit inverters, and the multiplication coefficients of the components is appropriate mounting shifts tires last at the input to the adder. Such operations on the block diagram (see figure 5) indicated by the circle.

The table below shows the hardware implementation costs formulas(11), (12), (13) and (14), where ∑ → adder, inv. → unit inverters:

First derivativesy'ny'n-1y'n-2y'n-3
Hardware costs for implementation is July 5∑+inv.C∑3∑+inv.5∑+inv.

It is obvious that the optimal implementation suitable for two points: (n-1)-th and (n-2)-th, in addition, the derivatives at these points (nodes) have a minimum accuracy of differentiation (see ibid., str):

rn-1, n-2=[h3/12]y(4)(ξ).

The device comprises (see figure 1) block smoothing 1, block prediction 2 and the evaluation unit of the first derivative 3. Block smoothing 1 contains (see figure 2) adder 4, sub 5 actual variance containing the unit inverters 6, two sets of Comparators 7.1 and 7.2 and the element And 8, the first reversible counter 9, sub 10 jobs ratio deviations containing the register 11, the counter 12 and the delay element 13, the sub unit 14 increments containing the inverter 15 and the two elements And 16.1 and 16.2, the second reversible counter 17, the subunit 18 control of dynamic characteristics, contains two pulse shaper 19.1 and 19.2, the element OR 20, a counter 21, two elements 22.1 And and 22.2 and trigger mode 23; information input 24 of the block and smoothing device, a first control 25 and pulsing 26 inputs the device and block smoothing; single subunit smoothing 27 (see figure 3), containing connected in series adder 28 and the register 29; information output 30. Node t is sterowania 31 unit forecast contains (see 4) delay element 32, the trigger 33, the pulse generator 34, the And gate 35 and the shift register 36. The block prediction 2 (see figure 5) contains the first 37 and second 38 and third 39 myCitadel, each of which contains a block of register memory 40 of the (A) series-connected registers 41, a multiplexer 42, a block of inverters 43 (assuming that the multiplexer does not have inverted outputs), and the adder 44, the first sub 45 forecast, containing a block of inverters 46, the first 47 and second 48 and 49 third adders, the output 50 of the third adder subunit is the first information output device; a second subunit 51 containing the adder 52, the output of which is connected to the second the information output device 53; register 54 address (A) ordinate reference points prehistory predictable process, the inlet 55 which is the second managing input device that specifies the time of the forecast H=AT (T - cycle operation, And the maximum address register (cell) block register memory 40). Unit 3 estimates of the first derivative contains a subunit 56 calculation of the first derivative in the second (n-1)-th point design background process, which consists of the first 57 and second 58 and 59 third adders, the output 60 of the latter is the third information output device, and the subunit 61 calculation of the first derivative in the third (n-2)-th point design background process, with the first holding 62, second 63, block inverters 64 and 65 third adders, the output 66 which is the fourth information output device. The work cycle consists of 4 clock cycles.

Block smoothing 1 operates in two modes: fixed and dynamic (transient), and all operations are performed for one of the 1st cycle. In stationary mode, the unit smoothes the input discrete random process, a deterministic basis (median) which can be constant, linear or non-linear (quadratic) character changes over time. Transient (dynamic) mode may be caused by the acceleration curve, the transition from one mode to another and so on, almost abrupt change process.

Block smoothing 1 (see figure 2) implements the following modification of the operator's signature exponential smoothing:

where xnand yn- input and output samples;

α=1/K is the smoothing parameter, the parameter adaptation;

Δxn=(xn-yn-1) - the current deviation from the median of the process.

As a criterion of effectiveness (accuracy) smoothing the selected ratio d between zero and the actual deviations Δxn. The last form current single increment of either sign output samples in accordance with the signature function in (15):

p> sign [Δxn/K]=0 for [Δn-To]<0 (Δn- zero variance),

sign [Δxn/K]=1 for [Δn-To]>0 (Δxn- actual deviation).

In stationary mode (D=0 - sign mode) block 1 smoothes the input random sequence increments to the level specified by the value d (the real range d=7÷190), which is filled in before you begin with the entrance 25 to the register 11 subunit 10 set the ratio of the variance. The latter is a controlled frequency divider, for example, for d=7 the output direct transfer counter 12 appears every seventh clock pulse from input 26, and, through a delay element 13 overwrites the inverse code d register 11 in the counter 12 (for the next cycle of operation of the divider), and subtracts "1" from the first reversible counter 9 that contains the code of the parameter adaptation as the Process of adaptive smoothing is as follows. Let (at a certain code To the counter 9) increased the variance of the input discrete process, i.e. increased the number of valid deviations Δxn(both characters). After comparing them with the option of adapting To output blocks of Comparators 7.1 and 7.2 subunit 5 (playing the role of negative feedback) are logic "1" (mode Comparators: [Δxn>]="1", [Δn<K]="0")received at the input element is a And 8. As in the stationary mode the trigger mode 23 is in the state "0" (D=0), with its inverted output to the first input element And 8 subunit 5 also receives a logical "1". The high level signal at all inputs of the element And 8 permit the passage of clock pulses from input 26 to a summing input of the first reversible counter 9 (code To increases in the last) and second input elements And 16.1 and 16.2 subunit unit 14 increments. The output signal from one of them (depending on the sign of the deviation) is fed to a summing (or subtractive) the input of the second reversible counter 17 of the smoothing ie signature function (15). The process of growth will reduce the number of valid variance and will continue until, until dynamic equilibrium, i.e. the number of pulses received from sub 10 on the subtractive input of the counter 9 will be equal to the number of pulses received at its summing input subunit 5, and the output variance of the smoothed discrete sequence will remain unchanged (for d=7: one valid deviation should be seven zero).

For smoothing discrete input sequence on transient (dynamic) mode (D=1) uses a single channel subunit smoothing 27 (see figure 3), which implements the following statement expon dzialdowo smoothing: y n=1/2(xn+yn-1), i.e. with a minimum degree of smoothing and with minimal phase shift (delay) the output samples. Sub 27 works in both modes is triggered by clock pulses from input 26 in register 29, but is used only for transient (dynamic) mode.

For a stationary random process, the probability of occurrence of a series, for example, m=8 (eight) deviations from the median (deterministic framework) process is one sign the contract in accordance with the geometric probability distribution is equal to:

P(x=m)=(1/2)m=1/256≈0,004,

i.e. so small that it can be considered as the appearance of such series by the beginning of the transition mode. The subunit 18 secures such series and works as follows. As for the stationary mode, the most probable deviation of different signs, then the sign changes in the adder 4 with a "plus" to "minus" and Vice versa trigger pulse shapers 19.1 or 19.2 and through the element OR 20 reset to "0" the counter 21 and the trigger mode 23 (D=0). In dynamic mode (the formers 19 do not work) on the counter 21 (for example, 4-bit) will receive eight consecutive pulses from clock input 26. Output high-order bit of the counter 21 will set the logic "1", a high level signal which will ensure the passage of th is without the first element And 22.1 pulsing pulse, which will set the trigger mode 23 1 (D=1). The last signal from the inverted output will block the operation of subunit 5 of the actual variances and, respectively, subunit 14 single increments, and a high level signal direct access will be allowed through the second element And 22.2 overwrite discretes single subunit smoothing 27 in the second reversible counter 17 of the anti-aliasing. At the end of the transitional regime in the adder 4 will inevitably arise deviations of different signs, which will lead to the triggering of the pulse shapers 19 and, respectively, to switch the trigger mode 23 in the state "0" (fixed smoothing mode, D=0).

Operations forecasting and differentiation are done in three steps, respectively, of the 2nd, 3rd and 4th. They are formed by a series of three pulsing pulses from node clocking 31 (see figure 4). Pulsing the pulse input 26 clears the trigger 33, and writes "1" in the least significant bit of the shift register 36. The same pulsing pulse, delayed by the delay element 32 is set to "1" trigger 33, thus allowing the passage of pulses from generator 34 through the element And 35 in the shift register 36, the tyres least significant bits ("a", "b", "C", and so on) and you receive the above series. In the 2nd step of recording the output current (first) design points ynin the first Regis is p 41 of block 40 of register memory of the first vicites 37. At the same time overwrites (shift) all the preceding y in adjacent registers 41. The address input of the multiplexer 42 receives address code (A), the ordinate of prehistory and the register 54, recorded from the second control input 55 before you begin the device and specifying the time (interval) prediction N=AT. In accordance with this address, the y output of multiplexer 42 (as the second design point yn-1) through the power of the inverter 43 is fed to the input of the second term of the adder 44, the input of the first term of which is a double ordinate of the previous design points yn. At the output of the adder of the first vicites 37 is set birdnest 1 level prehistory discrete input sequence.

In the 3rd and 4th beats are produced by operations similar to those described above, but for the second 38 and third 39 vychitala, the outputs of which are, respectively, birdnote the 2nd and 3rd levels of prehistory. All the adders in the device - Raman. Upon completion of the 4-th quantum output 50 subunit 45 in accordance with the empirical formula (1) code set evaluation quadratic (non-linear) prediction for nonstationary discrete input sequence, the output 53 subunit 51 in accordance with the formula (2) code the estimates of the linear prediction for stationary or medl the NGO changing discrete input sequence, the output 60 of the sub 56 in accordance with formula (12) code of estimating the first derivative of the second (n-1)-th point design background process, and the output 66 subunit 61 in accordance with the formula (13) code of estimating the first derivative in the third (n-2)-th point design background process.

Introduction to device subunits of the calculation of the first derivatives in the second (n-1)-th and the third (n-2)-th reference points background (i.e. separated by time) significantly extends the functionality and scope of the device, it is possible to analyse the nature of (trend) changes parameters of the predictable process (increase - decrease, acceleration - deceleration, and so on), to assess its intensity (e.g., gradient fields of temperature, pressure and others)that enhances the quality management especially estrogenicity objects using well-known PID controllers.

Digital prediction and differentiating device, comprising: a block smoothing containing the adder, the first and second reversible counters, single channel subunit smoothing of the series-connected adder and a register, the sub job ratio deviations, containing a register, a counter and a delay element, a subunit of the actual deviations of the containing block inverters, two sets of Comparators and the element And the sub is dining increments, containing two elements And the inverter, the sub control dynamic response, contains two pulse shaper element OR counter, two elements And trigger mode information output unit smoothing information, a first control and pulsing the input device; node clocking unit forecast containing a delay element, a trigger pulse generator, the element And the shift register; block prediction, containing the first, second and third myCitadel, each of which contains a block of register memory, multiplexer, block inverter and adder, sub quadratic forecast, containing three adder and the unit inverters, the subunit is the first information output device, a subunit of the linear prediction from a single adder, the output of which is the second information output device, the address register y (reference points) the prehistory of the input process, the input of which is the second managing input device that specifies the time (interval) forecast, characterized in that it introduced the evaluation unit of the first derivatives containing subunit of the calculation of the first derivative in the second (n-1)-th point design history input process of the three adders, in which the sign of the first term of the first adder connected to the output of the first myCitadel, sign Vtorov the term of this adder - to the output of the third multiplexer myCitadel, the sign of the first term of the second adder connected to the output of the first adder, and with mounting offset tires on one digit toward the least significant bits, the sign of the second term of the second adder connected to the output of the second myCitadel, the sign of the first term of the third adder coupled to the output unit inverters of the second myCitadel, and with mounting offset tires on one digit toward the high-order bits of the adder, the input of the second summand of the adder with the output of the second adder, and the output of the third adder is the output of the subblock and the third information output device for evaluating the first derivative of the second (n-1)-th point design background process, and the sub calculation of the first derivative in the third (n-2)-th point design background process of the three adders and block inverters, in which the sign of the first term of the first adder connected to the output of the third myCitadel, the sign of the second term of the adder to the output of the second myCitadel, and with mounting offset tires on one digit toward the least significant bits of the adder, the input of the first term of the second adder coupled to the output multiplexer of the second myCitadel, the sign of the second term of the adder - information output unit smoothing, and with mounting shift the m of the tire by one digit toward the least significant bits of the adder, and the output of the second adder through the power of the inverters connected to the input of the second term of the third adder, the input of the first term of which is connected to the output of the first adder, and the output of the third adder is the output of the subblock and the fourth information output device for evaluating the first derivative in the third (n-2)-th point design background process.



 

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2 dwg

FIELD: physics.

SUBSTANCE: function codes are rounded-off to the nearest level and the obtained codes are stored. The optimality criterion code is calculated and stored. Starting with a certain initial number L of the function code, the direction of rounding-off this code is changed and the optimality criterion code is calculated. If the optimality criterion code falls, the changed value of the code is stored and a new value of the optimality criterion code is calculated and stored, otherwise the initial L-th function code and the initial optimality criterion code are stored, and calculation is moved on to the next number of the function code L+1, where it is checked whether the optimality criterion code falls in the same way as that when the L-th function code was changed. Further, the process is continued until the optimality criterion code does not fall in a sequence of n function codes, read from the code value in which the last fall in the optimality criterion code took place.

EFFECT: reduced absolute error in the amplitude of the reproduced sinusoidal signal.

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