Liquid crystal display device

FIELD: physics, computer engineering.

SUBSTANCE: liquid crystal display device includes pixels, having first and second subpixels, and a first CS bus line which is associated with the first subpixel. The first subpixel includes a liquid crystal capacitor and a first storage capacitor. The second subpixel includes a liquid crystal capacitor. First voltage of a CS signal applied across the first storage capacitor through the first CS bus line is an oscillating voltage, one period of which is shorter than one period of vertical scanning, and has first and second potentials which set a maximum amplitude and a third potential between the first and second potentials. When voltage Vg of the gate signal applied in the gate bus line becomes low, first voltage Vsca of the CS signal applied in the associated first CS bus line has a third potential.

EFFECT: improved device.

7 cl, 10 dwg

The technical field to which the invention relates

[0001]

The invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device with multipixel structure, which demonstrates the characteristic of wide angle.

The level of technology

[0002]

The liquid crystal display device with MVA mode (vertical alignment with a multi-domain structure) has the characteristic of a wider viewing angle than liquid crystal display device with a TN-mode, and therefore, at present, widely used in various liquid crystal display devices, including television monitors (see patent documents 1 and 2).

[0003]

In the liquid crystal display device with MVA-mode control structure domains (also called "management structure alignment") is provided for each of the two substrates that face each other with a liquid crystal layer of a vertical alignment, placed between them so that she was facing the liquid crystal layer, thereby forming multiple liquid crystal domains in which Directors have a lot of different directions of alignment (i.e. tilt directions). As is such the management structure of the domain is either a hole (for example, the slit), which cut through the electrode or the dielectric protrusion (e.g., a rib), which is formed on the electrode so that he was facing the liquid crystal layer.

[0004]

Typical patterns of management domains, which go straight in two directions that intersect each other at right angles, placed on each of the two substrates. As the structure of the domain management provided for one and the other of the two substrates are placed so that they are alternately and parallel to each other, when viewed perpendicular to the substrates. As a result, when the voltage applied to the liquid crystal layer of an arbitrary pixel, four domains, in which molecules of liquid crystals are tilted in four different directions (which are sometimes referred to in this document as "directions of Directors of liquid crystal domains")are formed between the linear management domains so that the tilt direction of liquid crystal molecules in any of these four domains specifies the angle of 90 degrees relative to the direction of tilt of liquid crystal molecules in the adjacent domain. In a typical arrangement formed four liquid crystal domain, and the Directors of liquid crystal domains define the azimuthal angle of 45 degrees relative to the axis of polarization (i.e. the axis ol the transmission) of the two polarizers, placed as the crossed prism Nicolas. If the azimuthal angle of zero degrees supposedly is set by the direction of the axis of polarization of one of the two polarizers (e.g., the horizontal direction on the display screen), and if the counterclockwise direction is assumed to be the positive direction, then the Directors in the four liquid crystal domains must have azimuth angles of 45, 135, 225 and 315 degrees, respectively.

[0005]

In this description, a "pixel" refers to the smallest unit of display, which should be performed by the liquid crystal display device. In the case of a color display device "pixel" means the smallest unit to represent each of the primary colors and is sometimes called "point". In a typical color display device, one color display pixel is formed by three pixels that represent the red, green and blue which are three primary colors of light. Also, by controlling the brightness of these pixels, a color display device performs the operation of displaying in color.

[0006]

Thus, to reduce the dependence on the angle γ characteristics of the liquid crystal display device with MVA-mode, the applicant Nast is of the present application has recently disclosed (patent document 3) liquid crystal display device, which can reduce the dependence on angle of γ-characteristics by dividing one pixel into several subpixels with mutually different brightness values, and a way to bring such a device. In particular, such a device can reduce the dependence on angle of γ-characteristics, which manifests itself as such a phenomenon that the brightness of the display in low scales halftone become higher than a predetermined brightness (i.e. the image on the screen looks, in General, whitish) during the operation of the display in the display mode normally black image. This mode of display or excitation is sometimes referred to in this document as "grayscale display by regions", "half-tone excitation of the fields," multipixel display" or "multipixel the excitement."

[0007]

All of the disclosures of the patent documents No. 1-3 are incorporated herein by reference.

The list of bibliographic references

Patent literature

[0008]

Patent document 1. Japanese laid patent publication No. 11-242225 (corresponding to U.S. patent No. 6724452).

Patent document 2. Japanese laid patent publication No. 2000-155317 (corresponding to U.S. patent No. 6879364).

Patent document 3. Japanese laid patent publication No. 2004-6214 (corresponding to U.S. patent No. 6958791).

The invention

The technical problem

[0009]

However, the authors of the present invention have found by experiments that when multipixel excitation, disclosed in patent document No. 3, parallel lines that appear in the direction of lines look blurred. This is a problem.

[0010]

According to the method multipexing excitation, opened in patent document 3, by application of mutually different counter voltage storage capacitors (which are sometimes referred to in this document as "voltage CS-signals") to the two electrically independent storage capacitor, which are provided for the two subpixels mutually different operating voltages may be applied to the respective liquid crystal layers of the two subpixels, as described below with reference to Fig. 6-9. In particular, after a predetermined voltage signal display attached to two subpixel electrodes, the TFT is turned off, thereby electrically disconnecting subpixel electrodes from the bus line of the source. After this opposing voltage capacitor is changed in two different orders (from the point of view of values, directions and sign changes) against the sustained fashion two subpixels, thus setting the effective voltage applied to the respective liquid crystal layers of the two subpixels different from each other.

[0011]

According to this method multipexing excitation of the combination of the polarity of the signal voltage display and change direction opposing voltage storage capacitor determines which of the two operating voltages applied to the respective liquid crystal layers of the two subpixels becomes higher than the other. Therefore, if the operation of the excitation with one inversion point is to prevent flickering, bright subpixel will be placed in a zigzag manner in the direction of the rows in accordance with the arrangement of the polarities of the voltages of the display signals supplied to the respective liquid crystal layers of pixels. As a result, when the displayed lines that are parallel in the direction of the lines, these lines appear blurred.

[0012]

To overcome this problem, carried out the present invention, and one of its objectives is to provide a liquid crystal display device with multipixel structure that can display such lines running parallel in the direction of the rows properly even when the excitation through the ω pulse inversion one point.

The solution of the problem

[0013]

The liquid crystal display device according to the present invention includes: a set of pixels, which are arranged in columns and rows for the formation of a matrix pattern, each of the set of pixels includes first and second subpixel, the first subpixel shows higher brightness than the second subpixel, at least in a specific scale; many bus lines and source, each of which is associated with one of the columns of pixels; many bus lines shutter, each of which is associated with one of the rows of pixels; many TFT (thin film transistors), each of which is associated one of the first and second subpixels that everyone has mentioned pixel; and many of the first lines CS-bus, each of which is associated with the first subpixel one of the pixels. First subpixel includes: a liquid crystal capacitor, which is formed by the first electrode subpixel, the liquid crystal layer and the counter-electrode which is facing the first electrode subpixel through the liquid crystal layer; and a first storage capacitor, which is formed by the electrode of the first storage capacitor that is electrically connected to the electrical wiring in the ode of the first subpixel, insulating layer and the counter-electrode of the first storage capacitor, which is converted to the electrode of the first storage capacitor through an insulating layer. The second subpixel includes a liquid crystal capacitor, which is formed by the electrode of the second subpixel and counter-electrode which is facing the second electrode of subpixel through the liquid crystal layer. The first voltage CS signal, which is applied to the counter-electrode of the first storage capacitor through associated with it the first line CS-bus is oscillatory voltage, one period of which is less than one vertical scanning period, and has at least three potential that includes first and second potentials, which represent the maximum amplitude, and a third potential between the first and second potentials. When the voltage signal of the shutter, which is supplied to the bus line shutter associated with an arbitrary row of pixels, and which, being high becomes low, the first voltage CS signal filed in associated with him the first line CS-bus has a third potential.

[0014]

In one embodiment, the third potential is the average of the first and second potentials.

[0015]

In one embodiment, the liquid crystal device is of tabraani additionally includes many second lines CS-bus, each of which is associated with the second subpixel one of the pixels. The second subpixel includes a second storage capacitor, which is formed by the electrode of the second storage capacitor that is electrically connected to the electrode of the second subpixel, the insulating layer and the counter-electrode of the second storage capacitor that is facing toward the electrode of the second storage capacitor through an insulating layer. The second voltage CS signal applied to the counter-electrode of the second storage capacitor through associated with it a second line CS-bus, is constant over one period of the vertical scan.

[0016]

In one embodiment, the second voltage CS signal is opposing the voltage applied to the counter-electrode.

[0017]

In one embodiment, the second subpixel has no capacitor.

[0018]

In one embodiment, the first and second subpixel placed in the same order as in the two pixels that are adjacent to each other in the row direction and two pixels that are adjacent to each other in the direction of columns.

[0019]

In one embodiment, each of the multiple first lines CS-bus is connected to one of the N connecting the CS lines, is the quiet are electrically independent from each other.

Advantages of the invention

[0020]

The present invention provides a liquid crystal display device with multipixel structure, which, for example, can draw lines that are parallel in the direction of the rows properly even when excited by pulse inversion one point.

Brief description of drawings

[0021]

Fig. 1 is a schematic view illustrating an exemplary will pixeloo structure for the liquid crystal device 100A display as an option for implementation of the present invention.

Fig. 2(a) is a diagram illustrating an electrical equivalent circuit corresponding to the pixel structure of the LCD device 100A of the display, and figure 2(b) is a diagram illustrating an electrical equivalent circuit corresponding to the pixel structure of the liquid crystal device 100B display as another variant implementation of the present invention.

Fig. 3 is a chart illustrating respective waveforms of various voltages (signals)to excite the liquid crystal device 100A display as an option for implementation of the present invention.

Fig. 4 is a graph showing how the current tense is I V1 and V2, applied to the respective liquid crystal layers of subpixels, change with the voltage Vs of the signal in the liquid crystal display device 100A of the display.

Fig. 5A is a diagram schematically illustrating the display state of the liquid crystal device 100A display, excited by pulse inversion one point.

Fig. 5B is a diagram schematically illustrating the display state of the liquid crystal device 100B display, excited by pulse inversion one point.

Fig. 6(a)-(f) show the corresponding waveforms of various voltages in order to excite the liquid crystal display device of patent document No. 3.

Fig. 7 is a graph showing the relation between voltages applied to the respective liquid crystal layers of the two subpixels in the liquid crystal display device of patent document No. 3.

Fig. 8 is a diagram schematically illustrating the display state of the liquid crystal display device of patent document No. 3, excited by pulse inversion one point.

Fig. 9(a)-(j) show the waveforms of various voltages (signals), th is would be possible to implement a display state, it is shown in Fig. 8.

Detailed description of embodiments

[0022]

The following describes embodiments of a liquid crystal display device according to the present invention with reference to the accompanying drawings. However, the present invention is in no way limited to the specific implementation options, which are described below.

[0023]

Fig. 1 schematically shows the electrical configuration for the liquid crystal device 100A display as an option for implementation of the present invention. The liquid crystal device 100A display has many pixels, which are arranged in columns and rows for the formation of a matrix of picture. Also Fig. 1 illustrates the structure of one of these pixels.

[0024]

The pixel 10 is divided into two subpixels 10a and 10b. These subpixels 10a and 10b connected to the associated TFT 16a and 16b and their associated storage capacitors (CS) 22a and 22b, respectively. The gate electrodes of the TFT 16a and 16b are connected to the same line 12 bus gate (scanning lines). As their source electrodes connected to the line 14 bus source (the signal line). Storage capacitors 22a and 22b are connected to their associated lines 24a and 24b CS-bus (lines, storage capacitors, respectively. Cumulative cond is Nestor 22a includes a storage capacitor electrode, which is electrically connected to subpixel electrode 18a, the storage capacitor counter-electrode which is electrically connected to line 24a CS-bus, and an insulating layer (not shown)placed between the electrodes. Storage capacitor 22b includes a storage capacitor electrode that is electrically connected to subpixel electrode 18b, the storage capacitor counter-electrode which is electrically connected to line 24b CS-bus, and an insulating layer (not shown)placed between the electrodes. Appropriate protivoelektrodom storage capacitor for accumulating capacitors 22a and 22b are independent from each other and have such a structure that take mutually different counter voltage capacitor (voltage CS signals) of the lines 24a and 24b CS-bus, respectively.

[0025]

Fig. 2(a) schematically shows an equivalent circuit of one pixel of the liquid crystal device 100A of the display. In this electrical equivalent circuit of liquid crystal capacitors of the respective subpixels 10a and 10b are identified by reference positions 13a and 13b, respectively. Each of these liquid crystal capacitors 13a and 13b includes subpixel electrode 18a, 18b, the liquid crystal layer and a counter-electrode 17 (to the which is shared subpixel electrodes 10a and 10b). In the following description, when the description as electrical components, liquid crystal capacitors 13a and 13b are also referred to herein as "liquid crystal capacitors Clca and Clcb, and storage capacitors 22a and 22b are also referred to herein as "storage capacitors Ccsa and Ccsb".

[0026]

In the subpixel 10a one electrode of the liquid crystal capacitor Clca and one electrode of the storage capacitor Ccsa is connected to the drain electrode of the TFT 16a, which is provided to initiate subpixel 10a. The other electrode of the liquid crystal capacitor Clca is connected to the counter-electrode 17. As another electrode of the storage capacitor Ccsa connected to line 24a CS-bus. In the subpixel 10b one electrode of the liquid crystal capacitor Clcb and one electrode of the storage capacitor Ccsb is connected to the drain electrode of the TFT 16b, which is provided to initiate subpixel 10b. The other electrode of the liquid crystal capacitor Clcb connected to the counter-electrode 17. As another electrode of the storage capacitor Ccsb connected to line 24b CS-bus. The gate electrodes of the TFT 16a and 16b are both connected to line 12 bus gate and source electrodes both connected to the line 14 bus source. Provided that the same voltage signal of the shutter and the same voltage signal display (voltage the s signal source) is applied to the TFT 16a and 16b, TFT 16a and 16b do not always necessarily need to share the same line 12 bus speed and/or the same line 14 bus source.

[0027]

Patent document 3 also discloses the same will pixeloo structure as Pixela the structure of the liquid crystal device 100A of the display. However, according to the method multipexing excitation adopted in patent document No. 3, both of the opposing voltage capacitor (voltage CS signals)supplied to line 24a and 24b CS-bus are oscillatory voltages. In this description, "oscillatory voltage" means herein the voltage, one period of the oscillations is less than one vertical scanning period, unless otherwise noted.

[0028]

On the other hand, the liquid crystal device 100A display as an option for implementation of the present invention is configured to be applied, in combination, a voltage signal display, which is supplied from the associated line 14 bus source, and a counter voltage storage capacitor (first voltage CS signal), which served as the oscillating voltage from line 24a CS-bus, to the liquid crystal layer of one subpixel (which is bright subpixels, which is presumed to be subpic Elam 10a in the subsequent description) and applying the voltage signal display to the liquid crystal layer of the other subpixel (i.e. subpixel 10b) without the application of an oscillating voltage to him. In other words, essentially only the voltage signal display is applied to the liquid crystal layer of the other subpixel (i.e. subpixel 10b). Therefore, a counter voltage Vcsb storage capacitor (second voltage CS signal)applied to subpixel 10b of the liquid crystal device 100A of the display is not oscillating voltage, and DC voltage (see Vcsb, shown in Fig. 3). In this description, "constant voltage" means herein a voltage that remains constant (i.e. has a constant potential) in one vertical scanning period. It is better that a DC voltage is applied as Vcsb, were equal to counteract the voltage that is applied to the counter-electrode. It should be noted that the value of the voltage applied to the liquid crystal layer, it is about the potential of the counter-electrode.

[0029]

In addition, in the liquid crystal display device as an option for implementation of the present invention, there is no need to apply an oscillating voltage to the liquid crystal layer subpixel 10b, the, therefore, may also be adopted a configuration in which subpixel 10b, which should be dark subpixels, has no storage capacitor, similarly to the liquid crystal device 100B display shown in Fig. 2(b). By excluding storage capacitor can thus be increased, the aperture ratio of each pixel. In the known liquid crystal display devices with a ratio of 2x and 4x one vertical scanning period is 1/60 of a second (i.e., its frequency vertical scan is 60 Hz). On the other hand, in the liquid crystal display devices, one vertical scanning period which is 1/120 or 1/240 seconds, the voltage applied to the liquid crystal layer must be stored for only a short time, and, consequently, the storage capacitor may be omitted.

[0030]

In the liquid crystal device 100A, 100B display as an option for implementation of the present invention, the voltage Vcsa CS signal applied to the storage capacitor counter-electrode of subpixel 10a through line 24a CS-bus is oscillatory voltage, one period of which is less than one vertical scanning period, and has at least three potential that includes the first the second potentials, which specify the maximum amplitude, and a third potential between the first and second potentials, as shown in Fig. 3. It would be preferable if the third potential is the average of the first and second potentials, as illustrated in Fig. 3. As also shown in Fig. 3, first, second and third potentials must be maintained within a certain period. In addition, when the voltage signal of the shutter, which is supplied to the bus line of the shutter and which, being high becomes low (i.e. when the TFT is turned off), the voltage of the CS signal, filed in associated line CS-bus is specified as the third potential. As a result, the liquid crystal device 100A, 100B display according to the present invention can overcome the problem multiplexing excitation in patent document 3, when the reduction of dependence on the angle of γ-characteristics.

[0031]

It should be noted that one vertical scanning period" means in this document the period between the time when one bus line button (or scan line) is selected, and the time when this bus line shutter is selected next time. In the known liquid crystal display device, which is not excited by a pulse with a ratio of 2× and 4×, one vertical period is generowania corresponds to one period of the personnel of the scanning signal, if the video is progressive excitation signal, but corresponds to one period of the field scanning of the video signal if the video signal is interlaced excitation signal. For example, in the case of an NTSC signal, one period of the vertical scanning of the liquid crystal display device is 16.7 MS, which is the inverse number of the frequency of the field (60 Hz) NTSC signal. Since it is not intended that the liquid crystal display device is excited interlaced, voltage signals are written to each pixel in the fields with odd and even number. Therefore, the inverse number of the frequency of the field NTSC signal is one period of the vertical scan. It should be noted that in one period of the vertical scanning interval between the time when the selected one bus line of the shutter, and the time when selected, the following bus line shutter, is called "one horizontal scanning (1H)".

[0032]

Further in this document, with reference to Fig. 6-9 describe what is the problem in the way multipexing excitation described in patent document 3. The liquid crystal device 100A display as an option for implementation of the present invention not only has the same will pixeloo structure, but that is the same and works on the basis of the same principle, that and its counterpart, disclosed in patent document 3. In other words, the liquid crystal device 100A display also forms a bright subpixel by supply voltage storage capacitor as the oscillating voltage. It is therefore also describes the principle of the method multipexing excitation disclosed in patent document 3. In the following description as an example, describes a liquid crystal display device which has the configuration same as the configuration shown in Fig. 1 and 2(a), and which presumably is excited with voltages shown in parts (a)-(f) in Fig. 6.

[0033]

Part (a)to(f) in Fig. 6 schematically show times, to apply the appropriate voltage to excite the liquid crystal display device, which has pixeloo structure, similar to that of Pixela the structure of the liquid crystal device 100A of the display. In particular, part (a) of Fig. 6 shows the shape of the Vs voltage signal line 14 bus source; part (b) of Fig. 6 shows the shape of the Vcsa voltage signal line 24a CS-bus; part (c) of Fig. 6 shows a shape Vcsb voltage signal line 24b CS-bus; part (d) of Fig. 6 shows waveforms of the voltage Vg line 12 bus shutter; part (e) of Fig. 6 shows a shape Vlca signal voltage is Oia pixellogo electrode 18a of subpixel 10a; and part (f) of Fig. 6 shows a shape Vlcb voltage signal pixellogo electrode 18b of subpixel 10b. In Fig. 6 the dotted line indicates the shape of the COMMON (Vcom) signal voltage of the counter-electrode 17.

[0034]

In the following description, the liquid crystal capacitors Clca and Clcb of subpixels 10a and 10b presumably have the same electrostatic capacitance CLC (In). The value of CLC (C) depends on operating voltage (V)applied to the liquid crystal layers of the respective subpixels 10a and 10b. In addition, the storage capacitors 22a and 22b, which are connected independently of each liquid crystal capacitors of the respective subpixels 10a and 10b are identified by Ccsa and Ccsb, respectively, and presumably have the same electrostatic capacitance CCS.

[0035]

First, at time T1, the voltage Vg of the signal of the shutter increases with VgL (low) to VgH (high)to turn on TFT 16a and 16b at the same time. As a result, the voltage Vs of the signal display on line 14 bus source is applied to subpixels the electrodes 18a and 18b of subpixels 10a and 10b, in order to charge the liquid crystal capacitors Clca and Clcb. Similarly storage capacitors Ccsa and Ccsb respective subpixels also charged with the voltage Vs of the signal display on line 14 bus source.

[0036]

Then, at time T2, the voltage is giving Vg on line 12 bus shutter falls from VgH to VgL, to turn off TFT 16a and 16b simultaneously and electrically isolate all of the liquid crystal capacitors Clca and Clcb and the storage capacitors Ccsa and Ccsb from line 14 bus source. It should be noted that immediately after this, due to the phenomena of penetration caused by parasitic capacitance of the TFT 16a and 16b, and other factors, the voltages Vlca and Vlcb applied to the respective subpixels the electrodes is reduced by approximately the same voltage Vd to:

Vlca=Vs-Vd

Vlcb=Vs-Vd,

respectively. In addition, in this case, the voltages Vcsa and Vcsb on the lines of CS-bus are:

Vcsa=Vcom-Vad

Vcsb=Vcom+Vad,

respectively.

[0037]

Then, at time T3 the voltage Vcsa on line 24a CS-bus connected to the storage capacitor Ccsa, increases from Vcom-Vad to Vcom+Vad, and the voltage Vcsb on line 24b CS-bus connected to the storage capacitor Ccsb, falls from Vcom+Vad to Vcom-Vad. In other words, these voltages Vcsa and Vcsb changed two times more than Vad. When the voltage on the lines 24a and 24b CS-bus changes the voltage Vlca and Vlcb applied to the respective subpixels the electrodes is changed to:

Vlca=Vs-Vd+2*K*Vad

Vlcb=Vs-Vd-2*K*Vad,

respectively, where K=CCS/(CLC (V)+CCS).

[0038]

Then, at time T4 Vcsa falls from Vcom+Vad to Vcom-Vad, and Vcsb increases from Vcom-Vad to Vcom+Vad. In other words, these voltages Vcsa and Vcsb again changed two times greater is than Vad. In this case, Vlca and Vlcb also changed from:

Vlca=Vs-Vd+2*K*Vad

Vlcb=Vs-Vd-2*K*Vad

on:

Vlca=Vs-Vd

Vlcb=Vs-Vd,

respectively.

[0039]

Then, at time T5 Vcsa increases from Vcom-Vad to Vcom+Vad, and Vcsb falls from Vcom+Vad to Vcom-Vad. In other words, these voltages Vcsa and Vcsb changes again twice more than Vad. In this case, Vlca and Vlcb also changed from:

Vlca=Vs-Vd

Vlcb=Vs-Vd

on:

Vlca=Vs-Vd+2*K*Vad

Vlcb=Vs-Vd-2*K*Vad,

respectively.

[0040]

After that, every time there's a time period which is integer times from one period 1H horizontal entry (or one period of the horizontal scanning), the voltage Vcsa, Vcsb, Vlca and Vlcb alternate their levels at the times T4 and T5. Interval alternation between T4 and T5 can be properly defined as one, two, three, or more times greater than 1H according to the method of excitation of the liquid crystal display device (for example, the method of inversion of polarity) or the display state (for example, the degree of flicker or neplatnosti the displayed image). This alternation continues until the pixel 10 is not overwritten the next time, i.e. up until the current time becomes equivalent to T1. Therefore, the effective values of the voltages Vlca and Vlcb applied to subpixels the electrodes become equal:

Vlca=Vs-Vd+K*Vad

Vlcb=Vs-Vd-K*Vad,

[0041]

Therefore, the effective voltages V1 and V2 applied to the respective liquid crystal layers of subpixels 10a and 10b, is equal to:

V1=Vlca-Vcom

V2=Vlcb-Vcom,

In other words:

V1=Vs-Vd+K*Vad-Vcom

V2=Vs-Vd-K*Vad-Vcom,

respectively.

[0042]

As a result, the difference ΔV12 (=V1-V2) between the effective voltages applied to the respective liquid crystal layers of subpixels 10a and 10b becomes equal ΔV12=2*Kc*Vad (where K=CCS/(CLC (V)+CCS)). Thus, mutually different voltages may be applied to the liquid crystal layer.

[0043]

Fig. 7 schematically shows the relationship between V1 and V2. As can be seen from Fig. 7, the smaller the value V1, the more ΔV12 in the liquid crystal device 100A of the display. Therefore, the γ-characteristic in the low halftone scales (i.e. scales of tones that are closer to black color, and not to the white color) can be with high efficiency is improved.

[0044]

Generally speaking, in the liquid crystal display device, the voltage applied to the liquid crystal layer of the pixel is set as a variable voltage (this method is sometimes called "way of the excitation alternating current")to resolve the problem of reliability. In other words, the applied voltage is set so that pikelny electrode and counter-electrode've inverted your level and potential through equal intervals of time, and that the electric field applied to the liquid crystal layer reverses its direction (i.e. the direction of the electric force lines) at regular intervals of time. In a typical liquid crystal display device in which a counter-electrode and the pixel electrodes are placed on two different substrates, the electric field applied to the liquid crystal layer, inverts its direction from the direction to the light source in the direction to the viewer, and Vice versa.

[0045]

The interval in which the electric field applied to the liquid crystal layer, reverses its direction, typically twice exceeds one period of the vertical scan. In other words, in the liquid crystal display device, each time the image is rendered, the electric field applied to the liquid crystal layer reverses its direction. For this reason, when you view a still image, if the intensity of the electric field (or applied voltage) do not coincide exactly with each other between the two directions of the electric field (i.e., if the electric field changes its intensity each time it changes its direction), the brightness of each pixel is changed when the change of the intensity of the electric field, thereby Faure is irua flicker on the screen.

[0046]

In other words, to minimize this flickering, the intensity of the electric field (or applied voltage) in two directions of the electric field must exactly match with each other. In liquid crystal display devices, which have serially manufactured on an industrial basis, however, difficult to reconcile the intensity of the electric field in two directions. That is why they aim to minimize flicker by placing pixels, which have mutually opposite directions of the electric field near each other in the display area, since the brightness of the pixels must be spatially averaged in this case. This method, in General, is called either "the initiation of inversion points"or "excitation with inversion lines". It should be noted that these methods of excitation with inverse" include not only the inversion of a single point, in which the polarities are inverted pepicello, so to speak, in a "checkerboard pattern" (i.e., each row and each column), and the inversion of one line, in which the polarities are inverted along the lines, but also inversion points with one column and two rows, in which the polarities are inverted every other row and each column, and various other orders. Thus, any of these times the ranks of ways to properly adapt as necessary.

[0047]

Fig. 8 shows a display state, which should be formed when the liquid crystal display device disclosed in patent document 3, is excited by pulse inversion one point. In addition, the waveforms of the respective voltages (or signals)to implement the display state shown in Fig. 8, shown in parts (a)-(j) in Fig. 9.

[0048]

In the example described below, the set of pixels is placed in columns (1-cq) and rows (1-rp) to form a matrix pattern (rp, cq), and each pixel P(p, q) (where 1≤p≤rp and 1≤q≤cq) has two subpixel SPa(p, q) and SPb(p, q). Fig. 8 schematically illustrates a portion of a relative layout (8 rows x 6 columns) lines S-C1 S-C2, S-C3 S-C4,..., and S-Ccq bus source; lines G-L1 G L2, G-L3,..., and G-Lrp tires shutter; lines CS-A and CS-B CS-Shin; pixels P(p, q); and subpixel SPa(p, q) and SPb(p, q) of the respective pixels.

[0049]

As shown in Fig. 8, each pixel P(p, q) is subpixel SPa(p, q) and SPb(p, q) above and below the associated line G-Lp tires shutter, which is approximately horizontally through the center of the pixel. In other words, subpixel SPa(p, q) and SPb(p, q) of each pixel is placed in the direction of the columns. In each of subpixels SPa(p, q) and SPb(p, q), one of the two electrodes of the storage capacitor (not shown) is connected to an adjacent line CS-A or CS-B CS-W the us. In addition, the line S-Cq bus source for applying the voltage signal representing the image, which should be represented in the pixels P(p, q), is vertically (in the direction of columns) between the pixels, to apply a signal voltage of a TFT (not shown) subpixels (or pixels) on the right side of this bus line of the source. In the layout shown in Fig. 8, one line CS-bus or single bus line shutter shared by two subpixels, thereby achieving the effect of increasing the brightness of the pixels.

[0050]

By excitation of the liquid crystal display device in the configuration shown in Fig. 8, by means of pressure, which are waveform voltage shown in parts (a)-(j) in Fig. 9 can be conected with the inversion of a single point. In the following description, each pixel for simplicity, presumably displays a certain scale.

[0051]

In particular, part (a) of Fig. 9 shows the waveform of the signal voltage display (i.e. the waveform of the signal voltage source), which must be submitted in line S-C1, S-C3 S-C5,..., etc. bus source (this group of bus lines of the source with an odd number is sometimes identified in this document as SO). Part (b) of Fig. 9 shows the waveform of the signal voltage display, which up to the wives to go in the line S-C2, S-C4, S-C6,..., etc. bus source (this group of bus lines of the source with an even number is sometimes identified herein as SE). Part (c) of Fig. 9 shows waveforms of opposing voltage storage capacitor, supplied in line CS-A CS-bus, and part (d) of Fig. 9 shows waveforms of opposing voltage storage capacitor, supplied in CS-B. as part (e), (f), (g), (h), (i) and (j) in Fig. 9 shows waveforms of the voltage signals of the stopper, supplied in a line G-L1 G L2, G-3 and G-4, G-5 and G-L6 bus shutter, respectively. The period between the time when the voltage on one line of the bus shutter is changed from the low level VgL at a high level VgH, and the time when the voltage on the next line bus shutter changes from VgL to VgH, is one period of the horizontal scan (1H). In addition, the period in which the voltage on the bus line shutter retains a high level (VgH), sometimes referred to herein as "selected period PS.

[0052]

Because each pixel supposedly displays a certain scale in this example, voltage display signals (voltage signals of the source), as shown in parts (a) and (b) in Fig. 9, have an oscillating waveform, the amplitude of which is always constant. One period of the oscillation voltage of the signal is and the display is two periods of the horizontal scanning (2H), and the polarity of the signal voltage display is inverted every line. In addition, the waveform of the line voltage SO bus source (which may be S-C1, S-C3 and so on) and line SE bus source (which may be S-C2, S-C4, and so on) have phases that differ from each other by 180 degrees, and the voltage signal display inverts its polarity each column. As a result, can be done excitation with one inversion point.

[0053]

In General, when the excitation of the TFT, when the voltage on the bus line of the source is applied to subpixel electrode through the TFT, the voltage should be slightly vary due to changes in the waveform of the voltage signal of the shutter. This phenomenon is sometimes called "phenomenon of penetration". Thus, taking into account the phenomenon of penetration, a counter voltage is defined as approximately equal to the Central value of the waveform of the voltage after the voltage on the bus line of the source is applied to subpixel electrode. In parts (a) and (b) in Fig. 9, the signal voltage corresponding to the waveform of the voltage which is applied to subpixel electrode as a voltage, which is higher than the opposing voltage is identified by a "+"sign, while the voltage signal corresponding to the waveform of the voltage which is applied to the peak of elname electrode as a voltage, lower opposing voltage is identified by the sign "-". These signs "+" and "-" correspond to the directions of the electric field applied to the liquid crystal layer. In other words, the direction of the electric field applied to the liquid crystal layer, when the "+"sign is opposite to the direction of the electric field applied to it when the "-"sign.

[0054]

When the voltage signal of the shutter on one line bus shutter is VgH, the TFT connected to the bus line of the shutter, turn on, and subpixel attached to this TFT, a voltage signal display. Then, after the voltage on the bus line shutter is set to VgL, a counter voltage storage capacitor is changed. Also, since this is a counter voltage storage capacitor is changed differently from the point of view of values, direction and sign of the change relative to the two subpixels, the effective voltage applied to the respective liquid crystal layers of these subpixels, become different from each other.

[0055]

As shown in part (c) and (d) in Fig. 9, in this example, the opposing voltage capacitor lines CS-A and CS-B CS-bus oscillate with the same amplitude and in the same period. Nab is emer, their amplitude can be two times Vad (see Fig. 6), and the period may be 1H. Similarly, if the phase of the oscillating waveform of one of the CS-A and CS-B is shifted by 180 degrees, this phase should coincide with the phase of the oscillating waveform of others. In other words, their phases are offset to 0,5H. If the first change in the voltage on the line CS-bus associated with the data subpixel electrode is increased after the voltage on the associated bus line shutter is changed from VgH to VgL, the average voltage applied to this subpixel electrode becomes higher than the voltage of the signal display on the associated bus line of the source, when the voltage on the associated bus line shutter is VgH. On the other hand, if the first change in the voltage on the associated line CS-bus is a decrease in the average voltage applied to this subpixel electrode becomes lower than the voltage of the signal display on the associated bus line of the source, when the voltage on the associated bus line shutter is VgH.

[0056]

As a result, if the sign is assigned to the voltage signal display, shown in part (a) and (b) in Fig. 9, the "+" and if the change in voltage on the line CS-bus is increased, the effective voltage applied to the liquid crystal layer is in the above, when the voltage change is reduced. On the other hand, if the sign is assigned to the voltage signal display, shown in part (a) and (b) in Fig. 9, the "-" and if the change in voltage on the line CS-bus is increased, the effective voltage applied to the liquid crystal layer becomes lower when the voltage change is reduced.

[0057]

Fig. 8 shows the state of each pixel P(p, q) and its subpixel SPa(p, q) and SPb(p, q) in one vertical scanning period (which is referred to in this document as "the period of human scan"). The next three characters, which are placed symmetrically with respect to the line bus shutter associated with each pair of subpixels indicate the status of these subpixels.

[0058]

The first character "H" or "L" indicates which of the two operating voltages applied to the two subpixels, above or below the other. In other words, the symbol "H" indicates that the applied effective voltage is relatively high, and the symbol "L" indicates that the applied effective voltage is relatively low. The second sign "+" or "-" indicates which of the two voltages applied to the counter-electrode and subpixel electrode above the other (i.e. the direction of the electric field applied to the liquid crystal layer of this subpixel). The other is the capture, the "+" sign indicates that the voltage applied to subpixel electrode higher than the voltage applied to the counter-electrode, and the sign "-" indicates that the voltage applied to subpixel electrode, is lower than the voltage applied to the counter-electrode. Similarly, the third character "A" or "B" indicates the line CS-bus CS-A or CS-B.

[0059]

For example, let's check the status of subpixel SPa(1, 1) and SPb(1, 1) of pixel P(1, 1). As can be seen from parts (a) and (e) in Fig. 9, in the period in which selected GL-1 (i.e. in the period PS, in which the voltage on the bus line shutter is VgH), the voltage signal display - "+". In addition, when the voltage signal of the shutter on the GL-1 is changed from VgH to VgL, the voltage on the two lines CS-bus associated with two subpixels are in the States, as indicated by the arrows (i.e. the leftmost set of arrows), shown in part (c) and (d) in Fig. 9. Thus, the first change in opposing voltage storage capacitor attached to the SPa(1, 1), after the voltage signal of the shutter on the GL-1 is changed from VgH to VgL, is "increasing" (indicated by "U"), as can be seen from part (c) of Fig. 9. On the other hand, the first change in opposing voltage storage capacitor attached to the SPb(1, 1), after the voltage signal of the shutter on the GL-1 is changed from VgH to VgL, is "the picture is the group" (indicated by "D"), as can be seen from part (d) of Fig. 9. Therefore, the effective voltage applied to SPa(1, 1), is increased, and the effective voltage applied to the SPb(1, 1), is reduced. As a result, the effective voltage applied to SPa(1, 1)becomes lower than the voltage applied to the SPb(1, 1), and therefore, the characters "L" and "H" join SPa(1, 1) and SPb(1, 1), respectively.

[0060]

In respect of subpixel SPa(1, 2) and SPb(1, 2) of pixel P(1, 2), in the period in which selected GL-1, the voltage of the signal display is "-", as can be seen from part (b) of Fig. 9. In addition, when the voltage signal of the shutter on the GL-1 is changed from VgH to VgL, the voltage on the two lines CS-bus associated with two subpixels are in the States, as indicated by the arrows (i.e. the leftmost set of arrows), shown in part (c) and (d) in Fig. 9. Thus, the first change in opposing voltage storage capacitor attached to the SPa(1, 2), after the voltage signal of the shutter on the GL-1 is changed from VgH to VgL, is "increasing" (indicated by "U"), as can be seen from part (c) of Fig. 9. On the other hand, the first change in opposing voltage storage capacitor attached to the SPb(1, 2), after the voltage signal of the shutter on the GL-1 is changed from VgH to VgL, is a "reduction" (indicated by "D"), as can be seen from part (d) of Fig. 9. Therefore,the effective voltage, attached to the SPa(1, 2), is reduced, and the effective voltage applied to the SPb(1, 2), increases. As a result, the effective voltage applied to SPa(1, 1)becomes lower than the voltage applied to the SPb(1, 2), and therefore, the characters "L" and "H" join SPa(1, 2) and SPb(1, 2), respectively.

[0061]

In addition, in respect of subpixel SPa(2, 1) and SPb(2, 1) of pixel P(2, 1), in the period in which selected GL-2, the voltage signal display is "-", as can be seen from part (a) of Fig. 9. In addition, when the voltage signal of the shutter on the GL-2 is changed from VgH to VgL, the voltage on the two lines CS-bus associated with two subpixels are in the States, as indicated by the arrows (i.e. the second left set of arrows), shown in part (c) and (d) in Fig. 9. Thus, the first change in opposing voltage storage capacitor attached to the SPa(2, 1), after the voltage signal of the shutter on the GL-1 is changed from VgH to VgL, is a "reduction" (indicated by "D"), as can be seen from part (d) of Fig. 9. On the other hand, the first change in opposing voltage storage capacitor attached to the SPb(2, 1) after the voltage signal of the shutter on the GL-2 is changed from VgH to VgL, is "increasing" (indicated by "U"), as can be seen from part (c) of Fig. 9. Therefore, the effective voltage applied to the Pa(2, 1)increases, and the effective voltage applied to the SPb(2, 1), is reduced. As a result, the effective voltage applied to SPa(2, 1)becomes lower than the voltage applied to the SPb(1, 2), and therefore, the characters "L" and "H" join SPa(2, 1) and SPb(2, 1), respectively. You can see that the corresponding subpixel eventually have a state shown in Fig. 8 thus.

[0062]

Not necessarily, if the phase of the waveform of the voltage on each line, SO bus source (shown in part (a) of Fig. 9) or SE (shown in part (b) of Fig. 9) is shifted 180 degrees in the frame that comes after the frame shown in Fig. 9, can be performed excitation alternating current in which the direction of the electric field applied to the liquid crystal layer is inverted every period of human scan.

[0063]

In addition, to avoid changing the order of the values of the effective voltages applied to the respective subpixels each pixel (i.e. the composition of the respective orders of magnitude of the brightness values of these subpixels in the display screen, as indicated by the placement of characters "H" and "L" in Fig. 8) each frame, each time the phase of the waveform of the voltage on bus line source is shifted, the phase of the waveforms of the voltage on lines CS-A and CS-B CS-bus also can be shifted by 180 degrees. Next, the spacecraft is re, which comes after the frame shown in Fig. 8, each set of characters "+" and "-"shown in Fig. 8, may be interchanged with each other (for example, (+, H)↔(-, H) and (+, L)↔(-, L)).

[0064]

As shown in Fig. 8, the signs "+" and "-"indicating the polarity (i.e. the electric field direction) of the respective pixels are inverted in a period of two pixels (i.e. two columns) in the row direction (i.e. horizontally)and in the column direction (i.e. vertically) in order(+,-), (+,-), (+,-), (+,-) etc. in Other words, the inversion of a single point is implemented, if you look pepicello.

[0065]

It then examines subpixel rank high brightness (i.e. bright subpixel identified by symbol "H" in Fig. 8). In relation to the direction of rows (for example, in relation to the SPa in the first row), their polarity is not inverted and remain +H, +H, +H, etc. In the direction of columns (for example, in the first column), on the other hand, their polarities are inverted in a period of two pixels (i.e. two lines) (+H, -H) (+H, -H) (+H, -H) (+H, -H), etc. in Other words, the excitation inversion lines is implemented in respect of such subpixels rank high brightness. Dark subpixel identified by symbol "L"is also available in the same regular order.

[0066]

As shown in Fig. 8, if the excitation inversion one point the issue is neetsa by way multipexing excitation, disclosed in patent document No. 3, bright subpixel should be placed in a checkerboard pattern. For example, if you pay attention to the line of the pixel, it is possible to see that bright subpixel placed in a zigzag manner in the direction of the rows in accordance with the arrangement of the polarities of the voltages of the display signals supplied to the respective liquid crystal layers of pixels. In other words, if a bright subpixel located in the upper half of the pixel, when viewed in the direction of the columns, bright subpixel is in the bottom half of another pixel that is adjacent to the above in the direction of the rows, when viewed in the direction of the columns. Therefore, when you see lines that are parallel to each other in the direction of the lines, these lines appear blurred, what is the problem.

[0067]

Then, with reference to Fig. 3-5 describes how the liquid crystal device 100A display as an option for implementation of the present invention can overcome the problem described above.

[0068]

Fig. 3 shows waveforms of various voltages (or signals)to excite the liquid crystal device 100A display as an option for implementation of the present invention. In Fig. 3 shows the voltage Vg(m)-Vg(m+7) of the signals of gate voltages Vcsa and Vcsb CS signals and voltages Vlca(m)-Vlca(m+7) and Vlcb(m), which should be applied to the respective liquid crystal layers of subpixels. In particular, Vlca(m)-Vlca(m+7) represent waveforms of voltages applied to the respective liquid crystal layers of the bright subpixels. On the other hand, since the voltage applied to the respective liquid crystal layers of dark subpixels have the same waveform in any row of pixels, only Vlcb(m) is shown in Fig. 3. It should be noted that if the voltage display signals with waveforms shown in parts (a) and (b) in Fig. 9, are used as voltage signals to the display, which must be filed in the bus line of the source can be conected with the inversion of a single point.

[0069]

As shown in Fig. 3, the waveform of the oscillating voltage Vcsa applied to line 24a CS-bus (associated with bright subpixels) liquid crystal device 100A of the display, has at least three potential, which include two potential that specify the maximum amplitude of the Vcsa(p-p) oscillating voltage (according 2Vadd), and one potential, which is consistent with the average potential of the oscillating voltage. In this case, the average potential of the oscillating voltage" does not always mean simple average of the two potentials, which specify maksimalno the amplitude of the oscillating voltage, but the "current average" of the oscillating voltage. More specifically, in one period of the waveform of the oscillating voltage, the sum of the areas of the parts that are above average potential becomes equal to the sum of the areas of the parts that are below it. It should be noted that the oscillating voltage, which is described below, has a waveform which is symmetrical with respect to the centerline between the two potentials, which represent the maximum amplitude, a simple average of the two potentials, which represent the maximum amplitude of the oscillating voltage, consistent with the current average of the oscillating voltage.

[0070]

In addition, the time period in which the oscillating voltage has a potential which is equal to the average potential of the waveform of the oscillating voltage (i.e. the flat part), TFT, owned by the pixels that are connected to the CS line bus, to which is applied an oscillating voltage, off. In the following example, the moment when the line voltage bus shutter is reduced to VgL to turn off the TFT is in the middle of the period in which the oscillating voltage has a medium potential. In this example, the waveform of the oscillating voltage has three potential described above. However, in addition, the waveform of the oscillating voltage may also have pain the three potentials (for example, five, seven or nine potentials), if the three potential are included.

[0071]

The effective voltage V1 applied to the respective liquid crystal layers of the bright subpixels get by calculating the integral squared amplitude shaded parts Vlca(m)shown in Fig. 3, in time and then calculating its average over time. In this case, the operating voltage is obtained for one period of the vertical scan. On the other hand, the current voltage V2 is applied to the respective liquid crystal layers of dark subpixels get by calculating the integral squared amplitude shaded parts Vlcb(m)shown in Fig. 3, and the subsequent calculation of the squared average. Therefore, because of the oscillating voltage is superimposed on the voltage signal display, the effective voltage V1 is always higher than the operating voltage V2 regardless of the polarity of the oscillating voltage display. In addition, through the implementation of such configuration that when the line voltage bus shutter is set to VgL to turn off the TFT, adjudged and is exactly in the middle of the period in which the oscillating voltage has a medium potential, it is possible to prevent the variation among whom he stresses, applied to the respective liquid crystal layers of the bright subpixels, under the influence of the oscillatory voltage. In this respect, all the disclosure of Japanese laid patent publication No. 2005-99746 incorporated herein by reference.

[0072]

As described above, it is optimal to set the time when the TFT is turned off, exactly in the middle of the period in which the oscillating voltage has a medium potential. However, provided that the time when the TFT is turned off, gets in the period in which the oscillating voltage has a medium potential, the average voltage applied to the respective liquid crystal layers may be almost constant. In addition, preferably, if the potential of the oscillating voltage when the TFT is turned off, is the average of the oscillating voltage, as described above. However, provided that this potential is between the two potentials, which represent the maximum amplitude, implemented at least display state shown in Fig. 5A and 5B.

[0073]

Fig. 4 is a graph showing how the effective voltages V1 and V2 applied to the respective liquid crystal layers of subpixels, change with the voltage Vs of the signal display when the applied oscillatory voltage with amplitude 2Vadd. In this case, the value 2Vad is defined when the voltage of the signal display is 0 Volts, the value V1 becomes equal to the 2nd Century as well, the higher the value 2Vadd, the greater the value V1.

[0074]

The larger the value of the voltage signal display, the closer to the value of the signal voltage of the display becomes the value V1. On the other hand, the value of V2 is always equal to the voltage value of the signal display. Thus, it is possible to see that in this liquid crystal device 100A display, V1 and V2 also satisfy the relationship shown in Fig. 7, similarly to the liquid crystal display device of patent document 3, and the dependence on the angle γ characteristics can also be reduced to not less effective.

[0075]

Fig. 5A schematically illustrates a display state when the liquid crystal device 100A of the display is excited by pulse inversion one point. Fig. 5A corresponds to Fig. 8, which has already been mentioned, and uses the marks identical signs used in Fig. 8.

[0076]

As can be seen from Fig. 5A, in this liquid crystal device 100A display subpixel, SPa associated with each line CS-A CS-bus, which is served oscillatory voltage Vcsa, become bright subpixels regardless of the polarity of the voltage signal display. So about what atom, if you pay attention to the row of pixels, it is possible to see that these pixels are arranged so that their respective bright subpixel are in the same position in the column direction and are placed in line. For example, in the first line, bright subpixel placed in the top half of each pixel in the column direction. On the second line, on the other hand, bright subpixel placed in the bottom half of each pixel in the column direction. Then, on the third line, bright subpixel placed in the top half of each pixel in the column direction. Also, in the fourth line, bright subpixel placed in the bottom half of each pixel in the column direction. Thus, the corresponding bright subpixel column of pixels alternately change its position vertically in the direction of the columns, as in this embodiment has adopted the configuration in which one line CS-bus is shared across multiple pixels, which are adjacent to each other in the column direction. If two lines CS-bus is provided for each pixel, however, the bright subpixel can be placed in the upper half of each pixel in the column direction (see Fig. 5B).

[0077]

As shown in Fig. 5A, the signs "+" and "-"indicating the polarity (i.e. the electric field direction) of the respective pixels screensaver ringtones is, inverted in a period of two pixels (i.e. two columns) in the row direction (i.e. horizontally)and in the column direction (i.e. vertically) in order(+,-), (+,-), (+,-), (+,-) etc. in Other words, the inversion of a single point is implemented, if you look pepicello.

[0078]

It then examines subpixel rank high brightness (i.e. subpixel identified by symbol "H" in Fig. 5A). In relation to the direction of rows (for example, in relation to the SPa in the first row), their polarities are inverted in a period of two pixels (i.e. two lines) (+H, -H) (+H, -H) (+H, -H), etc. In the direction of columns (for example, in the first column), on the other hand, their polarities are inverted in a period of two pixels (i.e. two lines) (+H, -H) (+H, -H), (+H, -H) (+H, -H), etc. in Other words, the excitation inversion one point also being implemented in respect of such subpixels rank high brightness. Subpixel identified by symbol "L"is also available in the same regular order.

[0079]

Thus, it is possible to see that in this liquid crystal device 100A of the display polarity of the voltages applied to the respective liquid crystal layers are distributed at the unit, and the flicker occurs much less likely than in the liquid crystal display device according paten the resultant document number 3 it is shown in Fig. 8.

[0080]

Even in the liquid crystal device 100B display shown in Fig. 2(b), row of pixels can also be placed so that their respective bright subpixel are in the same position in the column direction and placed in a line, similar to the liquid crystal device 100A of the display. Fig. 5B schematically illustrates how the liquid crystal device 100B display performs an operation display when excited by excitation with one inversion point voltage of the signal is identical to the voltage signal already described for the liquid crystal device 100A of the display. It should be noted that the liquid crystal device 100B display does not have a capacitor 22b of the liquid crystal device 100A of the display, and therefore it does not require voltage Vcb CS signal.

[0081]

When comparing Fig. 5B with Fig. 5A can be easily seen that bright subpixel each pixel in the row is in the same position in the column direction (i.e. in the top position in this example) in Fig. 5B, which is a difference from the layout shown in Fig. 5A. In addition, in this liquid crystal device 100B display, excitation with one inversion point can also be performed not only pepicello, but also on the basis of bright is subpixels. In addition, in this liquid crystal device 100B display bright subpixel each pixel in the row is in the same position in the column direction. In other words, two pixels that are adjacent to each other in the row direction, has its bright and dark subpixel placed in the same order as two pixels that are adjacent to each other in the column direction. In other words, in this liquid crystal device 100B display bright subpixel are never next to each other in the column direction. Therefore, we can say that the display state shown in Fig. 5B, reaches a higher spatial resolution than the display state shown in Fig. 5A. It should be noted that if the cumulative capacitor 22b dark subpixels cannot be excluded, the display state shown in Fig. 5B, can be achieved by providing two lines CS-bus for each pixel in the liquid crystal device 100A of the display, as described above.

[0082]

In liquid crystal devices 100A and 100B display according to the options of implementing the present invention, by definition, regardless of the polarity of the voltage signal display, what subpixels should kiss of celebate the Noah voltage, can be selected subpixel, which should be bright subpixels. This should preferably be applied to the liquid crystal display device, each row of pixels comprises pixels representing an even number of flowers.

[0083]

In General liquid crystal display device three pixels representing red, green and blue which are three primary colors of light, form one color display pixel. Also, by controlling the brightness of these pixels is known liquid crystal display device performs the operation of the color display. It should be noted that "color display pixel" and "pixel"as used in this description, sometimes referred to as a "pixel" and "subpixel" in another place. For the layout of pixels (or layout of color filters), commonly used alternate layout. If this liquid crystal display device, one color display pixel is composed of R-, G - and B-pixels, which are arranged in the row direction, is excited by pulse inversion one point, the line of pixels must have the order of such polarity as R(+), G(-)B(+)R(-), G(+), B ( -), etc. in Other words, if the polarity of the voltage applied to adjacent the pixel is inverted, the polarity of the voltage applied to the next pixel representing the same color are also inverted.

[0084]

Meanwhile, in the liquid crystal display device, which has recently been developed, which has an extended range of color reproduction, one color display pixel is composed not only of the red (R), green (G) and blue (B) pixels, but also from yellow (Y), cyan (C) or Magenta (M) pixel. If this liquid crystal display device in which four pixel representing these colors are periodically placed in the same order in the direction of the rows, is excited by excitation with one inversion point, the line of pixels must have the order of such polarity as R(+), G(-)B(+), Y(-), R(+), G(-)B(+), Y ( -), and so on, and the voltage of the same polarity must be applied to the pixels in the same color. Therefore, in the liquid crystal display device of patent document 3 shown in Fig. 8, if the first, second, third and fourth columns are reported to be R, G, B and Y (which must reside in the same order after that), the corresponding bright subpixel R - and B-pixels should be in the top half in the direction of the columns. In this case, parallel lines that appear in the direction of lines look blurred and, but also in the form of spots, that is also a problem. For example, when the displayed gray line, R - and B-pixels, bright subpixel which are in the top half of the look in spots. It should be noted that if a white pixel is added instead of a Y-pixel, the color reproduction range cannot be extended, but the display brightness can be increased. However, the problem is identical to the just described problem also occurs in this case.

[0085]

In the liquid crystal device 100A, 100B display, on the other hand, bright subpixel pixels in all colors placed exactly in line in the direction of the rows. Therefore, even when such parallel lines are drawn in the direction of the rows, it is possible to prevent the line going in the direction of the rows, looked in spots.

[0086]

In the example described above, the oscillating voltage Vcsa supposedly has a period of oscillation 2H. However, one period of the oscillations can also be 1H. But if one period of the oscillating voltage is short, its waveform Satupaitea due to the constant CR is a time line CS-bus (i.e. the approximated impedance load line CS-bus). To avoid this situation, one period of oscillation of the oscillating voltage has at least eight the AZ exceed the constant CR is the time line CS-bus. In this case, however, the phases of the respective oscillatory voltages must be adjusted for each row of pixels so that the moment when the TFT is turned off, gets in the period in which the oscillating voltage has a third potential. This purpose can be provided N connecting electrically independent CS lines, and they can be made mutually different oscillation voltage. Then the oscillating voltage may be a long period when satisfying the above conditions. From the point of view of this idea about the relationship between one period of the oscillating voltage and the number of connecting electrically independent CS-lines, all the disclosure of Japanese patent publication No. 4104639 incorporated herein by reference.

[0087]

Multipixel excitation need not necessarily be performed in each scale, and can only be applied to required of them. For example, if the operation display is performed in 256 scales semitones #0-255, multipixel excitation can be enabled only when the operation display is at the low scales of tones (for example, either in scale #96 or less, or scale #64 or less). Since the γ-characteristic of the liquid crystal display device with the mode of display is usually black image demons who demonstrates strong dependence on the angle at such low scales of tones, the dependence on the angle γ characteristics can also be reduced, even when adopted this method of excitation.

[0088]

In the above description, the direction of the rows is assumed to be the horizontal direction on the display screen, and the direction of the columns is assumed to be the vertical direction on it. However, these two areas can also switch. In other words, the bus line of the shutter can also be performed with the opportunity to go vertically, and the bus line of the source can also be performed with the opportunity to go horizontally. In other words, the directions of rows and columns, described above, can be swapped with each other. In addition, in the above description of the line CS-bus presumably are parallel to the bus lines of the shutter. But the lines CS-bus can also be done in parallel to the bus lines of the source.

Industrial applicability

[0089]

In addition, the present invention is widely applicable not only to liquid crystal display device with MVA-mode, but also to liquid crystal display devices with the regime PSA (alignment in polymers with microrelief surface), RTN-mode (also called "VATN mode"), IPS-mode and I-mode.

List of links

[0090]

10 - pixel

10a, 10b - subpixel

12 - bus line shutter

13a, 13b - liquid crystal capacitor

14 - bus line of the source

16a, 16b - TFT

18a, 18b - subpixel electrode

22a, 22b - storage capacitor

24a, 24b - line CS-bus

100A, 100B - liquid crystal display device.

1. The liquid crystal display device, comprising:
- the set of pixels, which are arranged in columns and rows for the formation of a matrix pattern, each of the set of pixels includes first and second subpixel, the first subpixel shows higher brightness than the second subpixel, at least in a specific scale;
- many bus lines and source, each of which is associated with one of the columns of pixels;
- many bus lines shutter, each of which is associated with one of the rows of pixels;
many TFT (thin film transistors), each of which is associated with one of the first and second subpixels that everyone has mentioned pixel; and
many of the first lines CS-bus, each of which is associated with the first subpixel one of the pixels,
- the first subpixel includes: a liquid crystal capacitor, which is formed by the first electrode subpixel, the liquid crystal layer and the counter-electrode, which is converted to power is the first subpixel through the liquid crystal layer; and the first storage capacitor, which is formed by the electrode of the first storage capacitor that is electrically connected to the electrode of the first subpixel, the insulating layer and the counter-electrode of the first storage capacitor, which is converted to the electrode of the first storage capacitor through an insulating layer, and
- the second subpixel includes a liquid crystal capacitor, which is formed by the electrode of the second subpixel and counter-electrode which is facing the second electrode of subpixel through the liquid crystal layer, and
while the first voltage CS signal, which is applied to the counter-electrode of the first storage capacitor through associated with it the first line CS-bus is oscillatory voltage, one period of which is less than one vertical scanning period, and has at least three potential that includes first and second potentials, which represent the maximum amplitude, and a third potential between the first and second potentials, and
- in this case, when the voltage signal of the shutter, which is supplied to the bus line shutter associated with an arbitrary row of pixels, and which, being high becomes low, the first voltage CS signal filed in associated with it pervailing CS-bus, has the third potential.

2. The liquid crystal display device under item 1, in which the third potential is the average of the first and second potentials.

3. The liquid crystal display device under item 1 or 2, additionally containing a number of second lines CS-bus, each of which is associated with the second subpixel one of the pixels,
- the second subpixel includes a second storage capacitor, which is formed by the electrode of the second storage capacitor that is electrically connected to the electrode of the second subpixel, the insulating layer and the counter-electrode of the second storage capacitor that is facing toward the electrode of the second storage capacitor through an insulating layer, and
while the second voltage CS signal applied to the counter-electrode of the second storage capacitor through associated with it a second line CS-bus, is constant over one period of the vertical scan.

4. The liquid crystal display device according to p. 3, in which the second voltage CS signal is opposing the voltage applied to the counter-electrode.

5. The liquid crystal display device under item 1 or 2, in which the second subpixel has no capacitor.

6. The liquid crystal device is istwo display according to any one of paragraphs. 1, 2 and 4, in which the first and second subpixel placed in the same order as in the two pixels that are adjacent to each other in the row direction and two pixels that are adjacent to each other in the direction of columns.

7. The liquid crystal display device according to any one of paragraphs. 1, 2 and 4, in which each of the multiple first lines CS-bus is connected to one of the N connecting the CS lines, which are electrically independent from each other.