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Method for manufacturing optical devices and appropriated devices |
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IPC classes for russian patent Method for manufacturing optical devices and appropriated devices (RU 2335035):
Method for manufacturing optical devices / 2291519
Proposed method used for manufacturing optical and semiconductor optoelectronic devices, such as laser diodes, optical modulators, optical amplifiers, optical switching units, and optical detectors, involves device manufacture from part of chip of quantum potential well structure including stage of device chip treatment by plasma etching so as to produce elongated defects at least in part of layer covering part of device chip as stage in technology of mixing quantum potential wells for next stage of thermal annealing.
Emitting diode / 2333571
Invention pertains to lighting technology and can be used as a light source for internal and external lighting equipment for aircraft, equipped with night vision. The emitting diode of the visible range of the spectrum has a light-emitting-diode, put into a case, light-outputting lens with a flat base and put between the light-emitting-diode and the base of the light-outputting lens, and a clipping filter with integrated transmission in the visible spectrum of more than 80% and less than 1% in the 650-950 nm wavelength range.
Led with double-layer compound zone / 2331951
LED includes at least one semiconductor light emission element coated with a lens featuring a notch over the light emission element, with a double-layer compound zone formed in that notch. The said zone includes lower and upper layers of an optically transparent compound. Lower compound layer with luminipherous particles distributed in it has higher hardness in the solidified state than the upper layer.
Semiconductor structure with active zone (alternatives) / 2328795
Invention pertains to a semiconductor structure with an active zone, such as a light-emitting diode or photodiode (10, 16, 24, 26, 36, 46, 54, 68, 74, 80), consisting of a substrate (SUB) with at least, two active zones (AZ1-AZn), each of which emits or absorbs radiation of different wave length. According to the invention, a multi-wave diode can be obtained, whose first (lower) active zone (AZ1) is grown of the surface of the substrate (SUB), one or more extra active zones (AZ1 - AZn) epitaxially grown one on top of the other. In that case, active zones (AZ1 - AZn) are joined in series from the lower active zone (AZ1) to the upper active zone (AZn) through tunnel diodes (TD1-TDn), serving as low resistance resistors.
Method of nitride monocrystal growth on silicon plate, nitride semi-conductor light emitting diode, which is produced with its utilisation, and method of such production / 2326993
When nitride monocrystal is grown, at first the silicon base is prepared, which has surface with crystallographic orientation (111), the first nitride buffer layer is formed on it, on which amorphous oxide film is created, then the second nitride buffer layer is formed on amorphous oxide film is formed, and nitride monocrystal is formed on the second nitride buffer layer. Also light emitting device is given and method of its manufacturing.
Light-emitting semiconductor module / 2321103
Proposed light-emitting semiconductor module has solid base made of heat-conducting material in the form of disk with vertically positioned projection in center. Light-emitting semiconductor component is disposed on substrate above base projection. Contact member affording connection of light-emitting component contacts to external electrical conductors is made in the form of insulating plate whose top and bottom surfaces are covered with metal and insulation. Through hole provided in plate center is shaped to follow shape of external side surface of base projection; plate is disposed on top of base so that base projection passes through plate hole. Upper surface of plate has metal-plated sections near central hole which are used to provide electric coupling between contacts of light-emitting component and metal layer of plate. Disposed on end sections of plate, on its top and bottom surfaces, are metal-plated sections designed for connecting external electrical conductors to plate.
Light-emitting diode device / 2317612
Proposed light-emitting diode device that functions to essentially enhance axial luminous intensity while fully utilizing direct and side emission of chip at wrap angle of minimum ±90° for shaping any desired indicatrix of color or white light emission has radiation source with one or more optical-range light-emitting chips and converging lens with butt-end raster-taper system; space between emitters and lens (well) is filled with optically transparent polymerizing material. Lateral surface of lens is made in the form of aspherical mirror surface whose dimensions Dm and dm are correlated with dimensions of butt-end raster-taper system DRTS and dRTS and with those of well Dw and dw by means of definite dependencies; minimal diameter of lateral mirror surface D0 = (0.8-1.3)DRTS. Lens material refractive index n2 is higher than that of well polymerizing material n1. Emitter surface can be raised above plateau surface by d0 = (0.1-1) mm.
Method for producing porous photoluminescent silicon / 2316077
Source single-crystalline silicon is subjected to electrolytic etching in double-electrode cell using electrolyte that has water, ethanol, and hydrofluoric acid. Etching is conducted in two steps. First step includes source silicon etching at DC current with positive potential applied to silicon wafer. Second step involves polarity reversal of voltage applied to etching cell without changing its value. In the process negative potential is applied to silicon wafer and material is etched for 10-60 minutes.
Method of growing nonpolar epitaxial heterostructures based on group iii element nitrides / 2315135
Invention relates to technology of manufacturing semiconductor materials and devices via gas epitaxy technique from organometallic compounds, in particular to manufacturing heterostructures based on group III element nitrides and devices utilizing the same, such as white light diodes, lasers, etc. Method of growing nonpolar epitaxial heterostructures for white light-emitting diodes based on compounds and solid solutions of group III element nitrides comprises gas-phase precipitation of one or more layers of heterostructures represented by formula AlxCa1-xN, where 0<x≤1, on substrate, which is a-langacite a-La3Ga5SiO14, with disagreement of c-parameters of lattice "substrate-epitaxial layer AlxCa1-xN" not exceeding the value within a range from -2.3% at x=1 to +1.7% at x=0 and disagreement of thermal expansion coefficient in direction of c-axis not exceeding the value within a range from +49% at x=1 to -11% at x=0.
Method of growing thin monocrystalline film, light-emitting device based on ga2o3, and a method for manufacturing the same / 2313623
Invention relates to technology of producing thin oxide monocrystalline films and may be used in optics. Thin monocrystalline film β-Ga2O3 is formed by growing it from gas phase on a substrate prepared from β-Ga2O3 monocrystal. Laser beam is directed to target to excite target atoms. Ga atoms release from the target under thermal and photochemical effects. Free Ga atoms bind to radicals of one or more chamber atmosphere gases to form β-Ga2O3 thin film on substrate. Invention also allows obtaining thin β-Ga2O3 and GaN films as well as high-quality ZnO monocrystals and provides light-emitting device capable of emitting light in UV region.
Method for producing visible light and luminescent sources using this method (alternatives) / 2313157
Proposed method for converting infrared radiation into visible light ranging between yellow-green and yellow to orange-yellow light at output optical power up to 10 W and efficiency of up to 20% includes irradiation of anti-Stokes phosphor in spectral range of 940 to 1030 nm, inorganic material whose spectral absorption band approaches that of infrared radiation being used as anti-Stokes phosphor. Two design alternates of visible light luminescent source are also proposed basing on this method which have different infrared light sources and respective phosphor.
Method of producing photodiodes on crystals of indium antimonid of n-type conductivity / 2331950
Method of producing photodiodes on crystals of indium antimonid of n-type conductivity includes preparation the wafer of initial indium antimonid crystal, generation of p-n pass by implantation beryllium ions with post-implantation annealing, application of protective and stabilise dielectric films and generating of contact combination. According to invention there are used wafers of initial indium antimonid crystal with impurity density 6·1013-2·1014 cm-3, implantation of beryllium ions is implemented at energy 20-40 keV and implantation dose (0.8 - 1.2)·1014 cm-3, post-implantation annealing is implemented fixed at temperature 350-375°C during 20-30 minutes with surface encapsulate film SiO2.
Photo-electric converter and method of its production (versions) / 2331139
Photo-converter with a bilateral working surface made from plates of silicon contains diode structures with n+-p (p+-n) transition to the frontal surface of a silicon plate and isotypic p-p+ (n-n+) transitions to the base area on a back surface of a silicon plate at which the areas and configurations of metallic contacts on frontal and back surfaces coincide with the plan, and the thickness of the photo-converter is commensurable with the diffusion length of the minor carriers of current in the base region. The diode structures are made in the form of separate commuted contact sections combined into the plan on the front and back surfaces with the sites on which contacts are put. The distance between separate neighbouring sections with n+-p (p+-n) transition on the front surface does not exceed double the diffusion length of the minor carriers of current in the base region, and on the frontal surface, free from n+-p (p+-n) transition, and on the back surface, free from contacts, a passivating, anti-reflecting is located. In the second version the said photo-converter has the same construction as in the first variant and additionally on the passivating anti-reflecting film from the front and back sides are situated nano-clusters with the linear size of 10-100 nm from the metallic atoms, the distance between which 2-4 times exceeds the sizes of the nano-clusters. Methods of manufacturing of both variants of photo-converters are also proposed.
Method of obtaining photosensitive structure / 2330352
Method of obtaining photosensitive structure containing a plate of p-type monocrystal silicon with n-type front layer and p-n heterojunction involves joint heating of p-type monocrystal silicon substrate covered with target material, and synthesis of front layer with heterojunction. Target material is a solid porous carbonaceous material with porosity under 15% of volume, previously undergone thermal processing in contact with silicon at 1100-1350°C for 10-20 minutes; the synthesis is conducted at 1100-1250°C; a gap between carbonaceous material and p-type monocrystal silicon plate is not more than 8 micron.
Process of photoconductive radiation-proof film manufacturing / 2328059
Process of manufacturing of cadmium sulphide CdS photoconductive radiation-proof films with injection of lead sulphide PbS includes thermal processing of the film. Before the thermal processing at least one monolayer of fatty acid lead-containing salt is formed by Langmuir-Blodgett technique at the CdS film surface, and the thermal processing continues till obtaining regular distribution of PbS injections in the depth of CdS film.
Method for producing high-speed multicomponent photodetectors built around epitaxial structures ingaas/inp / 2318272
Photodetector producing method includes coating of n-InP/n-In0.53 Ga047 As/n+-InP epitaxial wafer incorporating epitaxial layers n-InP/n-In0.53 Ga0.47 As and substrate n+-InP with silicon nitride film both on n-InP epitaxial layer end and on n+-InP one. Diffusion windows are covered with photolithographic layer by way of plasmochemical etching in silicon nitride film on end of n-InP/n-In0.53 Ga0.47 As epitaxial layers and marks are formed for further alignment of photomask patterns on n+-InP substrate end. Local p-n junction is formed in n-InP/n-In0.53 Ga0.47 As epitaxial layers by cadmium diffusion in soldered exhaust ampoule from Cd3P2 source. Epitaxial wafer n-InP/n-In0.53 Ga047 As/n+-InP is coated with second layer of Si3N4 film on end of n-InP/n-In0.53 Ga0.47 As epitaxial layers. Contact windows are opened in second layer of Si3N4 film and Au/Ti ohmic contacts are made for p+ regions. Contact windows are opened in Si3N4 film on n+-InP substrate side for n+-InP region by way of photolithography and plasmochemical etching. Si3N4 film remains above p-n junction region in this case that functions as clearing coating. Titanium-sublayer gold is evaporated in vacuum so that metal plating is formed for n+-InP substrate contacts. Pattern that affords ohmic contact for n+-InP substrate on one end and forms diaphragm limiting shading region by spatial charge region of multicomponent photodetector only on other end is etched in titanium-sublayer gold by photolithographic method.
Method for producing photodiodes on indium antimonide / 2313854
Proposed method for producing photodiode on indium antimonide includes sequential formation of local p-n junction on substrate, insulating film by anode oxidation, passivating film, and contact pads, anode oxidation being conducted in electrolyte of following composition: 45-55 volume percent of ammonium persulfate [(NH4)2S2O8] in amount of 0.05 m/l dissolved in glycerin; 45-55 volume percent of dimethyl formamide under electrostatic conditions conducted in at least two stages, current density being reduced every next stage. Thermal stability of photodiodes on InSb produced in this way is enhanced by 40-50 °C.
Method for producing photodiodes on indium antimonide / 2313853
Proposed method for producing photodetectors on indium antimonide includes formation of p-n junction on substrate, anodic oxidation to form insulating film, application of passivating dielectric film, and formation of contact system. Surface areas of substrate free from local p-n junction are doped before oxidation by diffusion or ionic implantation including post-implantation annealing to dope concentration of 5·1017-1019 cm-3. In the process distance of 5-50 μm is left between doping region boundary closest to p-n junction and the latter. Passivating film is applied so that distance of minimum 10 μm is left between this film and doping region boundary farthest from p-n junction.
Method for manufacturing group of transistors and photodetectors with vertical color filter / 2311702
Proposed method includes preparation of semiconductor substrate of first polarity of conductivity; formation of one or more epitaxial layers of first [polarity of conductivity with regions of first polarity of conductivity preformed at boundary of layers of deepened regions of first polarity of conductivity and deepened regions of second polarity of conductivity reverse to that of substrate above them; formation of regions of vertical inserts contacting deepened regions of same polarity of conductivity in each epitaxial layer on one end and surface insulator or surface regions of same polarity of conductivity as inserts on other end; formation of surface regions of first and second polarities of conductivity; formation of n-MOS and p-MOS transistors. For manufacturing MOS transistors additionally insulated from substrate, transistors with control p-n junctions, and bipolar transistors insulating shells are formed prior to forming transistors of mentioned types, each shell incorporating deepened region and insert of same polarity of conductivity around transistor; all regions constituting insulating shells and transistors proper are produced in same process operations as those used for photodetector regions.
Thick-film contact of silicon photoelectric converter and its manufacturing process / 2303830
Proposed contact is built on thin silicon semiconductor wafer and has narrow current-carrying conductors in the form of current-collecting strips crossed at right angle by two wider current-carrying conductors in the form of current-collecting strips disposed symmetrically either side of longitudinal axis. Metal coat applied to 95-98% of surface area of narrow current-collecting strips can be disposed at distance of 0 - 3 mm from edges of wide current-collecting strips, that is, in immediate proximity of wide current-collecting strip edges. Invention specification also gives manufacturing process for this thick-film contact of silicon photoelectric converter.
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FIELD: physics. SUBSTANCE: invention is related to optical devices manufactured by method induced with additive of quantum well (QW) mixing. Method for manufacturing optical device, in which body from which this device is manufactured, contains at least one quantum well (QW), includes stages whereat mixing of doped material is caused with the said, at least, one quantum well, this doped material containing copper (Cu). EFFECT: development of improved method for manufacturing optical devices, based on quantum well (QW) mixing induced with additive. 30 cl, 16 dwg
The technical field The invention relates to a method of manufacturing an optical device, in particular but not exclusively, to the manufacture of integrated optical devices or optoelectronic devices, such as semiconductor optoelectronic devices, such as laser diodes, optical modulators, optical amplifiers, optical switches, optical detectors, and the like, the Invention also relates to an optoelectronic integrated circuits (OEIC) and photonic integrated circuits (pics)that contain the specified device. The invention, in particular, but not exclusively, relates to a method of manufacturing an optical device using a new and improved method of induced admixture mixing of the quantum well (PCA). The level of technology In optical communication systems is highly desirable monolithic integration of different optical components on a single epitaxial layer. One of the main requirements for monolithic integration is to implement different forbidden energy bands in a single semiconductor epitaxial layer. For example, the coordinate matrix switch type 2×2 containing semiconductor optical amplifiers, passive waveguide couplers and modulators of electropolishing (EP), usually need three prohibited the military power zone. The working wavelength for switches, and hence the amplifier is usually equal to 1.55 μm, but for passive waveguides require a much more wide forbidden energy zone in order to minimize the absorption is distributed according to the waveguides of the light beam. In addition, the optimal forbidden energy absorption zone for EP-modulators approximately 20-50 nm shorter than the amplifier, in order to ensure low insertion loss and high attenuation factor. Patterns with multiple forbidden energy bands are also used in devices such as multi-wave sources in systems with seal wavelength (from the English. wavelength-division multiplexing, WDM) and photodetectors. Currently, for these purposes, explores the variety of technologies. Although technology based on selective recrystallization, look promising, throughout the production process requires expensive installation, such as equipment chemical vapour deposition of ORGANOMETALLIC compounds (HOPPMAN), and two-dimensional structuring (i.e. the formation of the figure) of the energy gap is impossible. Other methods are based on the mixing of the quantum well (PCA). Mixing of the quantum well (PCA) is what is carried out this way, which is promising from the point of view of providing a possible way to monolithic optoelectronic integration. PCA can be performed in the semiconductor materials of the III-V groups of the Periodic table, such as gallium-aluminum-arsenide (AlGaAs) or phosphide-arsenide, indium (InGaAsP), which can be grown on binary substrates, for example, of gallium arsenide (GaAs) or indium phosphide (InP). PCA changes the forbidden energy zone patterns directly after growing due to mutual diffusion of chemical elements of the quantum well (CB) and related barriers to obtaining alloy of the constituent components. The alloy has a forbidden energy zone, which is wider zone in the quantum well immediately after cultivation. Therefore, any optical radiation (light)generated in the quantum well, where PKA not happened, can pass through PKA or "mixed" area of the alloy, which is essentially transparent to the specified optical radiation. In the literature it was reported about the different ways PCA. For example, PCA can be performed by high-temperature diffusion of elements such as zinc, in the semiconductor material containing CB. PCA can also be performed by ion implantation of elements such as silicon, a semiconductor material with CB. This is mode implantable element creates point defects in the structure of the semiconductor material, moving across the semiconductor material, causing mixing in the structure of the quantum well at the stage of high-temperature annealing. This technique PCA described in the article "Applications of Neutral Impurity Disordering in Fabricating Low-Loss Optical Waveguides and Integrated Waveguide Devices", Marsh et al, Optical and Quantum Electronics, 23, 1991, s-957, the contents of which are incorporated herein by this reference. Inherent in these methods, the problem is that, although PKA changes (increases) forbidden energy zone of semiconductor material after cultivation, however, the residual diffusion or implanted dopant can result in significant losses due to high absorption of free carriers on these alloying and impurity elements. Another reported method that provides mixing of the quantum well, is a pure diffusion of vacancies (BPD). When performing BPD upper covering layer of the semiconductor structure of III-V groups are usually made of GaAs or gallium-indium-arsenide (InGaAs). On the top layer of deposited film of silicon dioxide (SiO2). Subsequent rapid thermal annealing of the semiconductor material causes the destruction of connections in a semiconductor alloy and the dissolution of the "sensitive" to silicon dioxide (SiO2ions or atoms of gallium in silicon dioxide, is then in the upper layer remain vacancies. These vacancies then diffuse through the semiconductor structure, causing mixing of the layers, for example, in the structure of the quantum well. Information about how BPD reported in the article "Quantitative Model for the Kinetics of Composition Intermixing in GaAs-AlGaAs Quantum Confined II" authored by Helmy et al, IEEE Journal of Selected Topics in Quantum Electronics, vol.4, No. 4, July/August 1998, pp.653-660, the contents of which are incorporated herein by reference. The reported methods PCA and especially BPD have several disadvantages, namely, for example, the temperature at which gallium is out due to back diffusion of the semiconductor material film of silicon dioxide (SiO2). The task of the at least one aspect of the present invention is to solve or at least partial solution of at least one of the above mentioned disadvantages/difficulties of the prior art. Another object of the invention is to provide an improved method of manufacturing an optical device using an improved method PCA. Disclosure of inventions According to the first aspect of the present invention, a method for manufacturing an optical device, and the body of the device ("device " body portion"), made this device comprises at least one quantum hole, including the steps that cause the mixing of impurity material with at least one quantum well, when this impurity material at least contains copper (Cu). The impurity material may essentially contain copper or its alloy. Unexpectedly, it was found that copper diffuses almost 106times faster than earlier impurities such as zinc. Preferably the method comprises the preliminary step of placing at or near the body of the device layer containing the impurity material. In the first variant of the invention, the impurity material may enter into the composition of the material carrier. The carrier may be a dielectric material such as silicon dioxide (SiO2) or aluminum oxide (Al2About3). In this case, the above-mentioned layer may be deposited directly on the surface of the body of the device, for example, by ion sputtering. In this first embodiment, the above-mentioned layer can be precipitated by installing a diode or magnetron ion sputtering. In the second embodiment, the above-mentioned layer may include a layer of impurity material which may be deposited near the surface of the body of the device separation layer. The separating layer may have a dielectric material, such as silicon dioxide or aluminum oxide (Al2O3). In the above-mentioned layer may be deposited additional layer aprimarily dielectric layer. In this second embodiment, the above-mentioned layer may be deposited using ion sputtering, and the separating layer/an additional layer may be deposited using ion sputtering or other methods, for example plasmodiophoromycota chemical vapour deposition (SHOPP). Preferably, the method of manufacture also includes advanced stages ensure the availability of substrates and cultivation on the substrate of the first optical layer of the shell, the guide layer of the core, containing at least one quantum hole (CB), the second optical layer shell and, optionally, a contact layer. The first optical layer, a guide layer of the core, the second optical layer and the contact layer can be grown by molecular beam epitaxy (IPE) or chemical vapor deposition, ORGANOMETALLIC compounds (HOPPMAN). In one of the modifications of the first variant of implementation mentioned before mixing layer can be removed from the body of the device. Preferably the mixing of impurity material with said at least one quantum well (CB) is called by heating the body of the device to high temperature for a specified time. Fever may be in diapazonom 700° With up to 900°and the specified time may range from 30 seconds to 300 seconds. The step of heating the body of the device to high temperature may include the step of annealing the body of the device, which causes the diffusion of the impurity material in said at least one quantum pit and back diffusion of ions or atoms of the quantum wells in the carrier material or the separation layer. According to the second aspect of the invention, a method for manufacturing an optical device, and the body of the device from which manufactured the device comprises at least one quantum pit, including the stage at which cause diffusion of the first material in the body of the device, as well as the reverse diffusion of the material (e.g., ions or atoms) of the body of the device in the second material. Therefore, this aspect is advantageous combination of induced admixture of mixed and pure mixing. In one embodiment, the first material may be doped material containing copper (Cu), and the second material may be a dielectric material such as silicon dioxide (SiO2) or aluminum oxide (Al2About3). According to a third aspect of the invention, a method for manufacturing an optical device, and the body of the device from which izgotavlivaet the device, contains at least one quantum hole, comprising the steps are formed on the surface of the body of the device drawing from many areas of the impurity material, and at least two of these areas are separated from the surface by different distances, and cause mixing of the impurity material mentioned many areas with the said at least one quantum well in order to configure the forbidden energy zone mentioned at least one mixed quantum wells mentioned in at least two areas on different values. Preferably the impurity material at least contains copper (Cu). According to a fourth aspect of the invention proposed an optical device manufactured by the method according to any of the first, second or third aspects of the present invention. The body of the device may be made in the system of semiconductor materials of the III-V groups. System semiconductor materials of the III-V groups may be a system on the basis of gallium arsenide (GaAs), and it can operate at the wavelength (wavelengths) being between 600 nm and 1300 nm. Alternatively, the system of semiconductor materials of the III-V groups may be a system on the basis of indium phosphide, and it can operate at the wavelength (wavelengths) being between 1200 nm and 1700 nm. The body of the mouth of the STS can be performed, at least partially, from a gallium-aluminum-arsenide (AlGaAs), gallium-indium-arsenide (InGaAs), a phosphide of gallium, indium (InGaAsP), indium arsenide-gallium-aluminum (InGaAlAs) and/or indium phosphide-arsenide-aluminum (InGaAlP). The body of the device may include a substrate on which are provided a first optical layer, a guide layer of the core, the second optical layer and, optionally, a contact layer. At least one quantum well (CB) may be provided in the guiding layer of the core. Alternative or additionally, at least one quantum well can be provided in one of the layers of the shell, or both. It should be noted that in the latter case, it is better to set (adjust) the refractive index than the forbidden energy zone of the layer(s) of the shell. Guide layer core immediately after cultivation may have a smaller forbidden energy zone and a higher refractive index compared with the first and second optical layers. According to the fifth aspect of the present invention proposed an optical integrated circuit, an optoelectronic integrated circuit (OEIC) or photonic integrated circuits (pics), containing at least one optical device according to a fourth aspect of the present invention. According to the about the sixth aspect of the present invention proposed the body of the device ("sample"), used in the method according to the first or second aspect of the present invention. According to the seventh aspect of the invention proposed a semiconductor wafer of a material containing at least one body of the device used according to any of the first, second or third aspects of the present invention. Brief description of drawings Embodiments of the present invention is further explained only as an example with reference to the accompanying drawings, on which: Figure 1(a)-(f) - schematic drawing in lateral projection of the sequence of manufacturing steps of a method of manufacturing an optical device according to the first variant implementation of the present invention; Figure 2 - schematic illustration of the lateral projection of the production step of the method of manufacturing the optical device according to the second variant of implementation of the present invention; Figure 3 - schematic illustration of the lateral projection of the production step of the method of manufacturing the optical device according to the third variant of implementation of the present invention; 4 is a schematic illustration of the lateral projection of the production step of the method of manufacturing the optical device according to the fourth variant of implementation of the present invention; Phi is .5 - the shift of the energy gap depending on the annealing temperature for the first samples according to a variant embodiment of the invention; 6 is a shift of the energy gap depending on the annealing temperature for the second sample according to a variant implementation of the present invention; Fig.7 - shift of the energy gap depending on the annealing temperature for the third and fourth samples according to a variant implementation of the present invention; Fig - shift of the energy gap depending on the annealing temperature for a fifth of the samples according to a variant implementation of the present invention; Fig.9 - shift of the energy gap depending on the annealing temperature for six samples according to a variant implementation of the present invention; Figure 10 - the shift of the energy gap depending on the annealing temperature for the seventh samples according to a variant embodiment of the invention; 11(a) and (b) - account of ions depending on the depth of the samples according to a variant implementation of the present invention; Fig account of ions/atoms depending on the depth of the samples according to a variant implementation of the present invention; Fig account of ions/atoms depending on the depth for the samples under option domestic the present invention; Fig - shift of the energy gap depending on the annealing temperature for the samples according to the eighth variant of implementation of the present invention; Fig - shift of the energy gap depending on the annealing temperature for the eight samples according to the ninth variant of implementation of the present invention; and Fig - shift of the energy gap depending on the annealing temperature for the ninth samples according to the tenth variant of implementation of the present invention. Detailed description of drawings First, with reference to Figure 1(a)-(f) illustrate the method of manufacturing the optical device according to the first variant embodiment of the invention. The body of the device, which in General is designated as 5A and made this device contains at least one structure 10A of the quantum well (CB). The above-mentioned method includes a stage on which cause mixing of the impurity material with at least one quantum hole 10A, and the impurity material contains copper (Cu), see Figure 1(e). In this embodiment, the impurity material essentially contains copper or its alloy. Discovered that copper diffuses approximately 106times faster than the previously used, impurities such as zinc (Zn). As you can see in figure 1(d), which is about includes a preliminary stage of deposition on or near the body 5A of the device layer 15A, containing impurity material. In this embodiment, the impurity material is included in the composition of the material carrier. The carrier material in this embodiment is a dielectric material such as silicon dioxide (SiO2) or aluminum oxide (Al2About3). In this case, the layer 15A are precipitated directly onto the surface of the body 5A of the device. Layer 15A is advisable to besiege using install diode (i.e. using two electrodes) or magnetron ion sputtering (not shown). The method begins with the step of ensuring the availability of the substrate 20A, and the cultivation of the substrate 20A of the first optical layer 25A of the shell, the guide layer 30A of the core, comprising at least one structure 10A of the quantum well, the second optical layer 35A shell and, optionally, a contact layer 40A. In the substrate 20A is usually injected alloying impurity of n+, while in the first optical layer 25A shell enter alloying impurity of n-type guide layer 30A of the core is essentially a layer of intrinsic electrical conductivity, the second optical layer 35A shell enter alloying impurity of p-type, and the contact layers 40A - R+. It should be noted that the first optical layer 25A of the shell, the guide layer 30A of the core, the second optical layer is 35A shell and a contact layer 40A can be grown using any appropriate method of growing, such as molecular beam epitaxy (IPE) or chemical vapor deposition, ORGANOMETALLIC compounds (HOPPMAN). Referring to Figure 1(e), mixing of impurity material 15A with at least one quantum pit 10A cause due to heating of the body 5A of the device to high temperature for a specified time. Usually elevated temperature is in the range from 700°With up to 950°and the specified time is in the range from 30 seconds to 300 seconds. The heat of the body 5A of the device to high temperature in this embodiment includes annealing the body 5A of the device, which causes the diffusion of copper in the above-mentioned at least one quantum hole 10A, and reverse diffusion of ions or atoms, for example, gallium mentioned at least one quantum holes 10A in the carrier material 15A. Thus, this variant implementation combines induced admixture of mixed and pure mixing the aforementioned at least one quantum well 10A. In the end, the method according to the first variant of implementation includes the following steps: (a) providing the body 5A of the device (see Figure 1(a)); (b) deposition of a layer of silicon dioxide using plasmodiophoromycota chemical vapour deposition (SHOPP) and the application of centrifuge is a Finance a layer of photoresist on PSHOP-layer of silicon oxide (see Figure 1(b)); (c) forming a pattern in the photoresist and PSHOP layer of silicon dioxide by a method of lithography, for example, etching using HF or dry etching using C2F6(see Figure 1(C)); (d) deposition on the body 5A of the device formed by the pattern layer 15A containing impurity material (see Figure 1(d)); (e) rapid thermal annealing of the body 5A of the device at a given temperature for a specified time in order to mix the said at least one quantum holes 10A in selected areas formed with a pattern (see Figure 1(e)); and (f) removing the various layers of the body 5A of the device and appropriate formation of the metallization on the body 5A of the device for forming electrical contacts with them (see Figure 1(f)). Now with reference to Figure 2 illustrating the method of manufacturing the optical device according to the second variant embodiment of the invention. This second variant of implementation differs from the above-described first variant of realization of the fact that at the stage according to Figure 1(d) instead of the deposition of a single layer of material 15A containing a mixing material near the body surface 5b on the separating layer 16b precipitated layer 15b containing the layer of doped material. The separating layer 16b preferably includes a dielectric material such as oxide, PU glue, which I (SiO 2) or aluminum oxide (Al2O3). On the layer 15b precipitated additional layer 17b, for example, additional dielectric layer. In this second embodiment, the layer 15b is preferably precipitated using ion sputtering, and the separation layer 16b and/or the additional layer 17b is preferably precipitated by ion sputtering or by using PSHOP. Now with reference to Figure 3 illustrating the method of manufacturing the optical device according to the third variant of implementation of the present invention. The method according to the third variant of implementation is similar to the method according to the first variant of implementation, with the exception that after the stage of figure 1(d) with body 5C devices remove various layers, including layer 15C, and on the surface of the body 5C devices beset PSHOP layer of silicon dioxide. Body 5C devices are then subjected to rapid thermal annealing, as in figure 1(e). Unexpectedly, it was found that mixing the aforementioned at least one quantum well 10C due to the mixing of the material (e.g. copper) is still happening, and in the embodiment according to Figure 3, although the layer 15C has already been removed before the step of rapid thermal annealing. Now with reference to Figure 4 illustrates the lateral projection of the production step of the method of manufacturing the optical device according to che the fourth variant of implementation of the present invention. As can be seen in Figure 4, in this embodiment, the 5d body of the device is undergoing a re-formation of a pattern with many of PSHOP-layers of silicon dioxide to provide a stepped pattern or, in other words, the pattern of the silicon dioxide. A template containing an open area of the body surface 5d of the device without PSHOP layer of silicon dioxide, is shown in Figure 4. On top of layered PSHOP pattern of the silicon oxide ion sputtering precipitated layer 15d containing impurity material. In this embodiment, the layer 15d contains a carrier material, such as silicon dioxide containing impurity material such as copper. Sebanibane thus the 5d body is then subjected to rapid thermal annealing according to Figure 1(e) in order to access many areas 45d, 50d, 55d, 60d, 65d mixed quantum holes in the body 5d of the device, with each region are intermixed quantum wells configured in different forbidden energy zone, as induced copper impurity material mixing is different in each area are intermixed quantum wells, since each region 45d through 65d are intermixed quantum wells separated from the layer 15d different number of stepped layers of PSHOP is silicon dioxide. So, how induced admixture mixing of the quantum well Yes according the this invention may use a film of silicon dioxide with an additive of copper, to enter a regulated amount of impurities in the semiconductor. It was found that copper is particularly effective admixture for induced impurity disordering. The reason for this is that copper is in the interstices, and vacant sites and navigates between them using the "jump". It has a very high diffusion coefficient, and this means that the mixing occurs very quickly, and therefore, the copper rapidly diffuses, leaving a low residual concentration in the mixed layer. Moreover, with the inclusion of copper in the composition of the top layer of SiO2there is an effect of back diffusion of elements of III group in the upper layer during high temperature annealing, resulting generated additional vacancies elements of III group, which further increase the mixing speed. This technique has proved an effective means of achieving large differential shifts of the energy gap in a wide range of systems semiconductor materials of the III-V groups, and this technique can be used to provide low passive loss section in some monolithic integrated devices, including high power lasers with different mirrors, lasers with advanced resonator and matrix coordinate lane is the switch. Only a very small amount of copper (about 1 monolayer) is required in order to cause mixing of the quantum well. Unlikely to be desirable to spray the copper layer directly on the surface of the semiconductor, because the local concentration of copper is very high, and may be due to the high concentration of the effects of nonlinear diffusion, such as pickaway mode and education clusters (clusters). In addition, the surface of the semiconductor during the annealing must be protected with a dielectric top layer, and the conclusion inside SiO2gives additional benefits due to the promotion of the creation of vacancies elements of III group due to reverse diffusion of atoms. According to the method in accordance with the present invention, copper can be introduced into the semiconductor by diffusion from a layer of silicon dioxide doped with copper. Layer precipitated using system diode or magnetron ion sputtering, and it can be uniformly doped with simultaneous ion sputtering of copper and SiO2(the first version of the implementation), or copper can be entered in a single layer net, separated from the surface of a semiconductor thin film of SiO2(the second variant of implementation). The last solution, apparently, provides better control of the level of implementation of copper in unnatural semiconductors is. Usually precipitated by a thin layer (20-2000 nm) undoped silicon dioxide, and then approximately 1-3 monolayer of copper. This structure then complete the subsequent deposition of silicon dioxide without dopant. The sample is then annealed at temperatures in the range from 700°With up to 950°C for from 30 s to 300 s depending on the material. At the stage of annealing the copper diffuses from the layer of silicon dioxide in the semiconductor. Copper has a very high diffusion coefficient in the semiconductor, and this means that the mixing is fast. Thus copper rapidly diffuses into the body of the device, leaving a low residual concentration in the mixed layer. Below are examples of experimental samples produced by the methods that match the characteristics described above of the embodiments from the first to the third. All samples consisted of a multilayer laser p-i-n structures, fully grown molecular-beam epitaxy (IPE) or by epitaxy from the vapor phase ORGANOMETALLIC compound (EPPOS) on substrates of GaAs or InP. Epitaxial layers usually contain active region having one or more quantum wells (CB) thick, typically 3-10 nm inside the waveguide core with a larger forbidden energy zone thickness 250-1000 nm, which was OCD is the wife of p-doped and n-doped layers of the shell. All the structures were covered heavily p-alloyed (1×1019cm-3the contact layer with the usual thickness of 100-300 nm. EXAMPLE 1 The original sample gave the following results. Copper was introduced into the matrix of SiO2with the usual thickness of 200 nm by simultaneous ion sputtering of copper and SiO2. This was achieved by reducing the height of the grounded screen around the target, so that the portion of copper carrier plate target was subjected to erosion. The degree of mixing of the quantum well achieved with the help of this method was determined by measuring the energy change of the photoluminescence (PL) after annealing. In all cases, it was compared with a control sample, covered PSHOP-SiO2with all anneals were performed for 60 seconds, unless otherwise specified duration. Figure 5 shows the initial results obtained in grown using APFSOS samples InGaAs-InGaAsP emitting at 1550 nm, covered PSHOP-SiO2and applied to ion sputtering of Cu:SiO2. Although covered PSHOP-SiO2the samples show initial shifts of the energy gap at temperatures above 650°With, however, a significant shift of the energy gap obtained in the material covered Cu:SiO2at temperatures of about 100°below that allowed by the teaching differential (i.e. different) shifts the energy gap value of 80 MeV at temperatures of annealing 650-675°C. EXAMPLE 2 A similar version of the implementation was carried out in systems with materials InGaAs-InAlGaAs, emitting at 1550 nm, as shown in Fig.6, for material grown by the method of the IPE. This material was compared to InGaAsP the best thermal stability, as evidenced by negligible shifts obtained in the presence of only PSHOP-SiO2. However, when using Cu:SiO2initial results were obtained at 600°and increased by more than 100 MeV at the annealing temperature of 700°C. EXAMPLES 3 and 4 The shifts of the energy gap similar values were also obtained, as can be seen from Fig.7, ion sputtering of Cu films:SiO2in structures with multiple quantum wells (MCA) GaAs-AlGaAs (850-860 nm) and GalnP-AlGalnP (670 nm). In this case, covered PSHOP-SiO2the samples again gave negligible shifts of the energy gap in the used temperature range, and for clarity figure 7 they are not specified. In the whole temperature range is negligibly small shifts were obtained for both covered PSHOP-SiO2materials. EXAMPLES 5 and 6 Studies have shown that large shifts of the energy gap can also be obtained after removing received the CSOs ion sputtering of the upper layer Cu:SiO 2and replace it on PSHOP-SiO2before high temperature annealing. Typical effect observed in InGaAs-InAlGaAs shown in Fig. Studies using measurements of mass spectroscopy secondary ion (SIMS) and the experiments on the ion sputtering showed that the predominant mechanism for the increased shift was the introduction of significant levels of Cu in the surface of the semiconductor at the initial stages of ion sputtering. This is shown in Figure 9, which illustrates the shift of the energy gap obtained in the InAlGaAs material on samples covered with sprayed SiO2and Cu:SiO2in comparison with the samples covered PSHOP-SiO2and non-alloy sprayed SiO2. It shows a very similar behavior PSHOP-SiO2and non-alloy sprayed SiO2, while significant differential shift (>100 nm) were obtained using powdered Cu:SiO2. EXAMPLE 7 Suppression of mixing was possible due to the protection of the surface of the sample during ion sputtering layers PSHOP-SiO2while the degree of suppression was greater for thicker coatings. This is shown in Figure 10 for InGaAs-InGaAsP. This observation suggests that Cu diffuses through these thin layers of SiO2during high temperature annealing, causing significant the major concentration in the upper layers of the sample. This method of deposition should provide a higher degree of control over the concentration of Cu, and it has proven its suitability to obtain a range of different forbidden energy bands using a single stage ion sputtering and annealing at the appropriate sabonervnih sample. It also, apparently, improves the quality of the processed material, presumably due to the decrease in the concentration of si in the active region of the semiconductor. As shown in Figure 10, the complete suppression of mixing is possible using a relatively thick layer of photoresist, and the shifts are protected by the photoresist material were identical with shifts received for covered PSHOP-SiO2material. This improvement suppression can be attributed to both the increased thickness of the diffusion barrier, and a reduction in the rate of diffusion of copper in the photoresist. Measuring mass spectroscopy secondary ion (SIMS) and Rutherford backscattering (POP) were also used to determine the atomic composition of the films of SiO2and to measure the degree of reverse diffusion of elements of III group in them. For both materials InGaAsP and InAlGaAs they showed obvious signs of reverse diffusion as In and Ga from the surface of a semiconductor in the deposited ion spray the top layer of SiO2:Cu at temperatures when in the upper layer of PSHOP-SiO2reverse diffusion was not observed. This is illustrated for the material InGaAsP multiple quantum wells (MCA) figure 11 and can be explained by the reduced activation temperature reverse diffusion in Cu doped material because of the increased density of point defects caused by the diffusion of copper. 11 illustrates the profiles of SIMS in MCA-InGaAsP material covered as PSHOP-SiO2and sprayed Cu:SiO2after annealing at a temperature of 680°C. Reverse diffusion of In and Ga is clearly observed for the material with the coating deposited by ion sputtering, but it is not manifested in the upper layer of PSHOP-SiO2. Subsequent measurements have shown that the distribution of copper in the film at an average concentration of 1×1021cm-3and a similar density was observed on the surface of a semiconductor with a sharp decline in concentrations up to 1×1018cm-3at a depth of 300 μm, as shown in Fig. Fig shows the SIMS profile geotagging MCA-sample of InAlGaAs after removal of the applied ion spray coating Cu:SiO2. The Cu concentration decreases sharply to limit noise 5×1017cm-3at a depth of about 300 nm. After annealing, there is a considerable diffusion of copper was obtained concentration 1×1018cm throughout the layer and the waveguide region at a depth of more than 1 μm, as shown in Fig. Fig shows the SIMS profile in the sample InAlGaAs after annealing at a temperature of 700°and removing the top layer Cu:SiO2. In some examples, the ion sputtering of Cu:SiO2it was made in the first system diode sputtering from a single target using a process gas Ar:O2(9:1) and when the spray pressure 2×10-3mbar power radio frequency 110 watts, which corresponds to the internal bias constant field of 1 kV. The dependence induced by copper mixing process from the conditions of ion sputtering was investigated in the early stages of development. Some initial results indicated a nearly linear dependence of the shift from film thickness, however, there were a number of conflicting first message, and later studies showed that there is a small dependence on the thickness of the applied ion sputtering layer. This fact, apparently, according to the mixing observed after removal of the applied ion sputtering of the upper layer, and this suggests that this effect is mainly regulated early stages of the growing film during which copper is directly embedded in the semiconductor. Apparently, there is neznacit is supplemented flax dependence on RF power ion sputtering for power values below 110 volts (because of the possibility of damage to the target SiO 2research in higher capacities was not possible), which is not particularly surprising given the significantly higher output ion sputtering of copper compared with SiO2. However, it was observed a strong dependence of the rate (intensity) PKA from pressure ion sputtering. But it is likely that this is a consequence of the simultaneous deposition of Cu:SiO2due to the increasing thickness of the screen high voltage at reduced pressure, and this fact prevents ion sputtering in the field of grounded screen and causes erosion of the carrier plate. It was also investigated using pure Ar as a gas ion sputtering, but without any noticeable effect on the mixing rate. EXAMPLE 8 In other samples was used in the second ion sputtering, which was used for the simultaneous spraying of SiO2and Cu with change screen height ground. When using ion sputtering conditions, basically the same as described above, it is possible to obtain large differential shifts of the energy gap in comparison with PSHOP-SiO2. This is shown for InAlGaAs on Fig, which also shows for comparison the shift of the energy gap obtained in the first system ion spray the Oia. Fig shows the shifts of the fluorescence obtained for InAlGaAs, covered PSHOP-SiO2, sprayed SiO2and Cu:SiO2incurred in the second system, ion sputtering, and sprayed Cu:SiO2incurred in the first system ion sputtering. This figure shows that in the first case, the copper was not implemented, and shifts the energy gap equal to the zones obtained with PSHOP-SiO2however , in the case of deliberate introduction of copper were obtained large differential shifts. The degree of shift of the energy gap was slightly smaller than the degree in the first system, ion sputtering, and this can explain the lower level of the introduction of copper, probably due to the reduced degree of openness (availability) of the carrier plate to the influence of plasma spray. EXAMPLE 9 Below is a description of the third alternative implementation using a layered approach. As indicated above, this approach involves the incorporation of copper into a thin film near the surface of the semiconductor, but is separated from this surface a thin layer deposited by ion sputtering SiO2. Layers of SiO2were caused by ion sputtering using the standard conditions described above, with layers of copper were deposited under the same pressure, but with a lower RF m is Sestu 25 watts to reduce the speed of ion sputtering and improve the degree of control the concentration of the introduced copper. Fig shows some typical results in InAlGaAs when using this method, in particular the shift of the energy gap obtained when the multilayer deposition of SiO2/Cu/SiO2in InAlGaAs, where the second number indicates the deposition time for the layer of copper, and the first and third values indicate the thickness of the surrounding layers of SiO2. This suggests that a thin layer of copper (2-3 monolayer), separated by an interval of 200 nm from the surface of a semiconductor, can give large and, apparently, reaching saturation shifts of the energy gap in comparison with the samples covered PSHOP-SiO2. The increase in the film thickness of copper, as it turns out, does not provide an obvious increase in shift differential. However, the use of a layer of copper of the same thickness, but with doubled to 400 nm intervals increases the temperature of the activation process PKA, resulting in 775°With shift differential is approximately half of the shift at the interval equal to 200 nm. Further optimization of this method should provide a "balancing" the spacing and thickness of the copper film in order to provide a sufficient introduction of impurities to achieve a large differential shift of the energy gap with a minimum residual concentration of copper. EXAMPLE 10 Opisyvaet the th above approach was also successfully applied in the material of the quantum well InGaAs-GaAs, sluchayem at 980 nm, as shown in Fig. Fig shows fluorescence-shifts in sluchayem at 980 nm the material for covering the upper layer of PSHOP-SiO2and ion-sprayed layers of SiO2/Cu/SiO2varying thicknesses of the first layer of SiO2. In this example, it is obvious that the differential shift of the forbidden zone is greatest for those layers, in which the copper is directly deposited on the sample surface, and decreases with increasing thickness specifies the interval (separation) layer of SiO2. The extent of increasing the thickness of the separation layer is limited to a low thermal resistance material, which in turn limits the value achievable differential shift of the energy gap. Differential shift can be increased by simply increasing the time of annealing, which will sharply increase the mixing in the doped copper films, while little affecting the layers PSHOP-SiO2. It should be noted that the described above embodiments of the invention are given only as examples, and they do not imply any limitation of the scope of the present invention. In particular, it should be understood that in the disclosed here ways to exercise, you can make changes within the scope of the invention. 1. A method of manufacturing the optical device is TBA, moreover, the body of the device from which manufactured this device comprises at least one quantum hole (CB), including stages, which cause mixing of the impurity material with said at least one quantum well, and this impurity material contains copper (Cu). 2. The method according to claim 1, wherein the impurity material consists of copper or a copper alloy. 3. The method according to claim 1, which includes a preliminary stage of deposition on the body of the device or in the vicinity of the layer containing the impurity material. 4. The method according to claim 3, in which the impurity material is injected with a material carrier. 5. The method according to claim 4, in which the carrier material is a dielectric material. 6. The method according to claim 4, in which the said layer is precipitated directly on the surface of the body of the device. 7. The method according to claim 6 in which the said layer is precipitated by setting the ion sputtering. 8. The method according to claim 3 in which the said layer is a layer of doped material, which is deposited near the surface of the body of the device separation layer. 9. The method according to claim 8, in which the separating layer contains a dielectric material. 10. The method of claim 8 in which the said layer of doped material precipitated additional dielectric layer by setting the ion sputtering. 11. The method according to the .8, in which the said layer of doped material and the separating layer precipitated by setting the ion sputtering. 12. The method according to claim 3, in which the body of the device includes a substrate, a first optical layer, a guide layer core and the second optical layer, and, optionally, a contact layer, the method also includes advanced stages ensure the availability of substrate and growing on this substrate, the first optical layer of the shell, the guide layer of the core, containing the mentioned at least one quantum hole (CB), the second optical layer shell and, optionally, a contact layer. 13. The method according to item 12, in which the first optical layer, a guide layer of the core, the second optical layer and contact layer are grown by molecular beam epitaxy (IPE) or chemical vapor deposition, ORGANOMETALLIC compounds (HOPPMAN). 14. The method according to claim 4, in which, prior to mixing the above-mentioned layer is removed from the body of the device. 15. The method according to claim 1, in which cause mixing of the impurity material with said at least one quantum well (CB) by heating the body of the device to high temperature for a specified time. 16. The method according to item 15, in which the high temperature h is located in the range from 700 to 950° With, and the specified time is in the range from 30 to 300 C. 17. The method according to item 15, in which the step of heating the body of the device to high temperature includes annealing the body of the device, which causes the diffusion of the impurity material in said at least one quantum pit and back diffusion of ions or atoms of the above-mentioned at least one quantum well. 18. The method according to any one of claims 1 to 17, which includes a stage on which the cause mentioned diffusion of impurity material into the body of the device, as well as the reverse diffusion of the material of the body of the device in the second material. 19. The method according to p, in which the second material is a dielectric material. 20. The method according to any one of claims 1 to 19, which includes the steps, which form on the surface of the body of the device drawing from many areas of the impurity material, and at least two of these areas impurity material is separated from said surface by different distances; cause mixing of the impurity material mentioned many areas with the said at least one quantum well so as to adjust the width of the energy gap of at least one mixed quantum wells in at least two areas on different values. 21. The optical device manufactured by the method according to mu the mu one of claims 1 to 20. 22. The optical device according to item 21, which is integral optical device, or an optoelectronic device. 23. The optical device according to item 21, in which the body of the device is made in the system of semiconductor materials of the III-V groups. 24. The optical device according to item 23, in which the system of semiconductor materials of the III-V groups is a system based on gallium arsenide (GaAs) and acts on the length(s) waves(s), essentially in the range from 600 to 1300 nm. 25. The optical device according to item 23, in which the system of semiconductor materials of the III-V groups is a system based on indium phosphide and acts on the length(s) wave(s) being in the range from 1200 to 1700 nm. 26. The optical device according to item 23, in which the body of the device is made at least partially from a gallium-aluminum-arsenide (AlGaAs), gallium-indium-arsenide (InGaAs), a phosphide of gallium, indium (InGaAsP), indium arsenide-gallium-aluminum (InGaAlAs) and/or indium phosphide-arsenide-aluminum (InGaAlP). 27. The optical device according to any one of p-26, in which the body of the device includes a substrate on which the first optical layer, a guide layer core and the second optical layer, and, optionally, a contact layer. 28. The optical device according to item 27, in which at least one quantum well (CB) made in the guiding layer is ardavin. 29. The optical device according to p, in which, instead of, or additionally, at least one quantum well (CB) is made in one or both layers of the shell. 30. Optical integrated circuit containing at least one optical device according to any one of p-29.
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