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Self-adjusted control system for neutral-type delayed-control equipment

Self-adjusted control system for neutral-type delayed-control equipment
IPC classes for russian patent Self-adjusted control system for neutral-type delayed-control equipment (RU 2246123):
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FIELD: engineering cybernetics.

SUBSTANCE: proposed system that can be used for pieces of equipment whose parameters are unknown variables or those slowly varying with time has piece of equipment under control, three factor specifying units, five adders, eight multipliers, five integrators, three delay units, and differentiating unit.

EFFECT: ability of stabilizing self-adjusted system used for delayed-control neutral-type equipment.

1 cl, 1 dwg

 

The invention relates to the technical Cybernetics and can be used in the systems of control objects, the parameters of which are unknown constant or slowly varying in time value.

The closest technical solution to the present invention is a self-tuning control system, containing the first block of the task of the coefficients, the first adder, the first multiplier, the first integrator, the second multiplier, a second adder, the object of regulation, the first unit delay, a third multiplier, a second integrator, a fourth multiplier, the second block set coefficients, third and fourth adders, the differentiation block, the second block of delay, the fifth multiplier, the third integrator and the sixth multiplier. The signals from the outputs of a controlled act simultaneously to corresponding inputs of the first and second blocks of job factors. The signals from the outputs of the first block of the task of the coefficients are received at the respective inputs of the first adder. The signals from the outputs of the second block set coefficients are received at the respective inputs of the fourth adder. The output signal of the first adder is fed to the input of the first unit delay to the first input of the first multiplier and the second input of the second multiplier and the third adder. The output signal of the fourth adder will occupait to the input of the differentiation block. The output signal of the differentiation block is fed to the input of the second unit delay and to the first input of the third adder. The output signal of the third adder is fed to the second inputs of the first, third and fifth multipliers. The output signal of the first multiplier is fed to the input of the first integrator. The output signal of the first integrator to the input of the second multiplier. The output signal of the second multiplier is fed to the first input of the second adder. In the first block lag is the delay of the signal at time1. The output signal from the first unit delay is supplied to the second input of the fourth multiplier and to the first input of the third multiplier. The output signal of the third multiplier is fed to the input of the second integrator. The output signal of the second integrator is fed to the first input of the fourth multiplier. The output signal of the fourth multiplier is fed to a second input of the second adder. In the second block lag is the delay of the signal at time2. The output signal of the second unit delay is supplied to the second input of the sixth multiplier and to the first output of the fifth multiplier. The output of the fifth multiplier is fed to the input of the third integrator. The output signal of the third integrator is fed to the first input of the sixth cleverly is Italia. The output of the sixth multiplier is fed to a third input of the second adder. The output signal of the second adder to the input of the object of regulation.

The disadvantage of this system if the object lag management, is the instability of the equilibrium position.

The aim of the invention is the provision of asymptotic stability of the equilibrium position of the system in the presence of the object lag management.

This object is achieved in that in a system containing two units of job factors, two unit delay, four adder, three integrator, six multipliers, block differentiation, the object of the regulation; the outputs of a controlled simultaneously connected to respective inputs of the first and second block set coefficients whose outputs are connected to respective inputs of the first and fourth adders, the output of the first adder connected to the first input of the first multiplier to the second input of the second multiplier to the input of the first unit delay and to the second input of the third adder, the output of the first multiplier is connected to the input of the first integrator, the output of the first integrator connected to the first input of the second multiplier, the output of the second multiplier connected to the first input of the second adder, the output of the first unit delay bound is an first input of the third multiplier and the second input of the fourth multiplier, the second input of the third multiplier connected to the output of the third adder, the output of the third multiplier connected to the input of the second integrator, the output of the second integrator is connected to the first input of the fourth multiplier, a fourth multiplier connected to the second input of the second adder, the output of the fourth adder connected to the input of the differentiation block, the output of which is connected to the input of the second unit delay, the output of the second unit delay associated with the first input of the fifth multiplier and a second input of the sixth multiplier, a second input of the fifth multiplier connected to the output of the third adder, the output of the fifth multiplier connected to the input of the third integrator, and the output of the third integrator connected with the first the entrance of the sixth multiplier, the output of the sixth multiplier is connected to the third input of the second adder, entered the fifth adder, the fourth integrator, the third block set coefficients, the third unit delay, the seventh multiplier, the fifth integrator, the eighth multiplier, and the entrance of the third unit delay connected to the output of the second adder, the output of the third unit delay associated with the input object of regulation, with the second input of the fifth adder with a first input of the seventh multiplier and a second input of the eighth multiplier, a first input of the fifth adder connected to the output of the second sum is ora, the second input of the fifth adder connected to the output of the third unit delay, and the third input of the fifth adder is connected with the output of the third block set coefficients, the output of the fifth adder connected to the input of the fourth integrator, the output of the fourth integrator is connected to the input of the third block of the job factors and to the first input of the third adder, the second input of the seventh multiplier associated with the output of the third adder, the output of the seventh multiplier connected to the input of the fifth integrator, the output of the fifth integrator connected to the first input of the eighth multiplier, the output of the eighth multiplier connected to the fourth input of the second adder.

The drawing shows a block diagram of the system. The system contains the first block of the task of the coefficients 1, the first adder 2, the first multiplier 3, the first integrator 4, the second multiplier 5, the second adder 6, the object of regulation 7, the first block lag 8, the third multiplier 9, the second integrator 10, a fourth multiplier 11, the second block set 12 coefficients, the third adder 13, the fourth adder 14, the differentiation block 15, the second block lag 16, the fifth multiplier 17, the third integrator 18, the sixth multiplier 19, the fifth adder 20, the fourth integrator 21, the third block set coefficients 22, the third block lag 23, the seventh multiplier 24, the fifth integrator 25, the eighth Omnitel is 26.

The object of the regulation is described by the equation

where x∈Rnthe state vector of the object of regulation, τ1>0, τ2>0, τ3>0 is a known constant delay, y∈Rm- the output vector of the measured coordinates, u is a scalar control action, ϕ(s) - the initial vector function, A, D, G, L, b - matrix and the vector of dimensions (n×n), (n×n), (n×n), (m×n), (n×l), respectively, depends on the vector of unknown parameters ξ(t)∈Ξ, Ξ - known set of possible values of the vector ξ(t).

The object is connected to the controller

where χ1that χ2that χ3that χ4- custom settings of the controller, g1, g2- numeric vectors chosen from the following conditions: gallizioli polynomial g

*
1
L(Inp-A)+b of degree n-1 with positive coefficients; all roots of the polynomial g
*
2
L(Inp-G)+of degree n-1 lie inside a circle of unit radius ∀ξ(t)∈Ξ. Here (Inp-A)+(Inp-G)+attached matrix.

Using the criterion of giperustoichivost Popova, it is possible to show that the implemented algorithm tuning of controller parameters

where α>0, β>0, γ>0, λ>0, z is the output of the additional circuit whose dynamics is described by the equation

where a0>0 is a number

ensures asymptotic stability of the system.

The system operates as follows.

The signals from the outputs of the object of regulation 7 arrive simultaneously on the corresponding inputs of the first 1 and the second 12 block set coefficients. In the first block 1 job factors is the multiplication of the signal yiby a factor of g1i. The signals from the outputs of the first block 1 job factors act to corresponding inputs of the first adder 2 are formed. Signali=1,...,n from the output of the adder 2 is supplied to the input of the first unit delay 8, at the first input of the first multiplier 3 and the second input of the second multiplier 5 and the third adder 13. The output signal of the third adder 13 is supplied to the second inputs of the first multiplier 3, the third multiplier 9, the fifth multiplier 17, when dimaga multiplier 24. In the first multiplier 3 is the multiplication of the output signal from the adder 13 to the output signal from the adder 2. The output signal of the first multiplier 3 is fed to the input of the first integrator 4 integrates. The output signal of the first integrator 4 is supplied to the first input of the second multiplier 5 multiplies the output signal from the adder 2 is supplied to another input of the multiplier. The output signal of the second multiplier 5 is supplied to the first input of the adder 6. In the first block 8 lag is the delay of the signal on the time τ1. The output signal from the first unit delay 8 is supplied to the second input of the fourth multiplier 11 and the first input of the third multiplier 9, where it is multiplied by the output signal of the adder 13. The output signal of the third multiplier 9 is fed to the input of the second integrator 10, where it is integrated. The output signal of the second integrator 10 is supplied to the first input of the fourth multiplier 11 multiplies the output signal of the first unit delay 8. The output signal of the fourth multiplier 11 is supplied to the second input of the second adder 6. In the second block 12 task factors is the multiplication of the signal γiby a factor of g2i. The signals from the outputs of the second unit 12 task factors act to corresponding inputs of the fourth adder 14 which are formed. Signal i=1,...,n c the output of the adder 14 is fed to the input of the differentiation block 15, which is differentiated. The output signal of the differentiation block 15 is fed to the input of the second unit delay 16. In the second block 16 lag is the delay of the signal on the time τ2. The output signal of the second unit delay 16 is supplied to the second input of the sixth multiplier 19 and to the first output of the fifth multiplier 17, where it is multiplied by the output signal of the adder 13. The output of the fifth multiplier 17 is fed to the input of the third integrator 18 integrates. The output signal of the third integrator 18 is supplied to the first input of the sixth multiplier 19, which is multiplied by the output signal of the second unit delay 16. The output of the sixth multiplier 19 is supplied to the third input of the second adder 6. The output signal of the second adder 6 is supplied to the first input of the fifth adder 20 and to the input of the third block of the third block lag 23, the output signal of the third unit delay 23 is supplied to the second input of the fifth adder 20, the second input of the eighth multiplier 26, to the input of the object of regulation 7 and to the first input of the seventh multiplier 24 multiplies the output signal of the third adder 13, the output of the seventh multiplier 24 to the input of the fifth integrator 25, where it is integrated. The output signal of the fifth integrator 25 postopia is at the first input of the eighth multiplier 26, where is multiplied by the output signal of the third unit delay 23. The output signal from the eighth multiplier 26 is supplied to the fourth input of the second adder 6. The output of the fifth adder 20 is fed to the input of the fourth integrator 21, and the output of the fourth integrator 21 to the input of the third block set coefficients 22 and to the first input of the third adder 13. The output signal of the third block set coefficients 22 is supplied to the third input of the fifth adder 20.

The proposed system has more functionality, as it can work with objects of neutral type with time-delay control.

This device can be implemented industrially, on the basis of standard elementary base.

Self-tuning control system for objects of neutral type with time-delay control, containing the first block of the job factors, connected in series to the first adder, the first multiplier, the first integrator, the second multiplier, a second adder, connected in series, the first unit delay, a third multiplier, a second integrator and a fourth multiplier, connected in series, the second block set coefficients, the fourth adder, the differentiation block, the second block of delay, the fifth multiplier, the third is the integration of the ATOR, the sixth multiplier, the outputs of the object of regulation is connected to the corresponding inputs of the first and second blocks of job factors, the outputs of the first block of the task of the factors connected to respective inputs of the first adder, the output connected to the second input of the second multiplier, the second input of the third adder and the input of the first unit delay, the output of which is connected to a second input of the fourth multiplier is connected the output to the second input of the second adder, the outputs of the second unit job factors connected to respective inputs of the fourth adder, the output of the third adder connected to the second inputs of the first, third and fifth multipliers, the output of the second unit delay is connected to a second input of the sixth multiplier whose output is connected to the third input of the second adder, characterized in that the system entered the fifth adder, the fourth integrator, the third block set coefficients, the third block lag, connected in series seventh multiplier, the fifth integrator and eighth multiplier, a first input of the fifth adder is connected with the output of the second adder input of the third unit delay connected to the output of the second adder, the output of the third unit delay connected to the second input of the fifth adder to the first input of the seventh multiplier, what about the second input of the eighth multiplier and to the input of the object of regulation, the second input of the seventh multiplier associated with the output of the third adder, the output of the seventh multiplier is connected to the fifth input of the integrator, the output of which is connected to the first input of the eighth multiplier, the output of the eighth multiplier is connected to the fourth input of the second adder, the output of the fifth adder is connected with the fourth integrator, the output of which is connected to the input of the third block of the job factors and to the first input of the third adder, the output of the third unit job factors connected with the third input of the fifth adder.

 

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