Method of increasing banding strip in station remembering devices

FIELD: radio engineering, communication.

SUBSTANCE: device contains at least two data channels; At least two memory chips installed one on top of another in the form of a stack. The memory chips include at least two memory units and at least a portion of the first data channel and a second data channel portion; And at least the first and second chip-chip connections. The first chip-chip connection is configured to connect the respective portions of the first data channel included in the first and second memory chips to form a first data channel, and the second chip-chip connection is configured to couple corresponding portions of the second transmission channel data included in the first and second memory chips to form a second data channel. Each of the communication channels thus formed is selectively connected to the first and second memory units included in the first chip of the memory and to the first and second memory units included in the second memory chip. Each of the memory units included in the first memory chip is configured to provide data into one channel from the formed data channels, and each of the memory units entering the second memory chip is configured to provide data to another channel from the generated data channels.

EFFECT: increase the data transfer speed and system memory bandwidth.

25 cl, 10 dwg

 



 

Same patents:

FIELD: radio engineering, communication.

SUBSTANCE: device contains at least two data channels; At least two memory chips installed one on top of another in the form of a stack. The memory chips include at least two memory units and at least a portion of the first data channel and a second data channel portion; And at least the first and second chip-chip connections. The first chip-chip connection is configured to connect the respective portions of the first data channel included in the first and second memory chips to form a first data channel, and the second chip-chip connection is configured to couple corresponding portions of the second transmission channel data included in the first and second memory chips to form a second data channel. Each of the communication channels thus formed is selectively connected to the first and second memory units included in the first chip of the memory and to the first and second memory units included in the second memory chip. Each of the memory units included in the first memory chip is configured to provide data into one channel from the formed data channels, and each of the memory units entering the second memory chip is configured to provide data to another channel from the generated data channels.

EFFECT: increase the data transfer speed and system memory bandwidth.

25 cl, 10 dwg

FIELD: physics.

SUBSTANCE: device comprises a cell memory matrix with banks, wherein each bank includes rows, the first word lines provided in accordance with the rows, an address latch-circuit, which latches the first row address signal, a row decoder, which activates one of the first word lines, and a control circuit, that is configured to perform the first operation, which activates one of the banks on the basis of the bank address signal, when the first instruction is loaded, and the second operation, which latches the first row address signal in the address latch-circuit and to perform the third operation, which activates one of the first word lines by the row decoder on the basis of the second row address and the first row address signal latched in the address latch-circuit, when the second instruction is loaded after the first instruction.

EFFECT: increasing the number of the address bits with the unchanged device specifications.

35 cl, 21 dwg

FIELD: radio engineering, communication.

SUBSTANCE: device contains at least two data channels; At least two memory chips installed one on top of another in the form of a stack. The memory chips include at least two memory units and at least a portion of the first data channel and a second data channel portion; And at least the first and second chip-chip connections. The first chip-chip connection is configured to connect the respective portions of the first data channel included in the first and second memory chips to form a first data channel, and the second chip-chip connection is configured to couple corresponding portions of the second transmission channel data included in the first and second memory chips to form a second data channel. Each of the communication channels thus formed is selectively connected to the first and second memory units included in the first chip of the memory and to the first and second memory units included in the second memory chip. Each of the memory units included in the first memory chip is configured to provide data into one channel from the formed data channels, and each of the memory units entering the second memory chip is configured to provide data to another channel from the generated data channels.

EFFECT: increase the data transfer speed and system memory bandwidth.

25 cl, 10 dwg

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