Method for manufacture of powerful shf transistor

FIELD: electricity.

SUBSTANCE: method for manufacture of powerful SHF transistor includes application of a solder layer to the flange, shaping of pedestal, application of a sublayer fixing the transistor crystal to the pedestal, formation of p-type conductivity oriented at the plane (111) at the base substrate of single-crystalline silicon and auxiliary epitaxial layers, application of the basic layer and buffer layer for growing of epitaxial structure of a semiconductor device based on wide-gap III-nitrides, application of heat conductive layer of CVD polycrystalline diamond to the basic layer, removal of the basic substrate with auxiliary epitaxial layers up to the basic layer, growing of heteroepitaxial structure based on wide-gap III-nitrides on the basic layer and formation of the source, gate and drain. The heat conductive layer of CVD polycrystalline diamond is used as a pedestal; nickel is implanted to its surficial region and annealed. Before formation of the source, gate and drain an additional layer of insulating polycrystalline diamond and additional layers of hafnium dioxide and aluminium oxide are deposited on top of the transistor crystal; the total thickness of the above layers is 1.0-4.0 nm.

EFFECT: invention allows increased heat removal from the active part of SHF-transistor and minimisation of gate current losses.

6 cl, 4 dwg

 

The invention relates to the field of semiconductor technology and can be used in the manufacture of such devices as, for example, heteroderidae field-effect transistors (HEMT), bipolar transistors (BJT), heterobipolar transistors (HBT), p-i-n diodes, diodes with barrier of a Schottky and many others.

The prior art method of manufacturing a semiconductor device in which layers HPP applied epitaxial methods such as a method of chemical vapor deposition of ORGANOMETALLIC compounds (MOCVD), molecular beam epitaxy (MBE), hydride method of epitaxy from the vapor phase (HVPE), and others. Unlike traditional semiconductor materials wide bandgap III-nitrides have a hexagonal type of crystal lattice and receive them in the form of thin heteroepitaxial structures on substrates with hexagonal lattice type. For this purpose, as a rule, use a substrate of sapphire (Al2O3), silicon carbide (SiC), bulk aluminum nitride (AlN) or gallium nitride (GaN), pseudo GaN substrate of silicon with an orientation plane (111) (Si(111)), and stocking GaN (or AlN) substrate, which can serve as one of the above (see Compound Semiconductor. October 2004, 27-31).

The disadvantages of this method are the low efficiency of semiconductor devices, high degradation is the situation, due to the low heat dissipation from the active part.

In addition, the prior art method of manufacturing a semiconductor device, comprising growing on the base substrate, the polycrystalline diamond epitaxial auxiliary layers and epitaxial structure of a semiconductor device based on wide-gap III-nitrides. On the surface of the base substrate to form an auxiliary epitaxial layers, one of which is the base for growing epitaxial structure of a semiconductor device based on wide-gap III-nitrides. Auxiliary epitaxial layers grown polycrystalline diamond, and after growing diamond base substrate is removed along with supporting the epitaxial layers to the base layer, on which is grown an epitaxial structure of a semiconductor device based on wide-gap III-nitrides (see RF patent №2368031, publ. 20.09.2009).

The disadvantages of this method are fast enough and high degradation of the semiconductor device, due to the low heat sink.

The present invention is to eliminate the above disadvantages.

The technical result is to increase heat removal from the active part of the microwave transistor and to minimize the leakage current of the gate.

T is khnicheskie the result is the fact, a method for manufacturing high-power microwave transistor comprises applying to the flange of the layer of solder, the formation of the pedestal, the underlayer coating for attachment of the transistor crystal to the pedestal, forming on a base substrate of monocrystalline silicon of p-type conductivity, oriented on a plane (111), a subsidiary of epitaxial layers, the application of the base layer and the buffer layer for growing epitaxial structure of a semiconductor device based on wide-gap III-nitrides, drawing on the base layer thermal CVD polycrystalline diamond, removing the base substrate, together with supporting the epitaxial layers to the base layer, building on the base layer heteroepitaxial structures based on wide-gap III-nitrides and forming source, gate and drain. As the pedestal use the heat-conducting layer of polycrystalline CVD diamond in the surface region which is implanted Nickel and annealed. Prior to forming the drain, gate and source on top of the transistor crystal sequentially precipitated an additional layer of insulating polycrystalline diamond and additional barrier layers of hafnium dioxide and aluminum oxide, with a total thickness of 1.0 to 4.0 nm.

In accordance with particular cases of execution of the invention ameeshaaeysha features.

A buffer layer made of AlN or HfN.

A base layer made of a solid solution of AlxGa1-xN, where 0≤x≤1.

On the base layer grow heteroepitaxial structure in the form of layers of undoped GaN, solid solution AlGaN, of the solid solution AlGaN n+type conductivity and of the solid solution AlGaN.

Cover the pedestal sublayer of the AuGe alloy.

The essence of the present invention is illustrated by the following illustrations:

Fig.1-4 shows the sequence of manufacturing a multilayer epitaxial structure.

On the surface of the base substrate 1 of monocrystalline silicon of p-type, oriented on a plane (III), precipitated epitaxial layers 2 (Fig.1), at least the base layer 3 (Fig.2) designed for growing epitaxial structure of III-nitrides. As the base layer 3, on which is grown polycrystalline diamond 4, either one of the auxiliary epitaxial layers above layer 3. After growing polycrystalline diamond base substrate 1, for example of silicon, remove the widely known methods of wet and dry etching together with the epitaxial layers to the base layer 3 (Fig.3)on which is grown an epitaxial structure 5 III-nitrides (Fig.4).

Powerful microwave transistor is manufactured as follows.

On LAF the CE mark MD-40 with a thickness of 1600 microns put a layer of solder of AuSn thickness of 25 microns, which sealed the pedestal of the heat-conducting layer CVD polycrystalline diamond with a thickness of about 0.15 μm. On top of the layer of polycrystalline diamond after implantation in its near-surface region of the Nickel and subsequent annealing precipitated the underlayer composition AuGe thickness of ~25 µm, which then serves as a basis for strengthening crystal transistor to the pedestal of CVD polycrystalline diamond. As the base substrate using monocrystalline silicon of p-type conductivity, is oriented according to the plane (111). On the surface of the base substrate with the epitaxial layer of AlN with a thickness of 0.1 μm are increasing the base layer of solid solution AlxGa1-xN, where 0≤x≤1, over which is deposited thermally conductive layer CVD polycrystalline diamond thickness ≥0,15 mm After deposition of a layer of polycrystalline CVD diamond on the base layer, the base substrate of silicon removed is widely known methods of wet and dry etching, and the free surface of the layer of polycrystalline CVD diamond prepared for mounting crystal transistor to the pedestal, are implanted in the surface region of the layer of polycrystalline diamond Nickel and carry out annealing. Further on the base layer build up a buffer layer of AlN (in another particular case, the run - HfN). On top of the buffer layer sequentially, naradeva the t multilayer heteroepitaxial layers of III-nitrides, consisting of undoped GaN buffer layer, a solid solution AlGaN (space), solid solution AlGaN n+type conductivity, a layer of solid solution AlGaN (roof).

After manufacturing in the area of the source and drain of the low resistance podkonicky plots of n+type conductivity over the transistor crystal precipitated layer of insulating polycrystalline diamond. Remove the layer of insulating polycrystalline diamond from the site of the future location of the shutter, precipitated additional barrier layers of hafnium dioxide and aluminum oxide. The barrier layers have a total thickness of 1.0 to 4.0 nm. In the field of the future shutter these layers are placed directly on the surface of the solid solution AlGaN. After etching Windows in the insulating layer of polycrystalline diamond and the optional barrier layer over pokontaktnuyu layers form the source, gate, and drain ohmic contacts to the source, the drain and the crystal microwave transistor connected to the pedestal.

In this method of manufacturing a transistor technology is used planarization layer CVD polycrystalline diamond suitable for technology thermoperiodicity layers further instruments manufacturing method of implantation of Nickel in the surface region of the layer of polycrystalline CVD diamond with subsequent annealing.

Dost is a sacrament of this method is the fact, all layers in the structures obtained using the well-known epitaxial techniques and does not require special processing technology and/or methods of joining layers. The semiconductor structure is formed almost on the surface of the substrate a large structural thickness, and the surface of the crystal and as a pedestal transistor of vysokoteploprovodnyh polycrystalline diamond. Eliminates the need for time-consuming polishing surface layer CVD polycrystalline diamond suitable for technology thermoperiodicity layers in the further manufacture of the devices.

The use of technical solutions provides additional heat dissipation and reduction of leakage current in the crystal microwave transistor through additional layers of thermally conductive polycrystalline diamond and hafnium dioxide and aluminum oxide deposited on the crystal surface between the source, gate and drain of high-power microwave GaN transistor. This embodiment reduces thermal resistance of the transistor structure is more than 1.5 times and significantly reduces the leakage current of the gate.

The use of an additional layer of thermally conductive polycrystalline diamond on the surface of the crystal of the transistor between the source, gate and drain of microwave implemented the torus increases the breakdown voltage of the transistor more than 30%. It is also provided by the manufacturer under the shutter (on the surface of the solid solution AlGaN n-type conductivity) additional barrier layers of hafnium dioxide and aluminum oxide (mask), which significantly reduce the leakage current.

1. A method of manufacturing a high-power microwave transistor, comprising coating the flange layer of solder, the formation of the pedestal, the underlayer coating for attachment of the transistor crystal to the pedestal, forming on a base substrate of monocrystalline silicon of p-type conductivity, oriented on a plane (111), a subsidiary of epitaxial layers, the application of the base layer and the buffer layer for growing epitaxial structure of a semiconductor device based on wide-gap III-nitrides, drawing on the base layer thermal CVD polycrystalline diamond, removing the base substrate, together with supporting the epitaxial layers to the base layer, building on the base layer heteroepitaxial structures based on wide-gap III-nitrides and forming source, gate and drain, characterized in that the pedestal use the heat-conducting layer of polycrystalline CVD diamond in the surface region which is implanted Nickel and annealed, and prior to forming the drain, gate and source on top of the transistor crystal pic is edutella precipitated an additional layer of insulating polycrystalline diamond and additional barrier layers of hafnium dioxide and aluminum oxide, with a total thickness of 1.0 to 4.0 nm.

2. The method according to p. 1, characterized in that a buffer layer made of AlN.

3. The method according to p. 1, characterized in that a buffer layer made of a HfN.

4. The method according to any of paragraphs.1-3, characterized in that the base layer made of a solid solution of AlxGa1-xN, where 0≤x≤1.

5. The method according to p. 4, characterized in that the base layer grow heteroepitaxial structure in the form of layers of undoped GaN, solid solution AlGaN, of the solid solution AlGaN n+type conductivity and of the solid solution AlGaN.

6. The method according to p. 1, characterized in that the cover pedestal sublayer of the AuGe alloy.



 

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