Method and hardware system for determination of phase angle of brightness control and selective determination of universal input voltage for solid-state lighting installations

FIELD: electricity.

SUBSTANCE: invention relates to lighting engineering. The device for determination of the brightness control phase angle set by operating the brightness control for the solid-state lighting load, comprises a processor with digital input, first diode, connected between the digital input and voltage source, and a second diode, connected between the digital input and earth. The device also comprises first capacitor, connected between the digital input and determination node, second capacitor, connected between a the determination node and earth, and resistance, connected between the determination node and node of rectified voltage, which accepts rectified voltage from the brightness control. The processor is made with a possibility of discretising digital impulses at digital input on the basis of rectified voltage and identifying a phase angle of the brightness control on the basis of lengths of discretised digital impulses.

EFFECT: improvement of precision of regulation of luminosity of solid-state lighting load.

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CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority on provisional application for U.S. patent No. 61/262770, filed November 19, 2009, and provisional application for U.S. patent No. 61/285580, filed December 11, 2009, the disclosure of which is hereby fully included herein by reference.

The technical FIELD TO WHICH the INVENTION RELATES.

The present invention, in General, aimed at management of solid-state lighting installations. More particularly, various inventive methods and hardware systems disclosed herein relate to digital determination of the phase angles of the dimmer and/or the provision of brightness for solid state lighting systems. In addition, various inventive methods and hardware systems disclosed in this document, refer to the election definition input voltage solid-state lighting systems on the basis of certain phase angles of the dimmer.

The LEVEL of TECHNOLOGY

Digital or solid-state lighting, i.e. lighting based on semiconductor light sources such as light emitting diodes (LED, led), offer a viable alternative to traditional fluorescent lamps, discharge lamps high intense the activity (HID) and incandescent lamps. Functional advantages and benefits of LED include high energy conversion efficiency and optical efficiency, durability, low maintenance, etc. the Latest advances in LED technology have provided effective and reliable in operation full-spectrum light sources that provide lots of lighting effects in many applications.

Some installations that implement these sources contain a lighting module comprising one or more LEDs, allowing for the generation of white light and/or different colors of light, for example red, green and blue, and the controller or processor to independently control the output of the LEDs to generate a multitude of colors and light effects color changing, for example, as explained in detail in the patents (US) No. 6016038 and 6211626. Led technology includes lighting devices with power from the mains voltage, for example, a series of ESSENTIALWHITE offered by Philips Color Kinetics. Such lighting devices can be adjustable brightness using the technology of brightness on the basis of the trailing edge of the signal, for example the brightness on the basis of low voltage (ELV) for stress network 120 VAC (or input voltage network).

Many options application : the lighting used brightness. Traditional brightness controls work well with incandescent lamps (electric and halogen). However, problems arise with other types of electronic lamps, including compact fluorescent lamp (CFL), halogen lamps, low voltage electronic transformers and lamp technology solid state lighting (SSL), for example LEDs and OLED. Halogen lamps low voltage electronic transformers, in particular, can be regulated brightness using special brightness, for example the brightness on the basis of low voltage (ELV) or resistive-capacitive (RC) of brightness, which properly work with loads that have a schema factor correction (PFC) input.

However, the traditional solid-state lighting, including led white lighting installation are dependent on the input voltage. Thus, various types of solid-state white lighting installations only work when a specific voltage network, for which they developed. The value and frequency of the voltages of the network may vary depending on various factors such as the geographic location is of isolates (for example, American markets typically require line voltage 120 VAC, 60 Hz, while the European markets typically require mains voltage 230 VAC, 50 Hz) and the physical location of the installed solid-state white lighting installations (for example, installation, installed in high positions, typically require a voltage at 277 VAC, while installation installed under the shell, typically require line voltage 120 VAC).

Such functional differences between different types of solid-state white lighting installations lead to confusion and practical inefficiency for manufacturers and users. For example, contractors in the installation of electrical equipment typically must have several sets of inventory according to the number of different voltage networks available in a specific construction site. Sets inventory should be carefully controlled during installation, or new white led lighting systems can be damaged by incorrect application of the input voltage, in addition, although the led white lighting installations with the ability to work with different input voltages of the network, can have identical printed circuit boards, and other components are distinguished on the basis of structural differences that are required in order about especial work for example, when the input voltages of the network 100 VAC, 120 VAC, 230 VAC or 277 VAC. This is inefficient from the point of view of the system of supply and production, because each input network requires its own specialized list of materials, units of inventory, etc. the Management of this was difficult, because it is difficult to predict demand. Consequently, marketing, supply chain and production should benefit from led white light or other solid-state lighting installation with universal input voltage.

In addition, traditional brightness typical cut of each waveform of the input voltage and transmit the remainder of the waveform in the lighting installation. The brightness control on the basis of the leading edge or the direct phase of the signal cuts off the leading edge of the waveform voltage. The brightness control on the basis of the trailing edge, or reverse-phase signal cuts off the rear edges of the waveforms of the voltage. Electronic load, for example led drivers typically work better with the brightness on the basis of the trailing edge of the signal.

Device lighting from incandescent and other traditional resistive device illumination respond naturally without errors on cut sinusoidal waveform generated by the reg is atora brightness with the cutting phase. In contrast, LEDs and other solid-state lighting load can be subject to a number of problems when placed in such brightness with the cutting phase, such as loss of signal in inexpensive models, false triggering of the triac, the problem is minimal, flickering expensive models, and great strides light output. Some of these problems depend on the settings of the dimmer. Therefore, in order to solve these problems, it may be necessary to electrically detect the installation or phase angle, which sets the brightness control.

The INVENTION

The present disclosure entity is directed to inventive methods and devices for determining the phase angle of the dimmer for solid-state lighting system or lighting device and determining an input voltage dimmer, when a particular phase angle above the threshold setting identify and retrieve a previously defined input voltage when the phase angle is below the threshold settings.

In General, in one aspect, a device for determining the phase angle of the dimmer that is specified through the operation with dimmer for solid-state lighting load, includes a processor having a digital input, a first diode, podkruchennye digital input and a voltage source, and a second diode connected between the digital input and ground. The device additionally includes a first capacitor connected between the digital input and definition node, a second capacitor connected between the node definitions and ground, and a resistance connected between the node definitions and the rectified voltage node, which receives the rectified voltage from the dimmer. The processor is made with the possibility to discretize the digital pulses on the digital input on the basis of the rectified voltage and to identify the phase angle of the dimmer on the basis of the lengths of the discretized digital pulses.

In another aspect, is provided a method for selectively providing the input voltage to the lighting installation, which includes brightness control, power Converter and solid-state lighting load. The method includes determining a phase angle of the dimmer and the lower or not a certain phase angle threshold determination. When a particular phase angle is below the threshold determination, the power setting of the power Converter is determined based on the previously defined values of the input voltage. When a particular phase angle is not below a threshold determination, the value of the input mains voltage is calculated, and the power setting of the power Converter is determined based on the calculated values of the input voltage.

In another aspect, is provided a method for determining the phase angle of the dimmer that is specified through the operation with dimmer for LEDs. The method includes receiving a digital input signal corresponding to the rectified voltage brightness control, brightness control, and the rectified voltage brightness control has the form of a signal; determination of the pulse front of the digital input signal corresponding to the leading edge of the waveform; periodic sampling pulse to determine the pulse length; and determining the phase angle of the dimmer on the basis of the pulse length.

When used in this document for the purposes of this disclosure, the term "led" should be understood as comprising any electroluminescent diode or other type of system based on the injection/transfer media, which allows the generation of radiation in response to an electrical signal. Thus, the term "led" includes, but not limited to, various semiconductor structure that emits light in response to current, light emitting polymers, organic light emitting diodes (OLED), electroluminescent single lamps, etc. In particular, the term "led" is referred to as light-emitting diodes of all ti is s (including semiconductor and organic light-emitting diodes), which can be done with the ability to emit radiation at one or more of the spectrum of infrared radiation, the spectrum of ultraviolet radiation and different parts of the visible spectrum (in General, including the emission wavelength from about 400 nanometers to about 700 nanometers). Some examples of LEDs include, but not limited to, various types of infrared LEDs, ultraviolet LEDs, red LEDs, blue LEDs, green LEDs, yellow LEDs, amber LEDs, orange LEDs and white LEDs (additionally explained below). You should also take into account that the LEDs can be configured and/or controlled so that they generate radiation having a different width of the spectrum (for example, full width at half maximum brightness, or FWHM) for the spectrum (for example, a narrow spectrum width, wide width of the spectrum) and many of the dominant wavelengths within this General classification of colors.

For example, one implementation of an led is made with the ability to actually generate white light (for example, white led lighting system), may include a certain number of matrices, which respectively emit different spectra of electroluminescence, which in combination, mix so that they actually generate white light. In another implementation, white led lighting system can be associated with crystallophobia, which converts the electroluminescence having a first spectrum, the second spectrum different. In one example of this implementation, the electroluminescence having a relatively short wavelength range and with a narrow bandwidth, "pumps" crystalliser, which, in turn, emits radiation with a longer wavelength, has a slightly wider range.

Also it should be understood that the term "led" does not limit physical and/or electrical type of the led housing. For example, as explained above, the led can mean one light-emitting device having a multiple matrices, which are made with the ability, respectively, to emit different spectra of radiation (e.g., which can be controlled separately or not). In addition, the led may be associated with phosphor, which is considered an integral part of the led (for example, some types of LEDs, white light). In General, the term "led" may mean the LEDs in the housing, the LEDs without housing, surface mount LEDs, LEDs for installation on Board, the LEDs for the T-shaped buildings, led to the building is impressive with radial pins LEDs for power supplies, LEDs, including some furrows and/or optical element (e.g., a light-diffusing lens), etc.

It should be understood that the term "light source" means one or more of a variety of radiation sources, including, but not limited to, led light sources (including one or more LEDs as specified above), the light sources on the basis of incandescent lamps (for example, incandescent bulbs, halogen lamps), light sources on the basis of fluorescent lamps, light sources based on phosphorescent lamps, light sources on the basis of discharge lamps high intensity (for example, sodium, mercury and metallogenica lamp), lasers, other types of light sources based on electroluminescent lamps, light sources based on bioluminescent lamps (e.g., flare light), the light sources based on sociallyessential lamps (for example, gas lamps, arc coal sources of emission, the light sources based on photoluminescent lamp (for example, the light sources based on gas discharge lamps), light sources based on cathodoluminescence lamps using electronic satiation, the light sources based on galvanomagnetic lamps, light sources based on crystallochemistry lamps, sources SV is the one based on chinaunipath lamps, the light sources on the basis of thermoluminescence lamps, light sources based on triboluminescent lamps, light sources based on sonoluminescence lamps, light sources on the basis of radio-luminescent lamps and fluorescent polymers.

This light source may be configured to generate electromagnetic radiation within the visible spectrum outside of the visible spectrum or in combination of both. Therefore, the terms "light" and "radiation" are used interchangeably in this document. Additionally, the light source may include as an integral component of one or more filters (e.g., color filter), lenses or other optical components. In addition, it should be understood that the light sources can be performed for a variety of applications, including, but not limited to, indicators, displays and/or lighting. The light source is a light source, which, in particular, is configured to generate radiation having a sufficient brightness to effectively illuminate an internal or external space. In this context, "sufficient brightness" means sufficient power radiation in the visible spectrum, generated in the space or environment (unit "lumens" is often used to ensure that predstavljati full light output from the light source in all directions, from the point of view of the radiation power or "luminous flux")to provide ambient light (i.e. light that can be perceived indirectly and which, for example, may wholly or partly be reflected from one or more of a number of intermediate surfaces before perception).

The term "lighting system" or is used herein to mean the implementation or arrangement of one or more lighting devices, in particular form-factor, Assembly, or completeness. The term "lighting device" is used herein to mean a hardware system that includes one or more light sources of the same or of different types. This lighting device can be any of a multitude of installation and Assembly fixtures for the source(s) of light, layouts and forms a casing/housing and/or configurations of the electrical and mechanical connections. Additionally, this lighting device may not necessarily be associated (for example, to include, be connected to and/or combined into one unit) with various other components (e.g., control circuits)relating to the source(s) of light. "Led lighting device" means a lighting device that includes one or more light odioznyh light sources, as explained above, single or in combination with other nesuliginami light sources. "Multi-channel" lighting device means led or nezvladanie lighting device that includes at least two light sources, configured to, respectively, generate different radiation spectra, with each different spectrum of the source can mean "channel" multi-channel lighting unit.

The term "controller" is used herein generally to describe various hardware systems associated with one or more light sources. The controller can be implemented in a variety of ways (for example, using dedicated hardware to perform various functions explained in this document. "Processor" is one example of a controller that uses one or more microprocessors that can be programmed using software (e.g., microcode)to perform various functions explained in this document. The controller can be implemented with or without the use of the processor, and can also be implemented as a combination of dedicated hardware to perform some functions, and processor (EmOC is emer, one or more programmable microprocessors and associated circuits)to perform other functions. Examples of components of controllers that can be used in different variants of implementation of the present disclosure include, but not limited to, traditional microprocessors, microcontrollers, application-specific integrated circuits (ASIC) and programmable gate arrays (FPGA).

In various implementations, the processor and/or controller can be associated with one or more media storage (generally referred to herein as a storage device, such as volatile and non-volatile computer storage device, for example random access memory (RAM), a persistent storage device (ROM), programmable permanent memory (PROM), electrically programmable permanent memory (EPROM), electrically erasable and programmable permanent memory (EEPROM), flash memory based on the universal serial bus (USB)drives, floppy disks, CD disks, optical disks, magnetic tape etc). In some implementations, the media storage data can be encoded using one or more programs that, when executed on one or more processor and/or controllers, carry out at least some of the functions explained in this document. Various media storage can be fixed in the processor or controller or may be portable, so that one or more programs stored on them can be loaded into the processor or controller to implement various aspects of the present invention, are explained in this document. The terms "program" or "computer program" is used herein in a General sense to mean any type of native code (e.g., software or microcode)that can be used to program one or more processors or controllers.

In one network implementation, one or more devices associated with the network, can act as a controller for one or more other devices associated with the network (for example, in relation to the master/slave). In another implementation, the network environment may include one or more of the selected controllers, which are made with the ability to manage one or more devices associated with the network. In General, a number of devices associated with the network may have access to data that is present in the medium or media of communication; however, this device can be "addressed" in t is m, it is made with the ability to selectively share data (i.e. receive data from and/or transmit data to the network, for example, based on one or more specific identifiers (for example, "address"), which is assigned.

The term "network" when used herein means any combination of two or more devices (including controllers or processors), which simplifies transportation information (for example, device management, data storage, data exchange, etc) between any two or more devices and/or between multiple devices connected to the network. Should be easy to take into account that different implementations of networks suitable for connection of several devices may include any of a variety of network topologies and use any of a variety of communication protocols. Additionally, in various networks according to the present disclosure entity, any connection between two devices can provide a dedicated connection between two systems or, alternatively, the unselected connection. In addition to the transfer of the information intended for these two devices, such unselected connection can transfer information, not necessarily designed for any of these two devices (for example, open a network connection). Also, should be easy to take into account that different network devices, as explained in this document, can use one or more of wireless, wired/cable and/or fiber-optic communication lines in order to simplify the transport of information across the network.

You should take into account that all combinations of the above principles and additional principles, more explained below (if such principles are not mutually inconsistent), considered part of the inventive subject matter disclosed herein. In particular, all combinations of the claimed subject matter specified at the end of this disclosure are considered part of the inventive subject matter disclosed herein. You should also take into account that the terms are clearly used in this document, which may appear in any disclosing entity that is incorporated by reference must match the value that is most consistent with specific principles disclosed in this document.

BRIEF DESCRIPTION of DRAWINGS

In the drawings similar reference number, in General, refer to identical or similar parts in the various views. In addition, the drawings are not necessarily drawn to scale, instead emphasis is placed on clarity, Fig is sterowania principles of the invention.

Fig. 1 is a block diagram showing a lighting system with adjustable brightness, including solid-state lighting installation and a phase detector according to a characteristic variant implementation.

Fig. 2 is a schematic diagram showing the system brightness control, which includes the schema definition phase characteristic according to a variant of implementation.

Fig. 3A-3C show exemplary waveforms and the corresponding digital pulses of brightness control characteristic according to a variant of implementation.

Fig. 4 is a flowchart of the operational sequence of the method, showing the process of determining the phase angle of the dimmer according to a characteristic variant implementation.

Fig. 5 shows exemplary waveforms and the corresponding digital pulse solid-state lighting systems with and without brightness control characteristic according to a variant of implementation.

Fig. 6 is a flowchart of the operational sequence of the method, showing the process of determining the presence of brightness control characteristic according to a variant of implementation.

Fig. 7 is a schematic diagram showing the system brightness control, including solid-state lighting installation and schema definitions of the phases according to the typical option is sushestvennee.

Fig. 8A shows exemplary waveforms of the dimmer with the setting level is above the threshold value determination in accordance with the traditional version of the implementation.

Fig. 8B shows exemplary waveforms of the dimmer with the setting level is below the threshold defining characteristic according to a variant of implementation.

Fig. 9 is a flowchart of the operational sequence of the method, showing the process of determining the input voltage using a specific phase angle of the dimmer according to a characteristic variant implementation.

Fig. 10 is a block diagram showing a lighting system that includes a solid state lighting system and the controller input voltage characteristic according to a variant of implementation.

Fig. 11 is a block diagram of the controller for the controller input voltage characteristic according to a variant of implementation.

Fig. 12 is a flowchart of the operational sequence of the method, showing the process of power control in solid-state lighting installation in accordance with the traditional version of the implementation.

Fig. 13 is a flowchart of the operational sequence of the method, showing the process of determining the value of the signal voltage of the input voltage according ha is Acterna option implementation.

Fig. 14 is a flowchart of the operational sequence of the method, showing the process of determining the peaks of the waveform of the input voltage according to a characteristic variant implementation.

Fig. 15 is a flowchart of the operational sequence of the method, showing the process of determining the slope of the waveform of the input voltage according to a characteristic variant implementation.

Fig. 16A and 16B are exemplary trajectories of the waveforms of the input voltage without dimming and brightness control.

Fig. 17 is a graph showing the approximate slopes corresponding to the waveforms of the input voltage without dimming and brightness control.

DETAILED description of the INVENTION

In the following detailed description, for purposes of explanation and not limitation, typical embodiments of disclosing specific details are set forth to provide a full understanding of these ideas. However, specialists in the art should be obvious that, in accordance with an advantage of the present disclosure, other embodiments of according to these ideas that depart from the specific details disclosed in this document, remain within the scope of the attached claims. Chrome is also descriptions of known hardware systems and methods may be omitted so as not to hinder the understanding of the specific embodiments. Such methods and hardware systems, of course, are within the scope of these ideas.

Applicants have found that there is an advantage to provide a scheme that allows the determination of the level of brightness control (phase angle of the dimmer), in which the dimmer is set for solid-state lighting systems. Applicants also have found that there is an advantage to provide a scheme that allows detection of the presence (or absence) of the dimmer for solid-state lighting installation.

In addition, applicants have found that there is an advantage in that universal to provide power for solid-state lighting installations using various special input voltages of the network, for example, 100 VAC, 120 VAC, 208 VAC, 230 VAC and 277 VAC, and that has the advantage of being able to accurately determine the value of the input voltage, when adjusting the brightness above the threshold determination or phase angle.

Fig. 1 is a block diagram showing a lighting system with adjustable brightness, including solid-state lighting installation and phase detector the output angles in accordance with the traditional version of the implementation.

Referring to Fig. 1, system 100 lighting with adjustable brightness includes a controller 104 brightness and circuit 105 straightening, which provide a rectified voltage Urect (brightness control) from the network 101 of the supply voltage. The network 101 of the supply voltage can provide various nevirapine input voltage, for example 100 VAC, 120 VAC, 230 VAC and 277 VAC, according to various implementations. The controller 104 brightness is the brightness control with the cutting phase, for example, which provides the ability to control brightness by cutting the front of the fronts (with brightness control front or rear fronts (the brightness control on the basis of the trailing edge of the signal forms of the voltage signal from the network 101 of the supply voltage in response to vertical operation with slider 104a. In General, the absolute value of the rectified voltage Urect is proportional to the phase angle specified by the controller 104 brightness, so that a lower phase angle leads to a lower rectified voltage Urect. In the illustrated example, it can be assumed that the slider is moved down to lower the phase angle, reducing the amount of light output by the solid state lighting load 140, and moves up to increase the phase angle, increasing the number of the Board, output by the solid state lighting load 140.

System 100 lighting with adjustable brightness additionally includes a detector 110 phase angles and the Converter 120 power. In General, the detector 110 phase angles determines the phase angle regulator 104 brightness based on the rectified voltage Urect. In a different implementation, the detector 110 phase angles may output the control signal power, for example, through line 129 control, the Converter 120 power in the extent to which the detector 110 phase angles made with the possibility to control the operation of the Converter 120 power. The signal power control may be a signal pulse-code modulation (PCM) or other digital signal, for example, and may alternate between a high logic level and low logic levels in accordance with the working cycle, defined by the detector 110 phase angles based on a specific phase angle. The duty cycle can vary from about 100% (e.g., continuously at a high logical level) to approximately zero percent (e.g., continuously at a low logical level) and includes any percentage in between, for example, to regulate properly configuring the power Converter 120 power, h is usually used to control the level of light, emitted by the solid state lighting load 140.

In a different implementation, the Converter 120 power takes the rectified voltage Urect from the circuit 105 straightening and outputs a corresponding DC voltage to power the solid state lighting load 140. The Converter 120 converts power between the rectified voltage Urect and a constant voltage on the basis of at least the absolute value of the voltage outputted from the regulator 104 brightness through the circuit 105 straightening, for example, specified through the operation with slider 104a. DC voltage output by the inverter 120 power, thereby reflecting the phase angle of the dimmer (i.e. the level of brightness control)used by controller 104 brightness.

Fig. 2 is a schematic diagram showing the system brightness control, which includes the scheme of determination of the phase angles of brightness control characteristic according to a variant of implementation. Common components in Fig. 2 are similar to components in Fig. 1, although additional details are provided regarding various typical components in accordance with an illustrative configuration. Of course, other configurations can be implemented without deviation from the scope of the present ID the th.

Referring to Fig. 2, the system 200 brightness control includes a circuit 205 straightening and circuit 210 determination of the phase angles of brightness control (dotted rectangle). As explained above in relation to scheme 105 rectifying circuit 205 straightening is connected to the brightness control knob (not shown)provided through the neutral input and input under voltage brightness control to take nevirapine voltage (brightness control) from the mains (not shown). In the illustrated configuration, the circuit 205 straightening includes four diode D201-D204 connected between the node N2 rectified voltage and ground. The node N2 is rectified voltage takes the rectified voltage Urect (brightness control) and is connected to ground through a capacitor C215 input filter connected in parallel with the circuit 205 straightening.

The detector 210 phase angles determines the phase angle of the dimmer (brightness control) on the basis of the rectified voltage Urect and, in a different implementation, can output a signal power control of PWM output 219, for example, in the power Converter to operate led loads, as discussed below with reference to Fig. 7. This allows the detector 210 phase angles to selectively adjust led the rite of power, delivered from the input power to the led load, based on a specific phase angle.

In characteristic illustrated embodiment, the circuit 210 determination of the phase angles includes a microcontroller 215, which uses waveforms of the rectified voltage Urect to determine the phase angle of the dimmer. The microcontroller 215 includes a digital input 218 connected between the first diode D211 and the second diode D212. The first diode D211 has the anode connected to the digital input 218, and a cathode connected to the source Vcc voltage, and the second diode 112 has an anode connected to ground and a cathode connected to the digital input 218. The microcontroller 215 also includes a digital output, for example PWM output 219.

In a different implementation, the microcontroller 215 may be a processor PIC12F683 offered by the company Microchip Technology, Inc., for example, although other types of microcontrollers or other processors may be included in the design without straying from the scope of these ideas. For example, the functionality of the microcontroller 215 may be implemented by one or more processors and/or controllers that is connected to receive a digital input between the first and second diode D211 and D212, as explained above, which can be programmed using the prog is mnogo software or firmware (e.g., stored in a storage device)to perform various functions, or can be implemented as a combination of dedicated hardware to perform some functions, and a processor (for example, one or more programmable microprocessors and associated circuits)to perform other functions. Examples of components of controllers that can be used in different variants of implementation, include, but not limited to, traditional microprocessors, microcontrollers, ASIC and FPGA, as explained above.

The circuit 210 determination of the phase angles additionally includes various passive electronic components, for example, the first and second capacitor C213 and C214 and resistance, indicated by the characteristic of the first and second resistors R211 and R212. The first capacitor C213 is connected between the digital input 218 of the microcontroller 215 and the node N1 definitions. The second capacitor C214 is connected between the node N1 definitions and earth. First and second resistors R211 and R212 are connected in series between the node N2 is rectified voltage and the node N1 definitions. In the illustrated embodiment, the first capacitor C213 can have a value of approximately 560 pF, and the second capacitor C214 may have a value of, for example, approximately 10 pF. In addition, the first resistor R211 who may have a value for example, approximately 1 Megohm, and the second resistor R212 may have a value of about 1 Megohm. However, the corresponding values of the first and second capacitor C213 and C214 and the first and second resistors R211 and R212 may vary to provide unique benefits for any particular occasion or to meet specialized design requirements of various implementations, as should be obvious to a person skilled in this technical field.

The rectified voltage Urect (brightness control) is connected to AC digital input 218 of the microcontroller 215. The first resistor R211 and the second resistor R212 limit the current to a digital input 218. When the waveform of the rectified voltage Urect becomes a high logic level, the first capacitor C213 charged on the leading edge through the first and second resistors R211 and R212. The first diode D211 fixes the voltage drop across one diode digital input 218 above source Vcc voltage, for example, while the first capacitor C213 charged. The first capacitor C213 remains charged, provided that the waveform is not zero. On the trailing edge waveform of the rectified voltage Urect first capacitor C213 discharged through the second capacitor C214, and digital input 218 is fixed to the voltage drop across one diode below the earth through the second diode D212. When the brightness control on the basis of the trailing edge signal is used, the falling edge of the waveform corresponds to the beginning of the cut part of the waveform. The first capacitor C213 remains discharged, provided that the waveform is zero. Accordingly, the resulting digital pulse logic level on the digital input 218 practically corresponds to the movement of cut, rectified voltage Urect, examples of which are shown in Fig. 3A-3C.

More specifically, Fig. 3A-3C show exemplary waveforms and the corresponding digital pulses on the digital input 218 according to the characteristic variations of implementation. The upper waveforms on each drawing illustrate cut, rectified voltage Urect, the value of the cut reflects the level of dimming. For example, waveforms can illustrate part of the total peak rectified sinusoidal 170 or 340 In the European Union), which appears at the output of the dimmer. The bottom square waveforms illustrate the corresponding digital pulses observed on the digital input 218 of the microcontroller 215. Namely, the length of each digital pulse corresponds to cut the signal form and thereby equal to the amount of time when the internal switch of the dimmer included. Through the of Riem digital pulses via a digital input 218 microcontroller 215 is able to determine the level to set the brightness control.

Fig. 3A shows exemplary waveforms of the rectified voltage Urect and the corresponding digital pulses when the brightness knob is the greatest value that you specify through the top position in the slider brightness, shown next to the waveforms. Fig. 3B shows exemplary waveforms of the rectified voltage Urect and the corresponding digital pulses when the brightness knob is the average value indicated by the average position of the slider brightness, shown next to the waveforms. Fig. 3C shows exemplary waveforms of the rectified voltage Urect and the corresponding digital pulses when the brightness knob is the lowest value indicated by the lower position of slider brightness, shown next to the waveform.

Fig. 4 is a flowchart of the operational sequence of the method, showing the process of determining the phase angle of the dimmer according to a characteristic variant implementation. The process may be implemented, for example, by firmware and/or software executed by the microcontroller 215, shown in Fig. 2, or, to summarize, by a processor or controller, such as detector 110 is gas corners, it is shown in Fig. 1.

At step S421 in Fig. 4, the leading edge of the digital pulse input signal (for example, specify through the front of the fronts of the lower waveform in Fig. 3A-3C) is determined, for example, through the initial charging of the first capacitor C213. The discretization on the digital input 218 of the microcontroller 215, for example, begins at step S422. In the illustrated embodiment, the signal is sampled into digital form within a predetermined time equal to only politicla outlet. Each time the signal is sampled, at step S423 is determined that has a sample of high logical level (for example, a digital "1"or a logic low (e.g., a digital "0"). In the illustrated embodiment, the comparison is performed at step S423, to determine whether or not the sample is a digital "1". When the sample is a digital "1" (step S423: Yes), the counter is incremented at step S424, and when the sample is not digital "1" (step S423: No), a small delay is inserted at step S425. The delay is inserted, so that the number of clock cycles (for example, the microcontroller 215) is the same regardless defines a sample as a digital "1" or a digital "0".

At step S426, determined, discretized or not all politicl outlet. When Alusil outlet is not completed (step S426: "No"), the process returns to step S422 to re-discretize the signal on the digital input 218. When politicl mains completed (step S426: Yes), the sampling stops and the counter value is accumulated at step S424, is identified as the current phase angle of the dimmer at step S427, and the counter is reset to zero. The counter value may be stored in a storage device, examples of which are explained above. The microcontroller 215 may then wait until the next leading edge to start sampling again.

For example, it can be assumed that the microcontroller 215 accepts 255 samples during politicla outlet. When the brightness control or phase angle is set via the slider near the top of the range (for example, as shown in Fig. 3A), the counter is incremented until approximately 255 at step S424 in Fig. 4. When the brightness control is set via the slider near the bottom of the range (for example, as shown in Fig. 3C), the counter is incremented only about 10 or 20 at step S424. When the brightness control is set somewhere in the middle of the range (for example, as shown in Fig. 3B), the counter is incremented until approximately 128 at step S424. The counter thus giving the microcontroller 215 accurate indicator as to the level at which set the brightness knob, or phase angle of the dimmer. In a different implementation, the phase angle of the dimmer can be calculated, for example, by a microcontroller 215 using a predefined function of the counter value, the function may vary to provide unique benefits for any particular occasion or to meet specialized design requirements of various implementations, as should be obvious to a person skilled in this technical field.

Accordingly, the phase angle of the dimmer can be electronically determined using the minimum passive components and structure of the digital inputs of the microcontroller (or other schema processor or controller). In the embodiment, the determining of the phase angle is performed using the communication patterns by alternating current, the structure of the digital inputs with led fixation of the microcontroller and of the algorithm (for example, implemented by firmware, software and/or hardware)that are performed to determine the level settings of the dimmer. Additionally, the status of the dimmer can be measured using a minimum number of components and using the advantages of the structure of the digital inputs microcontroll the RA.

Digital circuit determination of the phase angles and the associated algorithm can be used in various cases when you need to know the phase angle of the dimmer with the cutting phase. For example, the electronic converters, which operate as a load for the dimmer with the cutting phase, you can use this scheme and a method to determine the phase angle of the dimmer. After the phase angle of the dimmer is known, the range of dimming and compatibility with brightness relative to solid-state lighting systems (e.g., LEDs) can be increased. Examples of such improvements include controlling a color temperature of the lamp by adjusting the brightness control knob, localized determination of the minimum load that the dimmer can handle, localized determining when the brightness knob is running in promiscuous mode, an increase in the maximum and minimum ranges of light output and the creation of light with a special regulation of the brightness curves for the positions of the slider.

The scheme of determination of the phase angles of the dimmer according to different variants of implementation can be implemented in various products EssentialWhite™ and/or eW offered by Philips Color Kinetics, including the surrounding in itself eW Blast PowerCore, eW Burst PowerCore, eW Cove MX PowerCore and eW PAR 38, etc. Additionally, it can be used as the building blocks of intelligent improvements different products to optimize them for brightness.

In a different implementation, the schema definition, for example the characteristic detection circuit illustrated in Fig. 2, can similarly be used to determine the presence or absence of the dimmer with the cutting phase. Problems of the dimmer, which occur regardless of the phase angle of the dimmer, can be properly resolved by determining first, connected or no power Converter as a load of the dimmer. In these cases, a simple binary determination of whether there is or not the brightness knob is sufficient, and additional information relating to the phase angle of the dimmer is not required, thereby eliminating the definition phase angle described above, which requires more computation than a simple binary determination of whether there is or there is no dimmer. The presence of the dimmer may be sufficient to take some action, for example, to improve compatibility of regulator the brightness with the cutting phase with led drivers. Additionally, the binary algorithm for determining the presence of the dimmer may be included as part of larger algorithms, such as the universal voltage input network.

Fig. 5 shows exemplary waveforms and the corresponding digital pulses lighting systems with and without brightness control characteristic according to a variant of implementation.

Referring to Fig. 5, the upper set of waveforms shows the rectified input voltage and corresponds to the digital logic level pulses to the connected dimmer (indicated by adjacent dimmer). The lower set of waveforms shows the rectified input voltage and the corresponding digital pulses logical level without connected to the brightness control knob (indicated by "X" through connecting dimmer). The dotted line 501 indicates a characteristic threshold value of the upper level corresponding to the brightness control. The threshold value of the upper level can be determined through various means, including empirical measurement of the activation time of the dimmer at the greatest value, the extraction time from the database of the manufacturer, etc.

Control brightness with the cutting phase does not have a chance to view the complete rectified sinusoidal voltage, but instead cuts off a section of each waveform, even at the greatest value, as shown in the upper set of waveforms. In comparison, without the connected dimmer, full sine wave rectified voltage network can be carried out, as shown in the lower set of waveforms. For example, if the digital pulse, as determined by detector 210 of phase angles does not exceed the threshold value of the upper level (as shown in the upper set of waveforms is determined that the dimmer is present. If a digital pulse is outside the threshold value of the upper level (as shown in the lower set of waveforms is determined that the dimmer is not present.

Fig. 6 is a flowchart of the operational sequence of the method, showing the process of determining whether there is or there is no dimmer, according to a characteristic variant implementation. The process may be implemented, for example, by firmware and/or software executed by the microcontroller 215 in Fig. 2.

At step S621 retrieves a specific phase angle of the dimmer. For example, the phase angle of the dimmer that is defined according to the algorithm illustrated in Fig. 4, can be removed from zapominayusche what about the device (for example, in which the information of the phase angle of the dimmer you saved in step S427). At step S622 is determined that less or no phase angle of the dimmer (for example, the length of the digital pulse) the threshold value of the upper level. When the phase angle of the dimmer is not less than the threshold value of the upper level (step S622: No), the process returns to step S621 and a specific phase angle of the dimmer again removed, so that the phase angle of the dimmer continue to be tracked. In addition, in various embodiments, implementation, flag definitions of the dimmer can be set equal to the low logic level, indicating that the dimmer is not present and/or the process may terminate. When the phase angle of the dimmer is defined as a lower threshold upper level (step S622: Yes), the flag determining the brightness control knob is set to a high logic level at step S623, for example, indicating the presence of the dimmer. Of course, in alternative embodiments, the implementation can be determined, exceeds or not (as opposed to less) extracted phase angle threshold value of the highest level, without deviation from the scope of these ideas.

Accordingly, the presence or absence of the dimmer can be electronically defined with usage is reattaching the minimum passive components and structure of the digital inputs of the microcontroller (or other processor circuit or the processing circuitry). In the embodiment, the determination of the brightness control is performed using the communication patterns by alternating current, the structure of the digital inputs with led fixation of the microcontroller and of the algorithm (for example, implemented by firmware, software and/or hardware)that is performed for the binary presence of the dimmer. As described above, the electronic determining whether connected or not power Converter solid-state lighting (such as led) as a load to the dimmer with the cutting phase, may be performed using identical components characteristic of a variant of implementation, illustrated in Fig. 2, for example, although the time-consuming algorithm with a smaller amount of calculations can be used.

Scheme for determining the presence of the dimmer and the associated algorithm can be used in various cases when you need to know, connected or not, for example, the electronic Converter as a load of the dimmer with the cutting phase. When the presence or absence of brightness control is defined, compatible with brightness relative to solid-state lighting systems (e.g., LEDs) may be the isana. Examples of such improvements include the compensation of power losses in high-end models due to the full cutting phase enable brightness control, increase efficiency by disabling all optional features, if dimmer is not present, and the inclusion of the allocated load to facilitate the requirement of the minimum load of the dimmer, if a dimmer is present.

The schema definition of the dimmer according to different variants of implementation can be implemented in various products EssentialWhite™ and/or eW offered by Philips Color Kinetics, including eW Blast PowerCore, eW Burst PowerCore, eW Cove MX PowerCore and eW PAR 38, etc. Additionally, it can be used as the building blocks of intelligent improvements different products to optimize them for brightness.

In a different implementation, the functionality of the microcontroller 215 may be implemented by one or more processing circuit, consisting of any combination of hardware, firmware or software architectures, and may include its own storage device (for example, non-volatile storage device) for storing executable software/firmware code, which gives him the possibility of the ity to perform various functions. For example, the functionality may be implemented using ASIC, FPGA, etc.

Applicants have additionally identified and took into account that, in addition to the circuit, allowing the determination of the phase angle of the dimmer for solid-state lighting installation and/or is present or not the brightness knob with the cutting phase, the advantage is to provide a schema that defines the input voltage to provide a universal input voltage in a solid state lighting system, when the level of brightness control is set to a high enough level to do it. Otherwise, a previously defined input voltage is removed, for example, from a storage device.

Fig. 7 is a schematic diagram showing typical lighting system for solid-state lighting installation according to different variants of implementation. Similarly, the system 200 brightness control according to Fig. 2, the system 700 brightness control, illustrated in Fig. 7, includes a circuit 705 straightening connected to the brightness control knob (not shown), the circuit 710 determination of the phase angles of brightness control (dotted rectangle), the inverter 720 power circuit 730 sampling forms of input signals (Punkte the hydrated rectangle) and the led load 740. The microcontroller 715 is included in the circuit 710 determination of the phase angles of the dimmer and circuit 730 sampling forms of input signals.

In the illustrated configuration, the circuit 705 straightening includes four diode D701-D704 connected between the node N2 rectified voltage and ground. The node N2 is rectified voltage takes the rectified voltage Urect (brightness control) and is connected to ground through a capacitor C715 input filter connected in parallel with the circuit 705 straightening.

Circuit 710 determination of the phase angles of the dimmer includes a microcontroller 715, which has a digital output, for example PWM output 719 connected to line 729 control. In a different implementation, the microcontroller 715 may be PIC12F683 offered by the company Microchip Technology, Inc., for example, although other types of microcontrollers or other processors may be included without deviation from the scope of these ideas, as explained above relative to the microcontroller 215 in Fig. 2. In the illustrated embodiment, the circuit 710 determination of the phase angles additionally includes first and second capacitors C713 and C714 and first and second resistors R711 and R712, which are configured and operate almost identically to the first and second capacitor C213 and C214 and the first and second R211 and R212 in Fig. 2, and thus the corresponding description is not repeated. Accordingly, the digital pulse logic level on the digital input 718 of the microcontroller 715 almost corresponds to the movement of cut, rectified voltage Urect associated AC digital input 718 of the microcontroller 715.

In addition, the scheme 730 sampling forms of input signals includes a microcontroller 715, and a voltage divider comprising third and fourth resistors R731 and R732, which provides a divided version of the rectified voltage Urect. In the illustrated embodiment, the third resistor R731 is connected between the node N2 is rectified voltage and the node N3 sampling waveforms, and the fourth resistor R732 is connected between the node N3 sampling waveforms and earth. In the embodiment, the third resistor R731 can have a value of approximately 1.5 magonov, and the fourth resistor R732 can have a value of, for example, approximately 15 kilimov. However, the corresponding values of the third and fourth resistors R731 and R732 may vary to provide unique benefits for any particular occasion or to meet specialized design requirements of various implementations, as should be obvious to those skilled in allestimenti.

Circuit 730 sampling forms of input signals essentially provides a divided version of the input rectified voltage Urect of circuit 705 straightening, which allows the microcontroller 715 to determine the exact representation forms the input signal through the analog input 717. The microcontroller 715 can use waveforms to determine uncut input voltage, i.e. the voltage at the input to the dimmer. As part of the scheme 710 determination of the phase angles of the dimmer explained above, the microcontroller 715 also receives information about the phase angle (or level of brightness) the brightness control knob.

As explained above, the inverter 720 power mode with a direct link or open-circuited, as described, for example, in the patent (USA) No. 7256554 author Lys, which is hereby contains the link. The microcontroller 715 has the ability to adjust the power setting of the inverter 720 power output power control for PWM output 719 through line 729 control. In a different implementation, the Converter 720 power can be L6562, offered by the company ST Microelectronics, for example, although other types of microcontrollers, power inverters and other processors may be included without otstuplenie the volume of these ideas.

In General, software and/or firmware algorithm executed by the microcontroller 715, takes advantage of the fact that at high phase angles of the dimmer (less truncated forms of the signal), as shown in Fig. 8A, the input voltage can be more accurately determined, which can then be used to more accurately set the power Converter 720 power. However, at lower phase angles of the dimmer (stronger cut the waveforms, as shown in Fig. 8B, the definition of the input voltage becomes demanding computationally intensive and requires a high-performance microcontroller or other processor or controller, as in this case, little forms of signals available for measurement. Therefore, according to different variants of implementation, an example of which is explained below with reference to Fig. 9, instead of performing such an intensive analysis at lower phase angles of the dimmer signal power control is set based on a previously defined and saved values of the input voltage, for example, is calculated when the brightness knob at high phase angle of the dimmer, or is calculated using the more flexible (but less accurate) algorithm for grouping, etc the measures which will be explained below with reference to Fig. 13. This eliminates the need to include high-performance microcontroller and/or a relatively large processing times.

The phase angle of the dimmer, above which a more precise definition of the forms of the input signal and the input voltage can be referred to as a threshold value determination. In a different implementation, the threshold value determination is a predefined phase angle of the dimmer, in which the microcontroller 715 has the ability to collect sufficient sample to perform an accurate determination of the input voltage. The threshold value determination, therefore, may vary depending on various factors, such as, for example, the speed of the microcontroller 715 and the efficiency of the algorithm used to determine the input voltage of the cut waveform. The cost of the microcontroller 715 and the accuracy of the signal power provided by the microcontroller 715 in the Converter 720 power through line 729 management, therefore, can be linked.

Fig. 8A shows exemplary waveforms of brightness control with phase angle is above a threshold, determining, according to a characteristic variant of implementation, so that accurate measurement of the input voltage m which may be performed by microcontroller 715, for example, through the circuit 730 sampling forms of input signals and analog input 717 shown in Fig. 7, using algorithms to determine peaks and dips, explained below, for example, with reference to Fig. 14 and 15, respectively. Fig. 8B shows exemplary waveforms of the dimmer having a phase angle below the threshold value for determination, in accordance with the traditional version of the implementation, so that a previously defined input voltage, for example, calculated, when the phase angle of the dimmer is above a threshold determination, and the corresponding last optimal power setting is used to set the power of the power Converter. Alternatively, when a previously defined input voltage is not available, the input voltage and the corresponding power setting can be determined using an alternative, somewhat less accurate method of calculation, for example, grouping, an example of which is illustrated below with reference to Fig. 13.

Fig. 9 is a flowchart of the operational sequence of the method, showing the process of determining the input voltage and corresponding power setting based on a specific phase angle of the dimmer according to a characteristic variant implementation.

Referring to Fig. 9, in Provillus arowana embodiment, at step S910 originally defined to perform or not the process in accordance with the first power solid-state lighting system, which is the first time power is applied to the solid state lighting system. When this is not the first power-on (step S910: No), a previously defined value of the input mains voltage is retrieved from the storage device, for example, EEPROM, at step S920. Alternatively, the storage device may include any type of volatile or non-volatile computer storage device, such as RAM, ROM, PROM, EPROM, USB flash memory, floppy disks, CD-ROMs, optical disks, magnetic tape, etc. Previously defined value of the input mains voltage is correlated with the associated configuration of the power Converter 720 power using, for example, previously filled with a lookup table or other means of Association. The associated power setting is applied to the inverter 720 power through the control signal power output from the microcontroller 715, so that solid-state lighting system is operating normally, while the current input voltage of the network is defined.

The phase angle of the dimmer is determined at step S921. Phase angle regulator jar the spine can be obtained, for example, in accordance with the process of determining the phase angle of the dimmer shown in Fig. 4 explained above. In step S922, is defined, below or not the phase angle of the dimmer threshold determination. When the phase angle of the dimmer is below the threshold determination (step S922: "Yes"), previously defined in the input voltage and the associated power setting, called the last optimal power setting is used as the current setting for the power stage S924. In the embodiment, the latter is the optimal configuration of power is the power setting determined based on the input voltage, extracted in step S920, which simply is not changed at step S924, when the phase angle of the dimmer is below the threshold definition.

When the phase angle of the dimmer is not below the threshold value determination (step S922: "No"), the new input voltage and corresponding power setting is determined at step S926. In the embodiment, the circuit 730 sampling forms of input signals and analog divider forms the input signal of the microcontroller 715 are used with algorithms for determining peaks and slopes, for example, explained below with reference to Fig. 14 and 15, to determine the exact input voltage and the crust is oyku power. For example, the microcontroller 715 can be implemented almost identically to the controller 1020 of Fig. 10, discussed below, and thus to receive the digital values of the DC voltage signal from the analog-to-digital Converter (for example, A/D 1022 in Fig. 10)corresponding to the divided version of the rectified voltage Urect of the voltage divider, which includes third and fourth resistors R731 and R732.

Since it is known that the phase angle of the dimmer is above a threshold, determine the exact input voltage can be determined continuously in contrast to limit the definition to one of several predefined input voltages and power management settings (i.e. grouping), as explained below with reference to Fig. 13. In other words, how to determine the peaks and slopes of Fig. 14 and 15 can be used in order, in particular, to determine the value of the input voltage and thereby to determine the exact power setting. As explained above, a certain value of the input voltage can be correlated with the power setting, using a previously filled lookup table, for example, or other funds of the Association.

Again referring to step S910, when it is determined that this is the first power-on (step S910: Yes), not previously identified is by setting the input power voltage, to load from the storage device. Thus, the process proceeds to step S911, on which the phase angle of the dimmer is determined, as explained above relative to step S921. At step S912, is defined, below or not the phase angle of the dimmer threshold determination. When the phase angle of the dimmer is not below the threshold value determination (step S912: No), a new input voltage and corresponding power setting determined in step S926, as explained above.

However, when adjusting the brightness below the threshold value determination (step S912: Yes), since there is no previously defined input voltage for extraction algorithm based on grouping is implemented at step S914 to place the input voltage in one of several elements of the grouping, for example, 120 V, 230 V or 277 Century Example of detection algorithm based on grouping explained below with reference to Fig. 13. The power setting corresponding grouped the voltage that is then used by the inverter 720 power up until not is determined that the phase angle of the dimmer moved above a threshold, determining, for example, in accordance with the subsequent executions of the method of Fig. 9, while a more precise definition of the forms of the signal and thus the input voltage and power setting can be performed without grouping. In various embodiments, implementation, step S914 may include an algorithm that is different from the grouping, which requires fewer cut waveforms than the algorithm for determining the input voltage step S926 to evaluate input voltage (thus, working at lower phase angles of brightness control) without derogating from the volume of these ideas.

The phase angle and the detection circuit threshold definitions and associated algorithm can be used in various cases, when you want to set the power setting of the power Converter. According to different variants of implementation, the power led load, for example, can be adjusted in a continuous range of input voltages network using inexpensive processor with a relatively low power level when the phase angle of the dimmer is above a threshold determination. For example, the actual power in the led load can be determined through the input RMS voltage and signal that the microcontroller sends power Converter.

The process of grouping sets the control signal power sent to the power Converter, for example, a microcontroller, equal to a limited number of possible values (for example, three values in response to input the data voltage 120 V, 230 V or 277 V). Since the actual power of the LEDs is determined by the input RMS voltage, and by means of the signal of the microcontroller when the input RMS voltage, for example, is 179 V or 208 V, precise power may not be delivered to the LEDs. For example, the implementation group could not determine the difference between 100 (commonly used in Japan) and 120 (usually in North America). As a result, when working at 100 In the implementation of the group can set the control signal power of the microcontroller is equal to the value suitable for 120 V, and the input RMS voltage is lower, and thus the power delivered to the LEDs and the light output are incorrect. Similarly, in the European Union, the input voltage are 220 or 240 V, which can lead to the identical problem. The use of digital circuits determination of the phase angles, for example, in Fig. 2, provides the ability to determine the exact input voltage (and corresponding power setting), at least in those cases, when adjusting the brightness is quite high.

In addition, as explained above, it is difficult to determine the input voltage badly cut sinusoidal. Thus, when the phase angle of the dimmer is all the ü low (for example, as shown in Fig. 8B), requires many resources and a large amount of calculations in order to determine the full sine wave, cut section which is a part of. According to different variants of implementation of this can be prevented by determining the input voltage only when the brightness knob is above a threshold definition, while accurate determination can be performed, for example, without having to significantly increase the computing power or the load of the microcontroller 715.

Fig. 10 is a block diagram showing a lighting system that includes a solid state lighting system and the controller input voltage characteristic according to a variant of implementation. Referring to Fig. 10, the controller 1010 of the input voltage includes a divider 1015 voltage, analog-to-digital (A/D) Converter 1022, the controller 1020 and the controller 1030 factor correction (PFC) in the transition mode.

The divider 1015 voltage takes the rectified voltage from the power source. In General, the rectified voltage is the input voltage or AC line having a voltage value, for example, between about 90 VAC to about 277 VAC and the corresponding waveform. The signal input line voltage BL is utilised for to enable solid-state lighting system 1040. The divider 1015 voltage provides a signal corresponding to a divided version of the signal rectified input voltage. The voltage signal is provided to analog-to-digital Converter 1022 as the analog signal input voltage.

In the illustrated embodiment, the divider 1015 voltage includes first and second resistors 1011 and 1012, connected in series between the source of the rectified input voltage and a node N11, which is connected to the input of the controller 1020. The divider 1015 voltage additionally includes a third resistor 1013 connected between the node N11 and the ground. In the embodiment, the first and second resistors 1011 and 1012 have a resistance of approximately 750 ohms, and the third resistor 113 has a resistance of approximately 13 ohms. It should be understood that in other embodiments, implementation, resistance values of the first and third resistors 1011-1013 and/or configuration of the divider 1015 voltage may vary to provide unique benefits for any particular occasion or to meet specialized design requirements of various implementations, as should be obvious to experts in the given field of technology.

Analog-to-digital Converter 1022 take the AET analog signal input voltage from the divider 1015 voltage, converts analog input voltages into digital values indicating the waveform of the rectified input voltage. The controller 1020 receives the digital values from the analog-to-digital Converter 1022 and determines the voltage level of the input voltage based on the digital values. The controller 1020 adjusts the control signal based on a voltage level of the input voltage and outputs a control signal to the PFC controller 1030 to control solid-state lighting installation 1040. For example, on the basis of the control signal PFC controller 1030 outputs the control signal modulation capacity to accommodate solid-state lighting installation 1040 steady state at 30 W for any particular value of the input mains voltage (for example, 120 VAC, 230 VAC or 277 VAC), as explained below.

The controller 1020 may be any combination of hardware, firmware or software architectures, as explained above, without deviation from the scope of these ideas. In addition, the controller 1020 may include its own storage device (for example, non-volatile storage device) for storing executable software/firmware code, which gives him the opportunity to perform various functions of the controller 1010 nab is agenia. For example, in a different implementation, the controller 1020 may be implemented as a microprocessor, ASIC, FPGA, microcontroller, for example, the PIC12F683 microcontroller offered by the company Microchip Technology, Inc., etc. Similarly, the PFC controller 1030 may be any combination of hardware, firmware or software architectures, without deviation from the scope of these ideas. For example, in various embodiments, implementation, PFC controller 1030 may be implemented as a microprocessor, ASIC, FPGA, microcontroller, for example PFC controller L6562, offered by the company ST Microelectronics, etc. in Addition, although illustrated separately, it should be understood that analog-to-digital Converter 1022 and/or PFC controller 1030 and the associated functionality can be included in the controller 1020 in different variants of implementation. Additionally, in various embodiments, the implementation, the controller 1020 and PFC controller 1030 may be implemented by a microcontroller controller 715 and 720 capacity Fig. 7, for example, without deviation from the scope of these ideas.

Fig. 11 is a block diagram of the controller 1020 according to a characteristic variant implementation. Referring to Fig. 11, the controller 1020 includes a processor 1024 permanent storage device (ROM) 1026, random access memory (RAM) 1027 and shaper 1028 PWM signal is s.

As explained above, the analog-to-digital Converter 1022 receives the input signal from the divider 1015 voltage and converts the input signal into digital values, indicating the waveform of the rectified input voltage. Numeric values are accepted by processor 1024 to handle and can also be stored in ROM 1026 and/or RAM 1027, for example, via the bus 1021. Processor 1024 may include its own storage device (for example, non-volatile storage device) for storing executable software/firmware code, which gives him the opportunity to perform various functions of the controller 1010 voltage. Alternatively, the executable code may be stored in the designated locations of the storage device in ROM 1026 and/or RAM 1027. ROM 1026 may include any number, type and combination of tangible machine-readable media storing data, for example PROM, EPROM, EEPROM, etc. Additionally, ROM 1026 and/or RAM 1027 may store, for example, statistical data and the results of previous calculations of the input voltage by a processor 1024.

Shaper 1028 PWM signal generates and outputs the PWM signal as a control signal, in response to instructions or control signals from processor 1024. More specifically, in the illustrated embodiment, form a is the user 1028 PWM signal varies the pulse width PWM control signals depending on the value of the input voltage, identified by processor 1024. For example, the imaging unit 1028 PWM signals can generate PWM control signals having a shorter pulse width, in response to higher values of the input voltage. Managing PWM signal is output from the controller 1020 in PFC controller 1030, which controls the modulation power solid-state lighting system 140 in accordance with the widths of the pulses of the PWM control signal. For example, the PFC controller 1030 may be performed with the opportunity to increase the current in solid-state lighting installation 1040 in response to the large width of the pulses, thereby maintaining constant power to lower voltages (e.g., 120 VAC). Similarly, the PFC controller 1030 may be configured to reduce the current in solid-state lighting installation 1040 in response to the smaller width of the pulses, thereby maintaining a constant power for higher voltages (e.g., 277 VAC).

For example, in the embodiment, the PFC controller 1030 has a dedicated pin of the current settings on your device. By setting the reference voltage on pin pin configuration current PFC controller 1030 must deliver the amount of power in solid-state lighting installation 1040, which is linked to a reference voltage, observable to taktom the pin configuration of the current. Managing PWM signal output from the controller 1020 (with variable pulse width, depending on the waveform of the input voltage) passes through the filter circuit (not shown) in the PFC controller 1030 and effectively modifies the reference voltage on pin pin configuration current PFC controller 1030. This gives you the ability to change the total power passing through the LEDs in the led matrix 1045 solid state lighting system 1040. Of course, other types of control signals and methods of controlling a solid state lighting system 1040 may be included within the scope of these ideas.

Again referring to Fig. 10, the solid-state lighting system 1040 may be, for example, a light installation EssentialWhite™offered by Philips Color Kinetics. Solid-state lighting system 1040 includes a switch 1041 and the light source or light source, such as a typical led matrix 1045. Switch 1041 turns on and off power led matrix 1045 in response to the control signal modulation power taken from the PFC controller 1030, which simultaneously adjusts the steady-state current. For example, the number of on-time allows to determine the magnitude of the current through the LEDs of the led matrix 1045. Time or cycle switch power led is th matrix 1045 thereby is adjustable for different values of input voltage. For example, a higher input voltage (e.g., 277 VAC) requires less switching intervals (resulting in a smaller current to provide power steady-state conditions (for example, 30 W) in the led matrix 1045, lower than the input voltage (e.g., 120 VAC).

Fig. 12 is a flowchart of the operational sequence of the method, showing the process of power control solid state lighting system, in accordance with the traditional version of the implementation. The different steps and/or operations illustrated in Fig. 12, may be implemented by analog-to-digital Converter 1022 and a controller 1020, for example, explained above with reference to Fig. 10 and 11.

At step S1210, the rectified line voltage alternating current or the input voltage will be accepted for the supply of solid-state lighting systems. The absolute value or the signal value of the input voltage of the network is not known and may be any of various available input voltages of the network, for example, 120 VAC, 230 VAC or 277 VAC. At step S1212, the input signal voltage is converted into a divided signal, for example, by a divider 1015 voltage, which provides a divided signal corresponding to the waveform of the input voltage. Divided signal is converted from analog to digital Faure is, for example, by an analog-to-digital Converter 1022, at step S1214 to provide digital values representing the waveform of the input voltage.

In step S1216, the absolute value or the value of the signal input voltage is determined, for example, by a controller 1020 and/or processor 1024 using numeric values described in more detail with reference to Fig. 13-15 below. In General, the algorithm for determining the peaks is performed in order to determine what has input voltage high or intermediate value (for example, 277 VAC or 220-240 VAC). However, only one algorithm for determining peaks is not possible to determine the value of the input voltage, for example, when the input voltage has a low value (e.g., 120 VAC) or when the input voltage has an intermediate value (for example, 230 VAC), which is subjected to brightness control. When the algorithm for determining the peaks is not possible to determine the value of the input voltage, the algorithm for determining the tilt is performed in order to determine that corresponds to the slope of the leading edge of the waveform of the input voltage network low value or an intermediate value.

After the value of the input mains voltage is determined, a control signal is generated and is saved for example, in PFC controller 1030 based on certain values in step S1218. On the basis of the control signal modulation power solid-state lighting system is adjusted to take into account the value of the input voltage.

Fig. 13 is a flowchart of the operational sequence of the method, showing the process of determining the signal values of the input voltage according to a characteristic variant implementation. More specifically, Fig. 13 shows a characteristic variant of implementation, in which the value of the input voltage (or voltage of the AC line) is associated with one of several predefined values voltage (e.g., low, intermediate or high). The process may be referred to as "group", because the input voltage is placed in the element group corresponding to one of the predefined values of the voltage.

In a different implementation, the exact value of the input voltage can be determined, for example, on the basis of the process of defining peaks and slopes shown on the steps S1320 and S1350 in Fig. 13, every time the cut sinusoidal waveform generated by the dimmer with the cutting phase is sufficient to provide such a definition. For example, kakayanin above with reference to Fig. 7-9, when the phase angle of the dimmer is above a threshold determination (for example, as shown in Fig. 8A), the exact value of the input voltage can be calculated using a relatively small computing power.

Referring to Fig. 13, the process is first initialized, as indicated, for example, through steps S1312 and S1314. In the embodiment, the initialization is performed only after enabling solid-state lighting systems, although the initialization may be omitted completely, or run in other moments of time in the process of determining the values of the input voltage in alternative embodiments, implementation, without deviation from the scope of these ideas. If available, a previously defined value of the input mains voltage is retrieved from the storage device at step S1312, and the control signal, for example, displayed via the controller 1020, initially set on the basis of the previously defined value of the input voltage step S1314. If the control signal is a control PWM signal, for example, the width of the PWM pulse or duty cycle is initially set according to a previously defined value of the input voltage. For example, the value of the input voltage can be determined and stored, for example, in ROM 1026, whenever t is endothelina lighting system is switched on. Accordingly, the solid state lighting system operates in the previously defined value of the input voltage, while the current value of the input mains voltage is determined. This prevents flickering, or other adverse effects during the identification process.

In step S1320, the algorithm for determining the peaks is performed in order to determine the peaks and the frequency of the input signal voltage based on the digital values, such as that provided by analog-to-digital Converter 122. The algorithm for determining the peaks of the step S1320 is explained in detail with reference to Fig. 14, which is a flowchart of the operational sequence of the method, showing the process of determining the peaks of the signal and the frequency signal of the input voltage according to a characteristic variant implementation.

Referring to Fig. 14, the digital values of the DC voltage signal (e.g., from step S1214 in Fig. 12) is read within a predetermined number of cycles (for example, 20 cycles) or within a predefined period of time (e.g., 150 MS)to identify and to preserve the maximum digital values corresponding to the peaks of the waveform of the input voltage, and/or to identify the frequency of the signal input voltage. For example, the processor 1024 may iscretionary a certain number of digital signal values of DC voltage from the analog-to-digital Converter 1022. To identify the maximum digital value, the digital value divided signal corresponding to the divided version of the rectified input mains voltage is read at step S1421 and compared with the maximum value at step S1422. The maximum value can be predefined threshold value or the stored digital value, which is previously defined as the maximum value of the number of previously read digital values.

When read the digital value exceeds the maximum value (step S1422: Yes), the read digital value is stored as the new maximum values in step S1423 so that it is used for comparison with subsequent read digital values. When the read digital value does not exceed the maximum value (step S1422: "No"), step S1423 is skipped. In step S1424 is determined that remain or no additional cycles (or time) for reading digital values. For example, the number of cycles or elapsed time can be compared with a predefined threshold or a predefined period of time, respectively, for reading digital values. When there are additional cycles or time (step S1424: "Yes"), stages S1421-S1423 again. When additional cycles or time is for reading digital values not (step S1424; "No"), the current maximum value of the discretized numerical values is the maximum value of the waveform.

The frequency of the waveform of the input voltage is calculated in step S1425, for example, by comparing the time between zero-crossing or between adjacent peak values. For example, in step S1425 is determined that is equal to the input voltage of 50 Hz or 60 Hz, which is typically caused by the geographical location of mounting the solid-state lighting systems. The waveform frequency is defined, because it directly affects the slope of the waveform, which is calculated at step S1350 in Fig. 13, as discussed below. In the embodiment, the frequency of the waveform can be defined by sampling points on the curve form of the signal (e.g., peaks or the starting points of the waves) over a period of cycles and calculate the amount of time between adjacent waves.

After determining the frequency step S1425 in Fig. 14, the process returns to Fig. 13. At stages S1332-S1335 in Fig. 13, is determined, whether or not the signal value of the input voltage to be determined without the need to determine the slope of the corresponding waveform. In particular, at step S1332, the peak value of the waveform is compared with a predefined first threshold value,to determine that whether or not the signal value of the input voltage value maximum voltage (e.g., 277 VAC). When the peak value exceeds the first threshold value (step S1332: "Yes"), determined that the signal value of the input mains voltage is the maximum voltage, at step S1333.

When the peak value does not exceed the first threshold value (step S1332: No), the process goes to step S1334, where the peak value of the waveform is compared with a predefined second threshold value, to determine what is the value of the input mains voltage value of the intermediate voltage (e.g. 230 VAC) or range of possible values for the intermediate voltage (for example, 220 VAC-240 VAC). When the peak value exceeds the second threshold value (step S1334: "Yes"), determined that the signal value of the input mains voltage is the value of the intermediate voltage (or range of possible values of the intermediate voltage), at step S1335.

When the peak value does not exceed the second threshold value (step S1334: No), the process determines the signal value of the input voltage based on the slope of the waveform. That is, when the peak value does not exceed the second threshold value, the input voltage can be either value is receiving a low voltage (for example, 120 VAC), or the value of the intermediate voltage brightness control (for example, 230 VAC), and these conditions are otherwise indistinguishable solely on the basis of the determination of peak values.

For example, in Fig. 16A and 16B are exemplary trajectories of the waveform of the signal voltage 120 VAC signal voltage 230 VAC brightness control, respectively. The comparison of Fig. 16A and 16B show that the frequency peaks and the corresponding waveforms are almost identical, but the slopes of the waveforms are different. In particular, the slope of the waveform in Fig. 16B, in General, steeper slopes of the waveform in Fig. 16A. Therefore, by calculating the slope (for example, at step S1350 in Fig. 13) can be accomplished by determining whether the signal is an input voltage of 120 VAC or 230 VAC, regardless of the brightness control. Of course, the signal line voltage 120 VAC brightness control (not shown), which may have a waveform with a slope similar to the slope of the signal voltage 230 VAC dimming in Fig. 16B, it should still be distinguishable on the basis of lower peaks. Therefore, in the embodiment, an additional comparison of the peaks (not shown) may be performed if the calculation of the slopes inconclusive.

Accordingly, when the step S1334 is determined that the maximum is the value does not exceed the second threshold value (step S1334: "No"), the process performs an algorithm for determining the tilt indicated by step S1350, to determine the slope of the corresponding leading edge of the waveform of the input voltage based on the digital values, such as that provided by analog-to-digital Converter 1022. The algorithm for determining the bending step S1350 explained with reference to Fig. 15, which is a flowchart of the operational sequence of the method, showing the process of determining the slope of the waveform of the input voltage according to a characteristic variant implementation.

Referring to Fig. 15, reference criteria chosen to determine the inclination step S1451. The reference selection criteria based on the frequency of the signal input voltage, which is previously determined, for example, in step S1320, and Fig. 14 explained above. Reference criteria associated tilt or range of slopes for each possible frequency, corresponding to the low voltage value without brightness control and the value of the intermediate voltage brightness control so that the calculated slope can be compared with each of these. For example, in Fig. 17 is a graph showing the approximate slopes, which can be based reference criteria. Tilt 1710 corresponds to the leading edge of the waveform in the voltage signal set is 230 VAC dimming, and the slope 1720 corresponds to the leading edge of the waveform in the signal line voltage 120 VAC brightness control. As explained above, a higher value of input signal voltage (slope 1710) more abruptly.

Digital values corresponding to the divided version of the rectified input mains voltage is read (for example, from analog-to-digital Converter 1022) at step S1452. In the embodiment, the waveform of the input voltage must discretionality (using read digital values) for the approximated period of time 2.5 MS, for example, because this is the minimum value of the signal, which is available when ELV-brightness subjected to brightness control to the lowest level. If sampling occurs within approximately more than 2.5 MS, the alternating current signal may not exist, since it can be cut off by the dimmer. Based on the read digital values of the leading edge of the waveform of the input voltage of the network is identified in step S1453. For example, by monitoring the digital values over a period of time the leading edge can be identified directly after identification of digital values start to increase after a sequence of decreasing or unchanged is igrovyh values.

After the leading edge of the waveform is identified, the slope of the leading edge is calculated at step S1454 using multiple digital values which represent at least part of the leading edge. For example, a predetermined number and/or discretization numerical values can be collected, or numeric values can be collected within a predetermined period of time. In the embodiment, the inclination of the leading edge is calculated by comparing each of the selected digital values corresponding to the leading edge, with the previous digital value. For example, using ten digital values representing the leading edge of the waveform, an increase of approximately 50 points (see 1710 in Fig. 17) between adjacent digital values must specify mains voltage 230 VAC, whereas an increase of approximately 25 points (see curve 1720 in Fig. 17) between adjacent digital values must specify voltage 120 VAC.

In step S1455 the calculated slope is compared with a reference criteria selected at step S1451, depending on the frequency of the signal input voltage. In the illustrated embodiment, the calculated slope is compared only with the reference criteria, corresponding to the value of the bottom of the CSOs voltage (for example, 120 VAC), for the purposes of description. However, it should be understood that in various embodiments, the implementation of the calculated slope can be compared with one or both of the reference criteria low voltage and the intermediate voltage (e.g. 230 VAC), without deviation from the scope of these ideas. When the comparison indicates that the calculated value of the slope corresponds to the low voltage value (step S1455: Yes), the counter low voltage is increased at step S1456, and when the comparison indicates that the calculated value of the slope does not comply with the low voltage value (step S1455: "No"), the counter value of the intermediate voltage increases at the stage S1457.

At step S1458 is determined that remain or no additional cycles of sampling. For example, a predetermined number of bends (e.g., 60) can be calculated for the respective sets of digital values, or calculate the tilt can be repeated and be collected over a predefined time period (e.g., 450 MS). When additional cycles of sampling remain (step S1458: Yes), the process returns to the beginning and stages S1451-S1458 again. When additional cycles of sampling does not remain (step S1458: No), the process goes to step S1459, which is determined by the signal value of the input voltage. For example, less than the least one of the counter values can be compared with a predefined threshold value to determine the point or no slope separately or together that the signal value of the input mains voltage is the value of the intermediate voltage or a low voltage value.

In the embodiment, only the count value of the intermediate voltage is compared with a predefined threshold value selected to indicate whether or not the signal value of the input mains voltage value of the intermediate voltage, although various options for implementation may compare one or both of the counter or to implement other comparable technology identification data. In the example, in which a predetermined number of the calculated slope is equal to 60, a pre-defined threshold value for the intermediate voltage can be 20, when the process determines that the signal value of the input voltage is an intermediate voltage only when the number of the calculated slopes, indicating the value of the intermediate voltage is greater than 20.

After determining the voltage on the phase S1459 in Fig. 15, the process returns to Fig. 13. Depending on the signal value of the input voltage determined is carried out as one of the value low voltage step S1360, or the value of the intermediate voltage phase S1361. At step S1370 a certain voltage value (one step S1333, S1335, S1360 or S1361) is compared with the previously stored voltage value, originally extracted from the storage device at step S1312. When a certain voltage value is identical to the previously stored voltage value (step S1370: Yes), the process ends. In this case, the control signal (e.g., displayed via the controller 1020) remains unchanged from the settings provided by the initialization process. I.e. the control signal is still based on the previously stored voltage value. When a certain voltage value is not identical to the previously stored voltage value (step S1370: "No"), the new value of the voltage signal input voltage is stored (for example, in ROM 1026) and is used to modify the control signal. In response, the PFC controller 1030, which receives the control signal from the controller 1020, alters the modulation signal power provided in solid-state lighting installation 1040 to regulate the modified voltage value.

Although several inventive embodiments described and illustrated herein, specialists in the art should easily imagine many others with whom edst and/or structures for performing the functions and/or obtaining the results and/or one or more advantages, described in this document, and each of such changes and/or modifications are considered within the scope of the inventive embodiments described herein. For example, in Fig. 13 is directed to variant is characterized by the implementation in which the input voltage is defined as one of three values according to the process of grouping the voltage value of the high voltage, the value of the intermediate voltage or a low voltage value, which can properly fit 277 VAC, 230 VAC and 120 VAC. However, various additional embodiments of can be made with the possibility to define different voltage values or ranges of values of voltage (for example, in addition to 277 VAC, 230 VAC and 120 VAC) and/or define a different number of voltage values (for example, greater than or less than three) for input voltages of the network, without deviation from the scope of these ideas.

Specialists in this field of technology should be easy to take into account that all parameters, dimensions, materials and configurations described in this document are intended to be exemplary and that actual parameters, dimensions, materials and/or configurations depend on the specific application or applications for which the use of inventive ideas. Specialists in this field, t is the transport must recognize or be able to install using no more than ordinary experimentation, many equivalents to the specific inventive embodiments, described in this document. Therefore, it is necessary to understand that the above embodiments of presented only as examples and that, within the scope of the accompanying claims and equivalents, inventive ways to implement can be implemented in a manner other than specifically described and claimed. The inventive embodiments of the present disclosure is directed to each individual feature, system, article, material, kit and/or method, described herein. In addition, any combination of two or more such features, systems, articles, materials, kits and/or methods, if such features, systems, articles, materials, kits and/or methods are not mutually inconsistent, is included within the inventive scope of the present disclosure.

It should be understood that any definitions that are defined and used in this document are controlled according to dictionary definitions, definitions in the documents incorporated by reference, and/or ordinary meaning of defined terms.

The use of the singular, when used in the detailed description and in the claims, unless expressly stated otherwise, should be understood as meaning "at least one".

The phrase "and/or", in the use of the implement in the detailed description and in the claims, should be understood as meaning "one or both" of the elements combined in such a way, i.e. elements that together are present in some cases and separately present in other cases. Several items listed with "and/or"should be treated equally, meaning "one or more of the elements combined in this way. Optional can be other elements other than the elements specifically identified by the expression "and/or", whether related or unrelated to a specifically identified items. Thus, as a non-limiting example, reference to "A and/or B", when used together with not open language, such as "contains", may indicate, in one embodiment, only A (optionally including elements other than B); in another embodiment, only B (optionally including elements other than A); in yet another embodiment, both A and B (optionally including other elements); etc

When used in the detailed description and in the claims "or" should be understood as having the same meaning as "and/or"as specified above. For example, when separating items in a list "or" or "and/or" should be interpreted as including, i.e. the inclusion of at least one, but so is e includes more than one of a certain number or list of elements, and optional extra not included in the list of items. Only the terms that are explicitly specified with the opposite meaning, such as "only one" or "just one"or, when used in the claims, "comprising", are mentioned as the inclusion of exactly one element of a number or list of elements. In General, the term "or" when used in this document should be interpreted only as an indication of exclusive alternatives (i.e. "one or the other, but not both")when it is preceded by terms of exclusivity, such as "any", "one", "only one" or "just one". "Consisting essentially of"when used in the claims, should have its usual meaning when used in the field of patent law.

When used in the detailed description and in the claims the phrase "at least one" in reference to a list of one or more elements should be understood as meaning at least one element selected from any one or more items in the item list, but not necessarily including at least one of each item specifically listed in the list of items, and excluding any combination of items in the item list. This definition also provides an opportunity that may not necessarily be the elements other than the elements, specifically identified in the list of items, which include the phrase "at least one", whether related or unrelated to a specifically identified items. Thus, as a non-limiting example, at least one of A and B (or, equivalently, "at least one of A or B," or, equivalently "at least one of A and/or B") can mean, in one embodiment, at least one, optionally including more than one, A, without the presence of B (and optionally including elements other than B); in another embodiment at least one, optionally including more than one, B, without the presence of A (and optionally including elements other than A); in yet another embodiment, at least one, optionally including more than one, A, and at least one, optionally including more than one, B (and optionally including other elements); etc

Also it should be understood that, unless expressly stated otherwise, in any of the ways stated in this document, which include more than one step or steps, the order of the steps or actions of the method is not necessarily limited to the order in which the stages or steps of the method are outlined.

Any reference numbers or other symbols, p is evidenee in parentheses in the claims, provided simply for convenience and do not intend in any way to limit the claims.

1. Device for determining the phase angle of the dimmer that is specified through the operation with dimmer for solid-state lighting load, and the device includes:
processor (215)containing digital input (218);
the first diode (D211)connected between the digital input and the source (Vcc) voltage;
the second diode (D212)connected between the digital input (218) and the earth;
the first capacitor (C213)connected between the digital input (218) and the node (N1) definitions;
the second capacitor (C214)connected between the node (N1) definitions and earth; and
- resistance (R212, R212)connected between the node definitions and node (N2) of the rectified voltage, which receives the rectified voltage from the dimmer,
- the first capacitor (C213) made with the possibility to link the AC rectified voltage at the node definition with digital input, and the processor (215) made with the possibility to discretize the digital pulses on the digital input on the basis of the rectified voltage and to identify the phase angle of the dimmer on the basis of the lengths of the discretized digital pulses.

2. The device according to claim 1, in which the first capacitor is charged through with rotisserie on the leading edge of the waveform of the rectified voltage.

3. The device according to claim 2, in which the first diode detects the voltage drop on pin one pin diode digital input is higher than the source voltage, when the first capacitor is charged by providing a digital pulse having a length corresponding to the waveform.

4. The device according to claim 3, in which the first capacitor is discharged through the second capacitor on the trailing edge of the waveform.

5. The device according to claim 4, in which the second diode detects the voltage drop on pin one pin diode digital input below ground, when the first capacitor is discharged.

6. The device according to claim 3, in which the processor further comprises a counter that increments a counter, while the first capacitor is charging.

7. The device according to claim 6, in which the processor determines the length of the digital pulse based on the value of the counter.

8. The device according to claim 1, in which the processor generates a digital control signal corresponding to the identified phase angle, and outputs the digital control signal to the power Converter that outputs a constant voltage in solid-state lighting load corresponding to the phase angle of the dimmer, based on the digital control signal.

9. The method of determining the phase angle of the dimmer specified by func and with the dimmer for light-emitting diode (LED), the method includes the steps are:
- accept a digital input signal corresponding to the rectified voltage brightness control, adopted from the dimmer through the wiring diagram AC and rectified voltage brightness control has a waveform;
- define the leading edge of the pulse of the digital input signal corresponding to the leading edge of the waveform;
- periodically discretizing pulse to determine the pulse length; and
determine the phase angle of the dimmer on the basis of the pulse length.



 

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Light diode lamp // 2248107

FIELD: engineering.

SUBSTANCE: device has block for connection to AC current source, converter for forming a DC current source and light diode group, consisting of multiple light diodes. Light diode group is provided with block for prior telling of service duration, including counter for measuring power-on period on basis of frequency of AC current source, integration device for power feeding, which is measured by counter, and for recording integrated value in energy-independent memory device and device for controlling power feeding mode for controlling light level of diodes in different modes, including normal lighting modes. Prior messaging block is meant for integration of power-on period for output of forwarding message, indicating approach of service duration end.

EFFECT: broader functional capabilities.

10 cl, 2 dwg

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