Method of increasing yield ratio when manufacturing high-density electronic modules. RU patent 2511007.

FIELD: physics.

SUBSTANCE: invention relates to microelectronics and can be used to increase yield ratio when manufacturing high-density electronic modules. When manufacturing high-density electronic modules by forming built-in passive elements, directly assembling active elements (chips) and layered formation of interconnections before manufacturing and assembling the electronic elements, a modification of the circuit is produced, which is intended only for testing thereof, and multifunctional probing of operating capacity of each element is carried out using processing procedures after forming passive elements and assembling active elements and before forming interconnections.

EFFECT: wider range of methods of lowering the cost of manufacturing high-density electronic modules, high yield ratio.

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The technical field

The invention relates to the electronics, but rather to microelectronics.

What is the yield in this case?

The output - characteristics of "quality of technological process, showing the share of fit (non-defective products manufactured in the party (or group harvesting).

The yield, as a rule, defined as the ratio of the number of suitable products to total volume of the party (the number of products on the group harvesting) and expressed in percentage. Usually this takes into account the so-called useful items from the first pass, i.e. not subject to repair and restoration, but in some cases the output from the first pass isolated as a separate feature" (http:/www.elinform.ru/dictionary_262.htm).

Actually increasing the yield means reducing the cost of electronic modules.

The technical result of the invention is expanding Arsenal of ways to reduce the cost of manufacturing high-density electronic modules.

The level of technology

Contact analogues.

One of the ways to reduce cost of manufacturing of electronic modules offered in the Russian patent 2133522 "Method of manufacturing and control of electronic components".

"The way of manufacturing and control of electronic components is that many crystals have in the press-form, focusing on the contact site crystals and basic elements of the mold, isolate all the unprotected surface of the crystals, except pads. The specificity of the method is that when placed in the mold crystals fixed among themselves with the formation of a group of media, providing location front surfaces of crystals in a single plane to one of the surfaces group of the media, while on the plane put together all of conductors required to electrochemotherapy and control, as well as the external connector of the carrier. Simultaneously with the crystals in the mold is placed in group a metal frame, frame capture simultaneously with crystals. Group media can be also formed a flexible PCB, combined with a rigid Foundation. The technical result of the invention is cheaper processes electrochemotherapy and finishing control, reduction of technological Assembly process and control of electronic components."

The other way is increasing the yield at the expense of high reliability of interconnection (Russian patent 2193259).

Also offers design testability schemes in their design.

"Designing testability schemes in their design (Design-For-Testability, DFT) is a crucial and integral part of modern design electronic circuits and printed circuit boards. The expected level testability (in per cent coverage of those or other, and preliminary testing, defects) is usually laid in the technical requirements of new developments and confirmed by computer simulation testability before

how starts the manufacture and installation of printed circuit boards, components and systems. Rules testable design <...> suggest modification of topology and/or relationships between elements in the schema, or even adding additional elements (in-circuit or external)that could not be linked with the functioning of the scheme and are intended only for ensure its testability" (http://www.jtag-test.ru/Solutions/DFT.php).

This method chosen for the prototype.

Disclosure of the invention

The yield in the manufacture of electronic modules is an important characteristic of production. In the manufacture of high-density, functionally and physically saturated electronic modules (ITEM) their performance depends on a large number of reasons. The most significant impact on increasing the yield has an efficiency of passive elements after their formation, and active elements after their installation. Traditionally applied input control the health of active elements in limited conditions, intermediate technological control of passive elements and final inspection of the functioning of the finished module together with the tests in the working range of temperatures and other conditions. As a result, the output stage control only fixed a broken ITEM caused by the inability of the previous full control of the elements in the range of working temperatures and other conditions. There is no possibility in advance, at the initial stages of manufacturing ITEM, significantly affect the yield, due to such problems.

To solve it is proposed to change the composition and sequence of operations of manufacturing ITEM so that the efficiency of active and passive elements within the working range of conditions could be controlled at the initial stage of manufacture. Then holding the other less critical operations of manufacturing ITEM insignificant impact on the yield. As a result, the yield ITEM will be determined by the control at the initial stage of manufacture.

To achieve the goal proposed in the technological route after the formation of the passive components and direct mounting of active elements to spend their sealing of insulating compound that helps protect them from external influence in the range of operating conditions. Then to form known methods (photolithography, laser treatment, metallization, planarization and others) contact pin and before the next layer-by-layer formation interconnects known ways to spend full probe control performance of each item in the desktop range of temperatures and other external conditions.

To be able to carry out consecutively the following process steps, illustrated in figure 1-7:

1. Insignificant operations.

2. Preparing the substrate surface.

3. The formation ustroennyj thin film elements of R, C, L, microstrip elements, etc. In figure 1 as an example, shown resistance 1 and condenser 2 with dielectric 3 substrate 4.

4. Performing direct mount crystals integrated circuits (chips) of different types (microwave monolithic integrated circuits, VLSI, microelectromechanical systems, systems on crystal, power Assembly, single semiconductor elements, sensors, passive elements in the "chip"is performed, and others). In figure 2 it is depicted in figure 1 added chip 5.

5. Fill formed on the substrate of a set of elements with a layer of insulating polymer above the level of the highest item on the value of linefill, for example known photopolymer SU-8 in 5-50 microns above the level of the surface of crystals (polymer 6 figure 3).

6. The autopsy areas of contacts to be drenched elements, such as photolithography (contact area 7 figure 4).

7. Filling metallization opened Windows in polymer layer, for example, by vacuum deposition and galvanic rearing of copper layer on the depth of the opened Windows (metallization 8 figure 5).

8. Planarization (for example, flat grinding and chemical-mechanical polishing) of the surface layer formed to complete separation of all contacts (Fig.6).

9. Surface cleaning contacts to ensure their minimum ohmic resistance and electric probes in subsequent operations (6).

10. Execute full control of all elements by putting the substrate on specialized termostali holder, serial attach probes to the contacts of the elements and the required measurements (7 shows tester 9, the capacity gauge 10 and functional tester 11).

11. The direction of technological modules that have successfully passed the inspection, for subsequent technological operations and removal from the route have not passed the inspection.

12. Insignificant operations.

Brief description of drawings

Figure 1 illustrates the formation of a built-in thin film elements.

Figure 2 illustrates how to perform the direct mounting of crystals of integrated circuits (chips) of various types.

Figure 3 illustrates the fill formed on the substrate of a set of elements with a layer of insulating polymer.

Figure 4 illustrates the autopsy areas of contacts to be drenched to the elements.

Figure 5 illustrates the filling metallization opened Windows in the polymer layer.

6 illustrates planarization surface layer formed to complete separation of all contacts and clearing of a surface of contact.

Fig.7 shows how to execute full control of all elements.

The implementation of the invention

At the enterprise within 2 years spend probe control of test samples in accordance with the described method for installing Sammit 12000 company Agilent Technologies (USA). It allowed to increase the number of suitable products after the formation of multilayer fabric switch wiring on average by 27% due to timely rejection of semi-finished products at the initial stage of manufacture.

The way to increase the yield in the manufacture of high-density electronic modules on the basis of the formation of embedded passives, direct mounting of active elements (chips) and layering of interconnection, which consists in the fact that even before the production and Assembly of electronic modules and develop a modification of the scheme, which is intended only for its testability, characterized by the fact that, owing to technological operations after the formation of the passive and installation of active elements and before the formation of interconnection to hold the multifunction probe control the health of each element.