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Data storage device (versions). RU patent 2506633.

Data storage device (versions). RU patent 2506633.
IPC classes for russian patent Data storage device (versions). RU patent 2506633. (RU 2506633):

G11C16/22 - Safety or protection circuits preventing unauthorised or accidental access to memory cells
G06F21/60 - ELECTRIC DIGITAL DATA PROCESSING (computers in which a part of the computation is effected hydraulically or pneumatically G06D, optically G06E; computer systems based on specific computational models G06N; impedance networks using digital techniques H03H)
G06F12/14 - Protection against unauthorised use of memory
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FIELD: physics, computer engineering.

SUBSTANCE: invention relates to computer engineering, particularly to means of protecting information from unauthorised access. The data storage device has a control unit, the first group of inputs/outputs of which is connected to the group of inputs/outputs of a memory unit, the device further including a commutation unit for switch circuits and a unit for protecting switch circuits, the group of inputs of which is the group of inputs of the data storage device, and the group of outputs is connected to the group of inputs of the commutation unit for switch circuits, the first group of inputs/outputs of which is the group of inputs/outputs of the data storage device, and the second group of inputs/outputs is connected to the second group of inputs/outputs of the control unit.

EFFECT: high reliability of the data storage device and providing high security of information storage.

5 cl, 5 dwg

 

The invention relates to the computer engineering, in particular to the means of protection from unauthorized access to information.

Known data storage device (see the patent JP №6085158, IPC:G06F 12/14 Chip-card from unauthorized access protection system», Hiroshi Watanabe, .26.10.1994)containing a control unit, which includes schema compare the input code with the established code, counter discrepancies when comparing the input and set by the code, the scheme of the signal conditioning block and a scheme of blocking the information area, and memory consisting of several information fields. For access to information of each field is used one or more of the installed codes. Access to the contents of the device is possible only when you enter from the outside code and its coincidence with a predetermined code. Timing and power supply control unit is accessed externally. The specified device is taken as the closest analogue of the claimed invention.

The disadvantages of the closest analogue is the lack of protection, which leads to the possibility of a hazardous exposure (for example, static electricity) information control unit and memory, in addition, there is the possibility of the direct selection code data on information and communication lines and analysis of the responses of the device with the purpose of choosing the optimal algorithm of selection.

The technical result, the achievement of which aimed claimed invention consists in increasing the reliability of data storage devices, as well as ensuring greater safety information storage.

To obtain a technical result of the first option in the storage device that contains the control unit, the first group of input-output of which is connected with a group of inputs-outputs a block of memory, what is new is the additionally introduced interswitch key chains and protection unit key chains, input group which is a group of inputs storage devices data, and the group outputs connected with a group of inputs commutation key chains, the first group of input-output of which is a group of input-output data storage devices, and the second group of the inputs / outputs connected with the second group of inputs-outputs the control unit.

The mentioned set of essential features to improve the reliability of data storage devices by eliminating the possibility of a dangerous outer influence (for example, static electricity) for informational inputs, control units and memory to their damage or destruction, and improve the safety of data storage by eliminating the possibility of direct selection set by the code on information and communication lines and analysis of the responses of the device with the purpose of choosing the optimal algorithm.

Association control units and memory in the microprocessor module, as well as unification of blocks switching key chains and protection key chains in intelligent power protection key chains allows to reduce the number of used blocks, which also increases the reliability of the device.

To obtain a technical result for the second variant in the storage device that contains the control unit, the first group of input-output of which is connected with a group of inputs-outputs a block of memory, what is new is the additionally introduced interswitch key chains, persistent storage device, electrically erasable storage device, the device for forming analog component, device selection analog component and device selection digital component, the first groups of input-output devices selection of analog and digital components are combined and is a group of input-output data storage devices, and the second group of inputs-outputs are connected respectively with the first and second groups of inputs-outputs commutation key chains, the third group of input-output of which is connected with the second group of inputs-outputs the control unit, group output of which is connected with the group of the device inputs formation analog component, group of the output of which is connected with a group of inputs commutation key chains, third and fourth groups of inputs-outputs the control unit are connected respectively with groups of inputs-outputs permanent storage and electrically erasable flash storage device.

The mentioned set of essential features of the second option allows to enhance reliability and ensure higher security of the information storage devices by eliminating the possibility of impact on the elements of power and control the connection information circuits, as well as by eliminating the possibility of obtaining information on the status of the device and the parameters enable it using the code sequences in a specific format. The scheme of division of the information, including a block of memory, persistent storage device and electrically erasable storage device that improves the reliability of the data storage device.

Figure 1, figure 2, figure 3 and figure 4 shows the structural scheme of the storage device for the first option.

Figure 5 shows the block diagram of realization of the storage device on the second version.

Storage device (figure 1) contains the block 1 protection key chains (Б), block 2 switching key chains (Б), block 3 management (BM) and unit 4 memory (PSU).

The first group of inputs-outputs BU 3 is connected with a group of inputs-outputs 4 BP. Input group Б 1 is a group of inputs storage device. The group outputs Б 1 is connected with a group of inputs Б2. The first group of inputs-outputs Б 2 is a group of input-output data storage devices, and the second group of the inputs / outputs connected with the second group of inputs-outputs BU 3. Input group and the group of inputs-outputs storage device connected respectively to the group of outputs and group o external connector 5.

Storage device (figure 2) contains the block 1 protection key chains, block 2 switching key chains, microprocessor module 6.

Input group Б 1 is a group of inputs storage device. The group outputs Б 1 is connected with a group of inputs Б 2. The first group of inputs-outputs Б 2 is a group of input-output data storage devices, and the second group of the inputs / outputs connected with a group of inputs-outputs of the microprocessor module 6. Input group and the group of inputs-outputs storage device connected respectively to the group of outputs and group o external connector 5.

Storage device (figure 3) contains an intelligent unit 7 protection key chains (Б), control unit 3 and unit 4 of memory.

The first group of inputs-outputs BU 3 is connected with a group of inputs-outputs 4 BP. Input group and the first group of inputs-outputs Б 7 are groups of inputs and input-output data storage devices, respectively. The second group of inputs-outputs Б 7 is connected with the second group of inputs-outputs BU 3. Input group and the group of inputs-outputs storage device connected respectively to the group of outputs and group o external connector 5.

Storage device (figure 4) contains an intelligent unit 7 protection key chains (Б) and microprocessor module 6.

Input group and the first group of inputs-outputs Б 7 are groups of inputs and input-output data storage devices, respectively. The second group of inputs-outputs Б 7 is connected with a group of inputs-outputs of the microprocessor module 6. Input group and the group of inputs-outputs storage device connected respectively to the group of outputs and group o external connector 5.

Storage device (figure 5) contains Б 2, BU 3, 4 BP, read only memory (ROM) 8, electrically erasable storage device (EEPROM) 9, forming device analogue component (UFAS) 10, the device selection analog component (UVAS) 11 and device selection digital component (head of aecr) 12.

The first group of inputs-outputs UVAS 11 and head of aecr 12 merged and are a group of the inputs / outputs of the storage device, and the second group of inputs-outputs are connected respectively with the first and second groups of inputs-outputs Б 2. The third group of inputs-outputs Б 2 is connected with the second group of inputs-outputs BU 3. The group outputs BU 3 is connected with a group of inputs UV AU 10, a group of output of which is connected with a group of inputs Б 2. The third and fourth groups of inputs-outputs BU 3 connected respectively with groups of inputs-outputs ROM 8 EEPROM 9. A group of inputs-outputs of the storage device connected to a group of I / o external connector 5.

Б 1 is a combinational logical scheme, the relationship between the input and output variables which is set using Boolean functions, and performs selective connection switching circuits. Output variables are uniquely determined by the values of the input variables. For their technical realization can use logical elements that implement Boolean functions, such as multiplexers, , Raman shifter, Comparators, adders, functional digital converters.

Б 2 consists of compact relay with switching capacity and low power consumption series NG6D. Chip series 1554 the logic of «AND NOT» can be used as an element of comparison, at the entrance Б 1.

To implement the above options storage device as BOO 3 you can apply microcontroller 1886 of national development, as bas 4 - chip EEPROM (electrically persistent storage device) 5582, as the microprocessor module 6 - chip 1986 9.

Б 7 is a machine to perform logical operations with the ability to memorize certain state variables. Output variables depend not only on the input variables, but also on the current status of the device. The values will be saved through triggers on the duration of the measure. New state of the automaton is defined, on the one hand, the previous state and, on the other hand, the values of the input variables. For their technical realization of the following elements can be: counters, shift registers, pseudorandom sequences, asynchronous and synchronous signal handlers.

ROM 8 may be executed on chip type 16232.

EEPROM 9 may be executed on chip type 5584.

FAS 10 may be made under the scheme (.. «Circuitry of analog and analog-to-digital electronic devices» - M, Publishing house «-XXI», 2005, .412-413, .8.32).

UVAS 11 can be made under the scheme (.. «Circuitry of analog and analog-to-digital electronic devices» - M, Publishing house «-XXI», 2005, .412-413, .8.33, 8.34).

The head of aecr 12 may be made under the scheme (GI Volovich «Circuitry of analog and analog-to-digital electronic devices» - M, Publishing house «-XXI», 2005, .411-412, .8.30).

Scheme of interaction of blocks UV AU 10, UVAS 11 and head of aecr 12 can be implemented according to the scheme (.. «Computer control of the technological process, experiment, equipment» - M: Hot line - Telecom, 2009, p.74).

The principle of operation of the device does not affect implementation option.

Storage device works as follows.

The work is based on the set of software and hardware microprocessor system.

For storage devices, shown in figures 1-4, with a power source (figures not shown) come voltage required for functioning of devices, including digital and analog integrated circuits devices.

In the storage (figure 1 and figure 2) with a group of outputs external connector 5 on Б 1 enters control information. In Б 1 external control signal produces a random connection switching circuits Б 2. With group o external connector 5 through the block Б 2 in block BU 3 or microprocessor module 6 (depending on the implementation) receive information that is being transformed by the algorithm in the PSU 4 or microprocessor module 6, and stored.

In the storage (figure 3 and figure 4) with the group outputs external connector 5 at the entrance Б 7 receives control information, passing through the system of selection of switching circuits, representing the machine to perform logical operations with the ability to memorize individual States variables, commutes selected key chains. With group o external connector 5 through Б 7 rig 3 or microprocessor module 6 (depending on the implementation), information is sent exposed to transform the algorithm BP 4 or microprocessor module 6, and stored.

In the storage device (figure 5) from the external connector on 5 UVAS 11 and head of aecr 12 comes mixed analog-digital signal that carries information that control the switching key chains in Б 2, and data are subject to transformation into a BOO 3, according to the key information contained in the EEPROM 9, algorithm contained in ROM 8, and further storage in the PSU 4. Selection of analog and digital components of the signal occurs due to the strong difference of frequency bands. The response team is formed similarly with the use of UV AC 10.

Thus, options to build storage devices provide increased reliability from the influence of external factors by using the properties of the components included in the device.

1. Storage device containing the control unit, the first group of input-output of which is connected with a group of I / o memory block, wherein the additionally introduced interswitch key chains and protection unit key chains, input group which is a group of inputs storage device, and a group of outputs connected with a group of inputs commutation key chains, the first group of input-output of which is a group of input-output data storage devices, and the second group of the inputs / outputs connected with the second group of inputs-outputs the control unit.

2. Storage device according to claim 1, characterized in that the control units and memory merged with a microprocessor module, a group of input-output of which is the second group of inputs-outputs the control unit.

3. Storage device according to claim 1, wherein the power switching key chains and protection unit key chains merged into intelligent power protection key chains, input group which is a group of inputs storage device, and the first group of input-output is a group of input-output data storage devices, a second group of inputs-outputs intellectual protection unit key chains is the second group of inputs-outputs of the commutation key chains.

4. Storage device according to claim 1, characterized in that the control units and memory merged with a microprocessor module and switching units key chains and protection unit key chains merged into intelligent power protection key chains, input group which is a group of inputs storage device, and the first group of input-output is a group of input-output data storage devices accordingly, the second group of inputs-outputs intellectual protection unit key chains is the second group of inputs-outputs of the commutation key chains, group of inputs-outputs of the microprocessor module is the second group of the inputs / outputs of the control unit.

5. Storage device containing the control unit, the first group of input-output of which is connected with a group of I / o memory block, wherein the additionally introduced interswitch key chains, permanent storage, electrically erasable storage device, the device for forming analog component, device selection analog component and device selection digital component, the first groups of inputs-outputs device selection of analog and digital components are combined and is a group of input-output data storage devices, and the second group of inputs-outputs are connected respectively with the first and second groups of inputs-outputs commutation key chains, the third group of input-output of which is connected with the second group of inputs-outputs the control unit, the group output of which is connected with the group of the device inputs formation analog component, group of the output of which is connected with a group of inputs commutation key chains, third and fourth groups of inputs-outputs control unit connected respectively with groups of inputs-outputs permanent storage and electrically erasable flash storage device.

 

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