Alternating voltage regulator

FIELD: electricity.

SUBSTANCE: into alternating voltage regulator containing control element of step-by-step action actuated between inputs and outputs, and also counter, sync pulse former connected by input to input outputs and by output to counter inverting input, and comparing unit which first input is connected to output of duration codes converter and the second input is connected to counter output, there included are two units "log. AND" and unit "log. OR", RS-trigger, which setting input is connected to comparing unit output, and reset input is connected to high-order bit with counter output, direct and inverse outputs of trigger are connected to inputs of units "log. AND", converter of reference level codes to which input control code is sent and which output is connected to input of unit "log. AND", converter of final level codes to which input control code is sent and which output is connected to input of unit "log. AND", converter of duration codes to which input control code is connected.

EFFECT: improving accuracy of root-mean-square voltage control.

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The invention relates to the field of electrical engineering and may find application in systems for precise control of process parameters, in particular temperature controls.

Known regulator AC voltage containing the regulatory authority of discrete steps, included between the input and output pins, analog-to-digital Converter, connected by input leads for connection of the control signal, the driver of pulses input connected to the input pins and output to the counting input of the counter, the source signals "log.0", the adder, a first input connected with the older bits of the analog-to-digital Converter, and the output - control inputs of the regulatory authority of discrete steps, and the comparator, the first input connected to the output of the least significant bits analog-to-digital Converter, the second input - the output of the counter, and the output from the younger discharge the second input of the adder, the most significant bit of which is connected to the source output signals of the log. 0" [A.S. 1325431 SU, G05F 1/20].

The disadvantage of this controller is the unevenness of the control characteristic, expressed in deviation increment load power from the calculated values of the regulation, which is caused by deviations of the parameters regulating windings and keys from nomi the actual values.

Closer to the technical nature of the proposed technical solution is the regulator AC voltage containing the regulatory authority of discrete steps, included between the input and output pins, analog-to-digital Converter, connected by input leads for connection of the control signal, and the counter, the shaper of pulses input connected to the input pins and output to the counting input of the counter, the source signals ' log. 0", the adder, a first input connected with the older bits of the analog-to-digital Converter, and the output - control inputs of the regulatory authority of discrete steps, and the comparator, the first input connected to the output of the least significant bits analog-to-digital Converter, a second input with the output of the counter, and the output from the younger discharge the second input of the adder, the most significant bit of which is connected to the source output signals of the log. 0", the code Converter, an input connected to the outputs of the high-order bits of analog-to-digital Converter, and the output from the installation of the entrance counter [A.S. 2386993 C1, G05F 1/00].

The disadvantage of this voltage regulator is that as the regulatory body of the discrete steps is a transformer in which the secondary winding is partitioned in such a way that the number is Idov in different sections were treated as integers of degree two, that requires the manufacture of special transformers. The imperfection of this controller is that to adjust the power level corresponding to the input code can only additive energy.

The technical result of the invention is to improve the accuracy of controlling the effective value of the voltage.

The technical result is achieved by the fact that in the known regulator AC voltage containing the regulatory authority of discrete steps, included between the input and output pins and the counter, the shaper of pulses input connected to the input and output to the counting input of the counter, and the comparator, the first input connected to the output of the code Converter of length, the second input with the output of the counter, put two block log. And" and the block log. OR, RS-trigger setting input connected to the output of the comparator and a reset input from the senior discharge from the output of the counter direct and inverted outputs of the trigger is connected to the inputs of block log. And, the code Converter of the initial level, the input of which receives the control code and the output connected to the input of the block log. And, the code Converter ultimate level, the input of which receives the control code and the output connected to the input of the block log. And, the code Converter a long time is t, to the input of which is connected to the control code.

Scheme of the proposed controller AC voltage is depicted in figure 1. It contains discrete-adjustable transformer 1, the clock shaper 2, the inputs of which are connected to the leads for connection to the network, and the output connected to the counting input of the counter 3. The output of the counter 3 is connected youngest bits to the first input of the comparator 7. To the second input of the comparator 7 is connected to the Converter output codes of length 9. The output of the comparator 7 is connected to the input of an RS flip-flop 8. The high order bit output of the counter 3 is connected to the reset input of the counter 3 and the reset input of RS flip-flop 8. The control code is supplied to the inputs of the Converter codes of length 9, of the code Converter of the initial level 10 and the code Converter ultimate level 11. To the first input of the block log. And 5 connected to the inverse output of the RS flip-flop 8, and a second input connected to the output of the code Converter of the initial level 10. At first log block log. And 6 are connected to the direct output of the RS flip-flop 8, and a second input connected to the output of the code Converter ultimate level I. the Outputs of blocks "log. And 5 and 6 are connected to the inputs of the block log. OR 4. Bit line from the output of the block log. OR 4 connected to the corresponding electronic key sections of discrete-regulated transformer 1.

Formirovanie the clock 2 is performed on the chip IS, the counter 3, the blocks of the log. And 5 and 6, the block log. OR 4, RS-trigger 8, the code Converter of length 9, the code Converter of the initial level 10, the code Converter ultimate level 11, the comparator 7 are implemented on the chip microcontroller AT90S1200.

Figure 2 shows the timing diagram explaining the operation principle of the proposed regulator AC voltage.

The proposed regulator AC voltage is as follows. Each category code Y=[y₁...y_n]coming from the output of the logical unit OR attached to the electronic key, which connects the corresponding section of the transformer to the load. In the initial state, the content of the counter is equal to zero, and the direct and inverse outputs of the RS-flip-flop, respectively, a value of logical zero and one, resulting in the input discrete-regulated transformer supplied code Y_N=[y_N1...y_Nn], noise unit logical "And" 5. The clock shaper 2 forms of voltage short pulses corresponding to the beginning of each half period of the mains voltage. With the beginning of the half-cycle pulse from the output of the shaper clock 2 is supplied to the counting input of the counter 3, which leads to incremental content of the counter 3. Code S=[s₁...s_q] from the output of the counter 3 pic who shall serve on one of the inputs of the comparator 7, compare it with the code G=[g₁...g_q]supplied to the second comparator input of inverter codes of length 9. In case of equality codes S and G, the comparator outputs a signal on the installation input RS-trigger. In this case, the direct and inverse outputs of the RS-flip-flop, respectively, will be a logical one and a logical zero. The block log. And" 6 skips code Y_K=[y_K1...y_Kn] input discrete-regulated transformer. The result will be connected to load another section of the transformer. Once on the highest bit of the counter appears logical unit reset the counter contents and the status of the RS-flip-flop. Starts a new cycle regulation. Next, the operation of the device is repeated.

The time τ switching between sections is determined by the code G=[g₁...g_q] inverter output 9 codes:

where- the number corresponding to the binary code G, and T is the period of the mains voltage.

The sequence of power levels P₁,R₂,..., P_i, .. R_ncorresponds to the coefficients of transformation of discrete-regulated transformer. A levels, you can deliver the perfect power levels P₁^',R₂^',..., P_i^',R_n^'provided the non uniform increment of power.

The duration of the control cycle will be determined by the width q of the code's coming from the output of the counter 3

where- the number corresponding to the i-th state of the counter.

Per cycle regulation in the load will be transferred energy

where- the total level of capacity of the sections at the primary level,- the total level of capacity of the sections at the leaf level.

The average power per cycle regulation is determined by the expression:

To compensate for the deviation of the power levels of the average power per cycle regulation is equal to the ideal level.

With the technical performance of the regulator is the value of d is determined by the specific implementation of the counter 3, i.e. its capacity. The bit codes Y_Nand Y_Kequal to the number of partitions of discrete-regulated transformer.

Programming converters codes starting and ending levels and Converter code duration is as follows. Each input code corresponds to the ideal power level, providing uniform increment. As the initial level is chosen closest to the ideal m is nlsi the actual power level, which corresponds to a specific partition number. Section number-encodes the number of discharge code Y_Nthat will be a single value. Then as the final level is chosen closest to an ideal greater actual power level, which corresponds to a specific partition number. Section number-encodes the number of discharge code Y_Kthat will be a single value. Based on the obtained codes Y_Nand Y_Kthe value of d determined by the bit counter, and the actual power levels, using the expression for the average power value for the period of regulation, the calculated value of g, which is the time of switching between the start and end level. This calculation is repeated for each input code.

In the proposed controller AC voltage can be used any transformer with a partitioned winding in contrast to the known device, where the winding of the transformer is partitioned in such a way that the number of turns in the various sections were treated as integers of degree two. Entered the code Converter of the character allows you to adjust the power level in the direction of decreasing that if the condition of uniformity adjustment preserves the original characteristics of the control range.

Regulator p the belt tension, containing discrete-adjustable transformer, counter, clock shaper, the output of which is connected to the counting input of the counter, a comparator, a first input connected to the output of the code Converter of length, and the second with the output of the counter, characterized in that it introduced the code Converter of the initial level, the code Converter ultimate level and the code Converter duration, to the inputs of which are connected a control code, and RS-trigger setting input connected to the output of the comparator and a reset input from senior digit counter, the first and second blocks of the log. And, the input of which is connected to the inverse and the direct outputs of the RS flip-flop and the second to the outputs of the code Converter of the initial level and the code Converter ultimate level, and the block log. OR, the input of which is connected to the outputs of blocks "log. And, and output lines connected to respective electronic key sections of discrete-regulated transformer.