Method for filed transistor manufacturing
SUBSTANCE: field transistor manufacturing method includes creation of source and drain contacts, active area identification, application of a dielectric film onto the contact layer surface, formation of a submicron chink in the dielectric film for the needs of subsequent operations of contact layer etching and application of gate metal through the resistance mask; immediately after the dielectric film application one performs lithography for opening windows in the dielectric at least one edge whereof coincides with the Schottky gates location in the transistor being manufactured; after the window opening a second dielectric layer is applied onto the whole of the surface with the resistance removed; then, by way of repeated lithography, windows in the resistance are created, surrounding the chinks formed between the two dielectrics; selective etching of the contact layer is performed with metal films sprayed on to form the gates.
EFFECT: simplification of formation of under-gate chinks sized below 100 nm in the dielectric.
The invention relates to electronic devices, and is intended to create a discrete devices or microwave integrated circuit for field-effect transistors.
There are ways to create a heterostructure field effect transistors (pseudomorphs or metamorphic) include the following set of processes: the formation of the ohmic contacts of sinks and sources on the surface of the contact layer, the allocation of the active region by etching or ion implantation, conducting electronic lithography layered mask resists for forming the gate Schottky T-shaped etching of gate slots in the contact layer, the deposition of metal films to create closures, removal of resists .
The disadvantage of this method is that upon receipt of the gates of the T-shaped with the length of the narrow part of the bolt smaller than 100 nm can be a separation of the gate from the semiconductor surface during the operation of removal of resists coated with the metal films.
Known methods, which addressed this shortcoming. So the known method  create transistors with long shutter 40 nm, with a T-shape. In a specified way at first make the selection transistor by chemical etching through a mask of the resist, and then allocated by etching the region the ti on the surface of the contact layer to form ohmic contacts of sinks and sources, then put the first layer of dielectric. With the help of electronic lithography and subsequent reactive-ion etching the dielectric layer to form gate gap of submicron size. To reduce the gate slit put the second dielectric layer, and spend another process is reactive ion etching. Conduct electronic lithography for forming the gate, through the crack in the insulator is etched groove in the contact layer, sprayed metal, and removing the resist. After deposition, the metal shutter is partially surrounded by a dielectric, which prevents its separation from the semiconductor during removal of the resist.
The closest analogue (prototype) is a method of manufacturing a heterostructure field-effect transistor, considered in .
In a known way to produce the selection transistor by chemical etching through a mask of the resist, and then allocated by the etching area on the surface of the contact layer to form ohmic contacts of sinks and sources, and then put the first layer of dielectric. With the help of electronic lithography and subsequent reactive-ion etching (RIT) in the dielectric layer form a gate gap submicron sizes of trapezoidal form, which must be applied only in special mode dry etching IER is ektrica. Conduct electronic lithography, through the crack in the insulator is etched groove in the contact layer, sprayed metal, and removing the resist.
The disadvantage of this method is the difficulty of obtaining slit size smaller 100 nm using reactive-ion etching dielectric after the electronic lithography.
The aim of the invention is to eliminate this drawback. The goal is due to the fact that in the known method introduce new operations and eliminates the process of reactive ion etching the first dielectric layer. The technical result is achieved by the fact that in the known method, including creating contacts the drain and the source on the contact layer of the semiconductor structure (heterostructures), highlighting the active area by etching or ion implantation), application of a film of a dielectric on the surface of the contact layer, the formation of submicron cracks in the dielectric film for the subsequent etching of the contact layer and deposition of the metal gate through a mask of the resist, after application of the first dielectric film are lithography for opening Windows in the dielectric, in which at least one of the edges coincides with the location of the Schottky gates in visitors transistor, and after opening the Windows on the entire surface is applied a second dielectric film, removing the resi is t and lithographs created by the Windows in the resist, surrounding the slit formed between the two dielectrics, carry out selective etching of the contact layer, and then sprayed film of the metals for forming the gates.
The choice of the layer thicknesses of the dielectric and the time of etching the first dielectric film, you can get the size of a gap between the first and second films of dielectrics less than 100 nm.
1 schematically shows the key moments of one of the possible variants of the proposed method of fabrication of the transistor.
In figure 1,and shows a heterostructure containing politology substrate 1 on which the grown semiconductor layers 2, necessary for the creation of the transistor, and a contact layer 3 of high-alloyed semiconductor.
In figure 1,b shows the structure after the selection transistor by etching, creating ohmic contacts of the source 4 and drain 5 and the deposition of the first dielectric layer 6.
Figure 1,shows the structure after etching Windows 7 in the first dielectric layer 6 through a mask of the resist 8.
In figure 1,g shows the structure after deposition of the second dielectric layer 9 and the removal of the resist 8.
Figure 1 d shows the structure after carrying out lithography for formation of the gate, here 10 resist.
Figure 1 e shows the structure after the selective etching of the contact layer 3, the deposition of the metal shutter 11 and removal of the resist.
Example. And sotavlyali field pseudomorphs transistor with high electron mobility (MEMT) based heterostructure AlGaAs/InGaAs. Epitaxial layers 2 and 3 were grown by molecular beam epitaxy on politology substrate of gallium arsenide 1. Contact alloyed layer 3 of gallium arsenide was grown on top of layer 2, forming the heterojunction AlGaAs/InGaAs. First conducted the selection transistor by chemical etching after an appropriate photolithography. Using standard optical lithography methods, processes, vacuum deposition and annealing was created ohmic contacts of the source 4 and drain 5 on the surface of the contact layer 3. Then the whole structure was applied film of the first dielectric layer 6 of a thickness of 0.15 μm. As a layer 6 was applied a layer of silicon dioxide (SiO2). Then there was the lithography and chemical etching has formed a window 7 in the first dielectric layer. While etching layer 6 was equal to t=1.1 h/v. Where h is the layer thickness of the first dielectric, v is the speed of etching of the dielectric. And one of the edges of the Windows 7 corresponded to the location of Schottky they are manufactured in the transistor. Without removing the resist, magnetron sputtering of silicon in the mixture of argon and oxygen was applied a second layer of SiO29 of a thickness of 0.15 μm. After removal of the resist, one part of the surface of the structure was closed layer of the first dielectric 6 and the second layer of the second dielectric 9. Between these dielectrics produces the uh slit trapezoidal shape with a minimum window size of 90 nm. Then there was the lithography for forming a gate and through a mask of the resist, in the gap between the insulators 6 and 9 is selectively etched contact layer, deposited a metal shutter 11 and removing the resist 10. Next we opened the window in the insulator 6 for galvanic increase of gold on the contacts.
Thus was achieved the goal, and the result was obtained RNENT transistor with the length of the shutter is equal to 90 nm without the use of special modes reactive ion etching through the dielectric window of the resist less than 100 nm.
Sources of information
1. Kang-Sung Lee, Young-Su Kim, Yun-Ki Hong and Yoon-Ha Jeong. IEEE ELECTRON DEVICE LETTERS, VOL.28, NO.8, AUGUST 2007, P.672-675. 35-nm Zigzag T-Gate. In0,52Al0·48As/In0·53Ga0·47As Metamorphic GaAs HEMTs With an Ultrahigh fmaxof 520 GHz.
2. Dae-Hyun Kim, Suk-Jin Kim, Young-Ho Kim, Sung-Wong Kim and Kwang-Seok Seo. 40 nm InGaAs HEMT's with 65% Strained Channel Fabricated with Damage-Free SiO2/SiNx Side-wall GateProcess // JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.3, NO.1, MARCH, 2003, P.27-32.
3. Neatorama Westenskow, VA..kraśnik Wpinegar. Patent 2390875 EN, the METHOD of MANUFACTURING of microwave TRANSISTOR WITH a control ELECTRODE of the T-SHAPED CONFIGURATION SUBMICRON LENGTH.
A method of manufacturing a field-effect transistor, which includes the creation of drain contacts and the source on the contact layer of the semiconductor structure (heterostructures), highlighting the active area by etching or ion implantation), the deposition of the dielectric film on arnosti contact layer, the formation of submicron cracks in the dielectric film for the subsequent etching of the contact layer and deposition of the metal gate through a mask of the resist, characterized in that after deposition of a dielectric film are lithography for opening in the dielectric window, in which at least one of the edges coincides with the location of the Schottky gates in visitors transistor, and after opening these Windows on the entire surface put the second dielectric layer, removing the resist and lithographs created by the Windows in the resist surrounding the slit formed between the two dielectrics, carry out selective etching of the contact layer, and then sprayed film of the metals for forming gates.
SUBSTANCE: manufacturing method of microwave transistor with control electrode of T-shaped configuration of submicron length involves formation on the front side of semi-insulating semi-conductor plate with active layer of the specified structure of a pair of electrodes of transistor, which form ohmic contacts by means of lithographic, etching method and method of sputtering of metal or system of metals, formation of transistor channel by means of electronic lithography and etching, application of masking dielectric layer, formation in masking dielectric layer of submicron slot by means of electronic lithography and etching; at that, submicron slot is formed with variable cross section decreasing as to height from wide upper part adjacent to the head of the above control electrode to narrow lower part adjacent to transistor channel, formation of topology of the above control electrode by means of electronic lithography method, formation of the above control electrode in submicron slot by means of sputtering of metal or system of metals; at that, configuration of its base repeats configuration of submicron slot. During formation of submicron slot with variable cross section in masking dielectric layer, which decreases throughout its height, by means of electronic lithography and etching, the latter of masking dielectric layer is performed in one common production process in high-frequency plasma of hexafluoride of sulphur, oxygen and helium and discharge power of 8-10 W.
EFFECT: increasing output power and amplification factor, increasing reproducibility of the above output parametres and therefore yield ratio, simplifying and decreasing labour input for manufacturing process.
2 cl, 1 dwg, 1 tbl, 5 ex
FIELD: electronic engineering; high-power microwave transistors and small-scale integrated circuits built around them.
SUBSTANCE: proposed method for producing high-power microwave transistors includes formation of transistor-layout semiconductor wafer on face side, evaporation of metals, application and etching of insulators, electrolytic deposition of gold, formation of grooves on wafer face side beyond transistor layout for specifying transistor chip dimensions, thinning of semiconductor wafer, formation of grooves on wafer underside just under those on face side, formation of through holes for grounding transistor leads, formation of integrated heat sinks for transistor chips around integrated heat sink followed by dividing semiconductor wafer into transistor chips by chemical etching using integrated heat sinks of transistor chips as mask.
EFFECT: enhanced power output due to reduced thermal resistance, enhanced yield, and facilitated manufacture.
2 cl, 1 dwg, 1 tbl
FIELD: technologies for making transistors.
SUBSTANCE: method includes following stages: precipitation of electric-conductive material on substrate of semiconductor material, forming of shape of first parallel band electrodes with step, determined by appropriate construction rules, while areas of substrate in form of stripes between first electrodes are left open, precipitation of barrier layer, covering first electrodes down to substrate, alloying of substrate in open areas, precipitation of electric-conductive material above alloyed areas of substrate with forming of second parallel band electrodes, removal of barrier layer, near which vertical channels are left, passing downwards to non-alloyed areas of substrate between first and second electrodes, alloying of substrate in open areas of lower portion of channels, filling channels with barrier material, removal of first electrodes, during which gaps between second electrodes are left and substrate areas are opened between them, alloying of open areas of substrate in gaps, from which first electrodes were removed, removal of electric-conductive material in said gaps for restoration of first electrodes and thus making an electrode layer, containing first and second parallel band electrodes of practically even width, which are adjacent to alloyed substrate and separated from each other only by thin layer of barrier material, while, dependent on alloying admixtures, used during alloying stages, first electrodes form source or discharge electrodes, and second electrodes - respectively discharge or source electrodes of transistor structures, precipitation of insulating barrier layer above electrodes and separating barrier layers. Precipitation of electric-conductive material above barrier layer and forming in said electric-conductive material of shape of parallel band valve electrodes, directed transversely to source and discharge electrodes, thus receiving structures matrix for field transistors with very short channel length and arbitrarily large width of channel, determined by width of valve electrode.
EFFECT: ultra-short channel length of produced transistors.
11 cl, 17 dwg
SUBSTANCE: method includes placement of a substrate in a vacuum chamber, ion etching of a substrate and deposition of a material onto a substrate by PVD method in a medium of working gas. For deposition at least two electric arc plasma sources are used with flow separation, besides, at least one of them is equipped with a cathode of refractory metal. At the same time a pulse gas discharge is generated in a vacuum chamber, and during material deposition the substrate is moved between plasma sources, and the working gas contains a mixture of chemically active and inert gases. The device for method realisation comprises a vacuum chamber with a vertical axis, a plasma PVD source, an electrically conducting substrate holder fixed on a displacement mechanism, a high-voltage source of supply joined by one pole with a holder, and by the other one with the vacuum chamber body, and a system of working gas supply to the vacuum chamber. At the same time the plasma source in the PVD device is represented by at least two electric arc sources of plasma with flow separation, installed on side surfaces of the vacuum chamber and directed at its vertical axis. The displacement mechanism is installed as capable of substrate holder movement along the circumference with an axis matching the axis of the vacuum chamber.
EFFECT: improved quality of coatings.
SUBSTANCE: invention relates to an adhesive composition based on a chlorine-containing polymer for gluing components of protective suits and equipment for protecting respiratory organs made from rubber materials. The adhesive composition contains chloroprene rubber, zinc oxide and solvents such as gasoline and ethyl acetate. The adhesive composition additionally contains magnesium oxide, thiuram and silicon oxide hydrosol.
EFFECT: adhesive composition retains high adhesion power for four months, has high oil-and-petrol resistance and provides high bonding strength between glued materials, as well as strength of adhesive joints exposed to aggressive media.
2 tbl, 6 ex
SUBSTANCE: invention relates to making refractory and ceramic articles based on zircon dioxide and can be used mechanical engineering, aviation, petrochemical and electrical engineering. The mixture for producing ceramic material based on zirconium dioxide nanopowder contains the following in wt %: zirconium dioxide ZrO2 75-82 and a concentrate of rare-earth elements 18-25. The concentrate contains rare-earth elements (mainly cerium, lanthanum, praseodymium) in form of carbonates.
EFFECT: invention enables to obtain material at a lower cost by using a concentrate of rare-earth elements as a stabilising additive.
2 ex, 1 tbl, 3 dwg
SUBSTANCE: invention relates to inorganic chemistry of carbon and specifically to nanodispersed carbon materials and a method of purifying said materials, and can be used in different high-tech fields of industry and science where powdered detonation nanodiamonds are used. Aluminium powder is added to the starting diamond-containing powder in amount of not less than 5 wt %. The mixture is stirred, pressed and the sample is annealed at temperature 900-950°C in a vacuum with residual pressure of not less than 10-3 mmHg for 30 minutes.
EFFECT: deep purification of the surface of the detonation nanodiamonds from impurities is carried out via thermal desorption, which enables to obtain new composite diamond-containing materials in dynamic conditions.
8 dwg, 5 tbl, 6 ex
SUBSTANCE: invention relates to equipment for producing carbon nanotubes using electromagnetic radiation. The apparatus has a resonance electromagnetic field concentrator in form of a metal pin 1 and an oppositely lying diaphragm 2 with a hole 3, behind which there is a channel for collecting reaction products 4. Hydrocarbon gas enters the discharge region between the pin 1 and the diaphragm 2 and under the effect of high temperature and electron bombardment disintegrates into carbon and hydrogen. Immediately behind the diaphragm 2 there is a folding metal plate 5 with a recoil spring 6 which covers the hole 3 in the diaphragm 2, on which a solid carbon deposit forms. The hole 3 is in form of a cylindrical channel which is coaxial with the metal pin 1, installed with possibility of axial displacement and free movement into the channel of the diaphragm 2 to force the product into the channel for collecting reaction products 4, which is in form of an expanding cavity. The surface of the plate 5 is cleaned by the end of the pin 1. When the pin 1 returns into the initial position, the plate occupies the initial position under the action of the spring 6.
EFFECT: apparatus provides conditions for preferred synthesis of nanotubes with diameter of 10-20 nm with concentration in the overall product of not less than 80%, high efficiency and easy collection of the end product.
3 cl, 3 dwg
FIELD: process engineering.
SUBSTANCE: proposed unit comprises bed with driven device to clamp and process parts, drives for working tool to displace in three mutually perpendicular axes, laser with laser beam feed device, power supply and control system and work zone guard with protective windows. Transparent sealed chamber is equipped with two valves, one for feeding process gas and another one for waste gas discharge. Said valve may be connected to air system hoses to allow filling with process gases.
EFFECT: simple design, reliable protection of personnel, higher ecological safety.
2 cl, 2 dwg
SUBSTANCE: invention relates to a method of producing radioactive technetium-99m labelled nanocolloid. The method is characterised by adding a technetium-99m eluate to an aqueous suspension prepared from nanosized gamma-aluminium oxide powder with particle size of 7-10 nm and concentration of 0.5-0.7 mg/ml after bringing the pH of the medium to 4-5, followed by successive addition of ascorbic acid, tin (II) chloride dihydrate and gelatine in defined amounts. The obtained mixture is heated in a water bath at temperature 70-80°C for 30 minutes, cooled to room temperature in an ultrasonic bath and then subjected to sterilisation filtration.
EFFECT: invention enables to obtain 99mTc-Al2O3 nanocolloid, used based on its size to conduct diagnostic research for which not less than 80% of the particles have size in the range of 20-100 nm, and the radiochemical purity of the preparation is higher than 90%.
1 dwg, 2 tbl, 3 ex
SUBSTANCE: in the method of making ordered nanostructures, involving formation of ordered regions on the surface of a base or in its surface layer, depositing a continuous layer whose material wets the ordered regions but not the base, carrying out heat treatment, which depends on the thickness and melting point of the material of the continuous layer until formation of an array of ordered nanoclusters, after which the base is etched, wherein the array of ordered nanoclusters is a mask, or a carbon nanostructure is formed on the array of ordered nanoclusters, wherein said nanoclusters are a catalyst.
EFFECT: technique for producing an ordered structure with high aspect ratio of elements, which improves emission properties of the structure, enables use thereof as a die for nanoimprint lithography, improves adhesion of the ordered grown carbon nanotubes, from which there is emission of electrons to an underlying layer and, as a result, increases time stability of the entire device.
5 cl, 1 dwg
SUBSTANCE: surface of a sample is scanned separately for two areas - the surface of the substrate and the surface of the structural element on the substrate, without remounting the sample. The image of the surface of the structural element is formed by subtracting constant inclination which is determined from the results of scanning the surface of the substrate.
EFFECT: method enables to establish the value of inclination of the surface of the structural element relative the surface of the substrate, which increases measurement accuracy.
SUBSTANCE: invention is a structure consisting of a base and an ordered array of microstructures in form of protrusions on said base, arranged such that in each row, each n-th element is replaced with empty space, and in each next row the replaced element is shifted by one position; the number n can vary from 3 to 10 depending on the size of the microstructures. Presence of elements replaced with empty space creates slanting strips in the array of microstructures which are used when calibrating the test structure and the object table.
EFFECT: use of such a test structure enables to calibrate object tables with high accuracy, determine the average value of the given displacement of the table and uncertainty of the displacement.
FIELD: carbon materials.
SUBSTANCE: weighed quantity of diamonds with average particle size 4 nm are placed into press mold and compacted into tablet. Tablet is then placed into vacuum chamber as target. The latter is evacuated and after introduction of cushion gas, target is cooled to -100оС and kept until its mass increases by a factor of 2-4. Direct voltage is then applied to electrodes of vacuum chamber and target is exposed to pulse laser emission with power providing heating of particles not higher than 900оС. Atomized target material form microfibers between electrodes. In order to reduce fragility of microfibers, vapors of nonionic-type polymer, e.g. polyvinyl alcohol, polyvinylbutyral or polyacrylamide, are added into chamber to pressure 10-2 to 10-4 gauge atm immediately after laser irradiation. Resulting microfibers have diamond structure and content of non-diamond phase therein does not exceed 6.22%.
EFFECT: increased proportion of diamond structure in product and increased its storage stability.