Method to manufacture cu-ge ohmic contact to gaas
SUBSTANCE: in the method to manufacture Cu-Ge ohmic contact on the surface of the plate n-GaAs or epitaxial heterostructure GaAs with n-layer a resistive mask is developed, fims of Ge and Cu are deposited, the first thermal treatment is carried out in the atmosphere of atomic hydrogen at the temperature from 20 to 150°C and density of hydrogen atoms flow to the surface of the plate equal to 1013-1016 at.cm-2 s-1. Plates are withdrawn from a vacuum chamber of a spraying plant, the resistive mask is removed before or after the first thermal treatment, and the second thermal treatment is carried out.
EFFECT: reduced value of the given contact resistance.
7 cl, 1 dwg
The invention relates to the technology of microelectronics, in particular to a technology for discrete devices and integrated circuits based on semiconductor compound AIIIBVin particular to create ohmic contacts to regions of the drain and source of the field-effect transistors with Schottky barrier, as well as heterostructure transistors with high electron mobility.
Ohmic contacts must be small given the contact resistance, smooth surface morphology pads, high thermal stability parameters, small depth of interaction metallization contact with the semiconductor, and low cost (Raskin A.A., Shalimov S. Foreign electronic equipment. 1990, No. 12, p.32-47).
Known methods of forming low resistance ohmic contacts to n-GaAs using a metallization system comprising the following components: Au, Ge and Ni. Gold and germanium are deposited on the semiconductor in the form of a film eutectic AuGe alloy (88% Au and 12% Ge) and a layer of Ni (Pietrovska A., Gulvatch A., Peloua G. // Solid St. Electron, 1983, v.26, p.179), or as three separate films of these elements (Bruce R. A., Piercy G.R. // Solid St. Electron. 1987, v.30, No. 7, p.729). Moreover, in the latter case, the ratio of film thickness of Ge and Au is chosen such as to correspond to the eutectic composition AuGe. Thus the total thickness of the deposited films Au/Ge is the range of 100-150 nm, and the thickness of the Nickel layer in the range of 10-50 nm. After deposition, the contact is subjected to heat treatment. In the annealing process is the formation of low-melting alloy and liquid-phase mixing of Au, Ge, Ni and GaAs.
The disadvantages of these methods is low enough given the contact resistance, the depth of recrystallized region OK (~0.1 ám), low thermal stability of electrical parameters of contact, due to the presence of the contact fusible phase AuGa with a melting point of 370°C, the developed relief of the surface of the pad, as well as its uneven edge, the high cost of fabrication of ohmic contacts, which is caused by use of Au.
A known method of making low resistance contact to GaAs (Jim-Tsuen Lai, Joseph Ya-Min Lee / Pd/Ge ohmic contacts to n-type GaAs formed by rapid thermal annealing Appl. Phys. Lett. 64(2), 1994, pp.229-237), which use the metallization system, consisting of a series of sputtered films of Pd and Ge. Nespravnou Pd/Ge ohmic contact is formed by solid-state diffusion of atoms Germany in GaAs through a layer of palladium with education signalisierung n+layer and shows the best thermal stability of electrical parameters and smoother the surface morphology of the contact compared with Au/Ge/Ni equivalent.
The disadvantages of this contact can be attributed more Comte is the things resistance compared with Au/Ge/Ni, and the complexity of its formation in a typical route for the fabrication of integrated circuits, due to the presence on the surface of the ohmic contact reactive and oxidize film Germany.
Known methods in which to obtain better electrical contact to the surface of the ohmic contact Pd/Ge deposited films Au (Rnno // On the low resistance of the Au/Ge/Pd ohmic contact to n-GaAs // J. Appl. Phys., 79(8), 1996) or Cu (US patent No. 7368822, IPC H01L 23/48, publ. 06.05.2008). The advantages of these methods include low value of contact resistance. The disadvantages of the method include low thermal stability of electrical parameters of ohmic contacts due to the penetration of the rapidly diffusing atoms of gold and copper in GaAs.
A method of obtaining thermally stable ohmic contact to GaAs (Aboelfotoh MO / Microstructure characterization of Cu3Ge/n-type GaAs ohmic contacts // J.Appl. Phys., 76 (10), 1994), whereby to obtain ohmic contacts used the metallization system on the basis of the two-layer film Ge/Cu (thickness are chosen so as to form a composition of Cu3Ge), which forms ohmic contact with both n-and p-type GaAs. These contacts are characterized by high thermal stability of electrical parameters, as well as low production costs, due to lack of dragie the different metals in the composition of the ohmic contacts.
The disadvantage of this method is the instability obtain a low value of contact resistance, due to uncontrolled oxidation of copper and/or Germany during the inter-operation of polerowanie in the air, resulting in non-repeatable processes in the formation of ohmic contacts during annealing.
A known method of manufacturing a contact-based films Ge/Cu (..Aboelfotoh, S.Oktyabrsky, and J.Narayan / Electrical and microstructural characteristics of GeCu ohmic contacts to n-type GaAs // J.Mater. Res., Vol.12, No.9, 1997, pp.2325-2332), essentially the most close to the proposed technical solution chosen for the prototype. The method consists in the following. On the surface of the plate n-GaAs (100) with the concentration of electrons in the epitaxial layer is n=3×1017cm-3to implement the reverse process of the lithography mask is formed. To clean the surface in the Windows of the mask, the GaAs wafer is processed in an aqueous solution of HCl (1:1) and then rinsed in deionized water and drying in a stream of nitrogen. Then by the method of electron beam evaporation in vacuum at a residual pressure atmosphere 10-7Torr is a sequential layer-by-layer films deposited on Ge and si with a total thickness of 0.2 μm and the thickness of the Ge film, which sets the mass content of Ge in the metallization equal to 40%. Thereafter, the GaAs wafer is subjected to the first thermobreak is in a single vacuum cycle at T 1=100°C for t=60 minutes Then, the plate is removed from the vacuum chamber and after removal of the mask runs in the danger of the second heat treatment at a temperature T2=400°C for t=30 min in vacuum at a residual pressure atmosphere 10-7Torr.
The disadvantages of this method include low enough the value of a given contact resistance.
The main technical objective of the proposed method is to reduce the values shown in the contact resistance.
The main technical problem is achieved in that in the method of manufacturing a Cu-Ge ohmic contact to GaAs, including the creation on the surface of the plate n-GaAs resistive mask, the deposition on the plate surface of the n-GaAs films of Ge and Cu, the first heat treatment, removing the plate n-GaAs from the vacuum chamber of the spraying installation, removal resistive mask and the second heat treatment, characterized in that the removal of the resistive mask is performed after the extraction plate n-GaAs from the vacuum chamber installation spraying before or after the first heat treatment in an atmosphere of atomic hydrogen at a temperature of from 20 to 150°C and density flow of the hydrogen atoms on the plate surface of the n-GaAs equal to 1013-1016the ATA. cm-2with-1.
In the particular case instead of plate n-GaAs using epitaxial heterostructure of GaAs with an n-layer on a surface the property.
In the particular case of the films deposited on Ge and Cu, and the first heat treatment in an atmosphere of atomic hydrogen is produced in a single vacuum cycle.
In the particular case of the films deposited on Ge and Cu, and the first heat treatment in an atmosphere of atomic hydrogen is carried out in a vacuum chamber at a pressure of residual atmosphere of less than 5×10-6Torr.
In the particular case of initially precipitated Cu film and then the film Ge.
In the particular case of thicknesses of Cu and Ge is chosen so that the mass content of Ge in the two-layer composition is 20-45%.
In the particular case of the films deposited on Ge and Cu simultaneously or alloy CuGexor from two independent sources of Cu and Ge with the formation of the film CuGexwhere x=0,2-0,45.
Conducted by the applicant's analysis of the level of technology has allowed to establish that the analogs are characterized by the sets of characteristics is identical for all features of the proposed device are missing.
Search results known solutions in this and related areas of technology in order to identify characteristics that match the distinctive features of the prototype of the invention has shown that they do not follow explicitly from the prior art.
Of certain of applicant's prior art there have been no known effect provided essential features of the invention transformations on achievement at asanoha technical result. Therefore, the invention meets the condition of patentability "inventive step".
The drawing shows the dependence of the above contact resistance ρ of ohmic contacts to n-GaAs-based films of Ge and Cu with 45%germanium concentration from the temperature of the second heat treatment T in vacuum, obtained according to the method of the prior art (curve 1) and for the proposed method (curve 2).
The proposed method consists in the following. On the surface of the plate n-GaAs having a doped layer, with the aim of implementing the process of the inverse lithography is formed of two-layer resistive mask. To clean the surface in the Windows of the mask plate n-GaAs is processed in an aqueous solution of H2SO4or HCl with subsequent rinsing in deionized water and drying. Then using methods of electron-beam and/or thermal evaporation in vacuum at a residual pressure of less than 5×10-6Torr is the deposition of films of Ge and Cu total thickness of 100-500 nm with a mass content of germanium in a two-layer composition, equal 20-45%. Then the plate is removed from the unit spraying and uploaded installation for carrying out the first heat treatment in an atmosphere of atomic hydrogen at a temperature T1=20-150°C at a flux density of hydrogen atoms on the surface of the plate equal to 1013-1016the ATA. cm-2with-12=280-460°C for t=0.5 to 30 minutes
The second heat treatment can be performed with a gap of a vacuum cycle to another installation of annealing, and in the case where the resistive remove the mask before the first heat treatment, in a single vacuum cycle with the first heat treatment.
The films deposited on Ge and Cu, and the first heat treatment may be performed in a single vacuum cycle at the above conditions.
The minimum and maximum values of mass content of Ge in the two-layer composition the 20% and 45%, respectively, are determined by the fact that at smaller or larger values of the contact resistance of ohmic contacts becomes unacceptable regardless of the method and its modes of the first and second heat treatment.
The minimum value of the flux density of hydrogen atoms on the surface of the plate equal to 1013the ATA. cm-2with-1defined by the fact that at lower values is not achieved technical result of the invention in connection with the competition between the processes of oxidation, metallization OK gases present in the residual atmosphere in the vacuum chamber, and its reduction with hydrogen atoms. Maximize the value of the flux density of hydrogen atoms on the surface of the plate, equal to 1016the ATA. cm-2with-1that limit is determined by technical possibilities of today sources of atomic hydrogen.
The minimum temperature of the first heat treatment T1=20°C is determined by the minimum room temperature, typical for clean rooms microelectronic production. The maximum value of the temperature of the first heat treatment T1=150°C is determined by the maximum temperature for which there is the effect of cleaning the surface of the Cu from the native oxide and its subsequent passivation by hydrogen atoms.
The temperature and time intervals of the second heat treatment (T2=280-460°C, t=0.5 to 30 min) sets the minimum and maximum thermal budget required for the formation of ohmic contacts with a minimum value of the given contact resistance.
The example demonstrates the technical result achieved by the proposed method on how the prototype, and the ability to achieve a technical result in the temperature of the second heat treatment.
Used heteroepitaxial structures of GaAs/AlGaAs/InGaAs with the concentration of electrons in the upper n-GaAs layer with a thickness of 50 nm, equal to 5×1018cm-3. On the surface of the plate was formed a two-layer resist the main mask with topological pattern of ohmic contacts. Before deposition of the metallization to clean the surface and remove native oxides of arsenic and gallium plate n-GaAs were processed in an aqueous solution of H2SO4(1:10) for 3 minutes, subsequently rinsed in deionized water and drying in a stream of nitrogen. Then, the plate n-GaAs was divided into two parts and loaded into the vacuum chamber. On both parts of the plate with the serial film deposition of Ge and Cu was formed a two-layer composition with a mass content of germanium equal to 45%. The residual pressure of the atmosphere was 4×10-6Torr. Immediately after deposition, by analogy with the method of the prototype, the first part of the plate n-GaAs subjected to first heat treatment in vacuum at T1=75°C for t=60 minutes thereafter in accordance with the proposed method both plates of n-GaAs is removed from the vacuum chamber installation deposition and was exposed to the air. Then the second part of the plate n-GaAs was processed in an atmosphere of atomic hydrogen at a pressure of molecular hydrogen p=10-4Torr and flux density of the hydrogen atoms of 1015the ATA. cm-2with-1for t=5 min at a temperature T1=22°C. Next, with both plates of the n-GaAs was removed resistive mask, which led to the formation of the topology of ohmic contacts.
Then both parts of the plate at the same time p who was dergalis second heat treatment in the temperature range T 2=200-500°C for t=180 seconds in vacuum.
The value of the given contact resistance was measured by the method of transmission lines 10 tests, and then were averaged.
From the drawing, which shows the dependencies listed in the contact resistance ρ from the temperature of the second heat treatment T2for ohmic contacts, obtained according to the method of the prior art (curve 1), and ohmic contacts, obtained by the proposed method (curve 2)shows that the formation of contacts on the proposed method at temperatures above T2=400°C can reduce the value of a given contact resistance 1.6 times relative to the prototype method.
In the case of the prototype method, after the first annealing and the extraction plate n-GaAs from the installation deposition, oxidation of the surface metallization of ohmic contacts, which does not allow the second heat treatment to achieve a minimum values listed in the contact resistance. In the case of the proposed method after extraction plate n-GaAs processing plate in atomic hydrogen, which removes metal oxides and passivates the cleaned surface by hydrogen atoms.
1. A method of manufacturing a Cu-Ge ohmic contact to GaAs, including the creation on the surface of the plate n-GaAs resistive mask, the deposition on the surface is the face plate of the n-GaAs films of Ge and Cu, the first heat treatment, removing the plate n-GaAs from the vacuum chamber of the spraying installation, removal resistive mask and the second heat treatment, characterized in that the removal of the resistive mask is performed after the extraction plate n-GaAs from the vacuum chamber installation spraying before or after the first heat treatment in an atmosphere of atomic hydrogen at a temperature of from 20 to 150°C and flux density of hydrogen atoms on the plate surface of the n-GaAs equal to 1013-1016the ATA. cm-2with-1.
2. The method according to claim 1, characterized in that the plate instead of the n-GaAs using epitaxial heterostructure GaAs n-layer on the surface.
3. The method according to claim 1 or 2, characterized in that the deposition of films of Ge and Cu, and the first heat treatment in an atmosphere of atomic hydrogen is produced in a single vacuum cycle with the process of film deposition of Ge and Cu.
4. The method of claim 1 or 2, characterized in that the deposition of films of Ge and Cu, and the first heat treatment in an atmosphere of atomic hydrogen is carried out in a vacuum chamber at a pressure of residual atmosphere of less than 5 x 10-6Torr.
5. The method according to claim 1 or 2, characterized in that the first precipitated film of si, and then the Ge film.
6. The method according to claim 1 or 2, characterized in that the thickness of the films of Cu and Ge is chosen so that the mass content of Ge in the two-layer composition is 20-45%.
7. The method according to claim 1 or 2, otlichalis the same time, the films deposited on Ge and si are performed simultaneously or alloy CuGexor from two independent sources of Cu and Ge with the formation of the film CuGexwhere x=0,2-0,45.
SUBSTANCE: method to metallise elements in products of electronic engineering includes application of a sublayer of a metallising coating on one of substrate surfaces with previously formed topology of elements in an appropriate product, and this sublayer is a system of metals with the specified thickness, providing for adhesion of the main layer of the metallising coating, formation of topology - protective photoresistive mask of the main layer of metallising coating, local application of the main layer of the metallising coating, removal of protective mask, removal of a part of the sublayer arranged outside the topology of the main layer of the metallising coating. Application of the sublayer of the metallising coating is carried out with the total thickness of 0.1-0.5 mcm, directly onto the specified sublayer additionally a technological layer is applied from an easily oxidable metal with thickness of 0.1-0.5 mcm, and formation of the metallising coating topology is carried out on the technological layer from the easily oxidable metal. Prior to local application of the main layer of the metallising coating a part of the technological layer is removed from the easily oxidable metal via the specified protective mask, and removal of the remaining part of the technological layer from the easily oxidable metal is carried out prior to removal of a part of the sublayer of the metallising coating arranged outside the topology of the main layer of the metallising coating.
EFFECT: increased quality of the metallising coating and reliability of electronic engineering products, improved electrical characteristics, increased yield of good products.
6 cl, 3 dwg, 1 tbl
SUBSTANCE: proposed method comprises pre-cleaning of GaSb p-junction conductance by ion-plasma etching to depth of 5-30 nm with subsequent deposition by magnetron sputtering of adhesion titanium 5-30 nm-thick layer and platinum 20-100 nm-thick barrier layer, evaporating thermally of 50-5000 nm-thick silver layer and 30-200nm-thick gold layer for contact with ambient medium.
EFFECT: reproducible ohmic contact with low specific junction resistance.
2 cl, 1 dwg
SUBSTANCE: method of depositing platinum layers onto a substrate involves pre-formation of an intermediate adhesion layer from a mixture of platinum and silicon dioxide nanocrystals on a silicon oxide and/or nitride surface. The intermediate adhesion layer with thickness 1-30 nm can be formed via simultaneous magnetron sputtering using magnetrons with platinum and silicon dioxide targets, respectively.
EFFECT: high quality of elements, processes, reliability during prolonged use, adhesion of the deposited layers to the substrate.
8 cl, 3 dwg
SUBSTANCE: method of making an ohmic contact to GaAs based on thin Ge and Cu films involves formation a mask on the surface of an n-GaAs wafer in order to perform lift-off lithography, deposition of thin Ge and Cu films onto the surface of the n-GaAs wafer, first thermal treatment in a single vacuum cycle with the deposition process, removing the n-GaAs wafer from the vacuum chamber, removing the mask and second thermal treatment. First thermal treatment is carried out in an atmosphere of atomic hydrogen at temperature 150-460°C and hydrogen atom flux density on the surface of the n-GaAs wafer equal to 1013-1016 at.cm2 s-1.
EFFECT: low value of the reduced contact resistance of the ohomic contacts made.
4 cl, 1 dwg
SUBSTANCE: method of making interconnections of a semiconductor device involves formation of a silicon structure in an insulating layer, in which semiconductor devices are formed, contact wells and trenches under future interconnection conductors, successive deposition of an adhesive-wetting layer and a solid catalyst layer at the bottom and wall of the contact wells and trenches, filling the depressions of contact wells and trenches with carbonaceous material through stimulated plasma chemical deposition of the carbon structure from the gas phase on the solid catalyst layer and planarisation of the surface of the silicon structure.
EFFECT: high thermal stability and reduced heating of IC interconnections in conditions of reduction of their cross-sectional area and high current density, low resistivity of the interconnection material compared to carbon nanotubes.
3 cl, 3 dwg
SUBSTANCE: in manufacturing method of multi-level copper metallisation of VLSIC, which involves application operations of metal and dielectric layers, photolithography and selective etching of those layers, chemical mechanical polishing of dielectric layers, to plate of silicium, which is coated with dielectric material with vertical conductors of underlying structure, which protrude on its surface, there applied is multi-layered conducting film consisting of adhesive barrier, etched and auxiliary layers; grooves are formed in auxiliary layer before etched layers by electrochemical method; copper horizontal conductors are grown inside grooves in open sections of etched layer till grooves are fully filled; the second auxiliary layer is applied to surface of plate, and in that layer holes are made to the surface of horizontal copper conductors; vertical copper conductors are grown by electrochemical method in open sections of horizontal conductors till holes for vertical conductors are fully filled; then, auxiliary layers are removed; conducting layers between horizontal copper conductors are removed; dielectric layers are applied to surface of the plate by smoothing and filling methods, and then dielectric material layers are removed above vertical conductors by means of chemical and mechanical polishing method.
EFFECT: improving quality of copper conductors.
16 cl, 11 dwg, 1 tbl
SUBSTANCE: method of forming contact drawing from nickel on silicon wafers involves formation of a dielectric film with windows, chemical deposition of nickel in said windows and formation of a nickel silicide interlayer from the gas phase during thermal decomposition of nickel tetracarbonyl vapour at temperature 200-300°C, pressure in the system of (1-10)-10-1 mm Hg and rate of supplying nickel tetracarbonyl vapour equal to 0.5-2 ml/min per dm2 of the covering surface. The nickel layer is then removed up to the nickel silicide layer through chemical etching and nickel is deposited via chemical deposition onto the nickel silicide interlayer in the window of the dielectric film.
EFFECT: invention enables formation of a transparent contact for an electroconductive layer based on nickel with low ohmic resistance, independent of the type of conductivity and degree of doping of the silicon surface.
1 ex, 1 tbl
SUBSTANCE: in the method of making a multilayer ohmic contact to n-GaAs, involving creation of a double-layer photoresist mask on the surface of a wafer, layerwise deposition of films based on Ge and Au with film thickness corresponding to eutectic composition, and common thickness of 50-300 nm, deposition of Ni-based films with thickness of 10-100 nm, diffusion barrier films with thickness of 10-200 nm, and a top Au film having thickness of 10-1000 nm, removal of the double-layer photoresist mask and thermal treatment of the contacts in an inert atmosphere, deposition of Ge, Au, Ni and Au films onto the a GaAs surface is performed with flight angle of atoms of these materials relative the normal to the surface of the wafer lying in the range of 0-2°, and deposition of a diffusion barrier film based on Ti, Ta, W, Cr, Pt, Pd, TiW, TIN, TaN or WN is performed with flight angle atoms β=n×α, where α is flight angle of Ge, Au, Ni atoms, n=2-10. Thermal treatment is carried out for 1-30 minutes or in a fast thermal annealing device for 30-300 seconds.
EFFECT: low value of reduced contact resistance of the multilayer ohmic contacts.
2 cl, 6 dwg
SUBSTANCE: method involves notching in bulk of a silicon wafer and silicone removing from the wafer back to uncover notch bottoms. Notching enables silicone pattern formation to represent hollow cell walls that is followed with wall-through oxidation to form a dielectric SiO2 conduit system. Silicon removing from the back of the wafer can be conducted by the deep plasma etch process.
EFFECT: high strength of the insulating element which can be used for manufacturing various MEMS devices in bulk of a standard silicon wafer.
2 cl, 13 dwg
SUBSTANCE: method of preparing a transparent ohmic contact structure BeO/Au/BeO/p-GaN involves ion-plasma cleaning of the surface of an epitaxial p-GaN layer and then heating the surface to temperature of 350-370°C and depositing an ohmic contact consisting of a BeO layer with p-type conductivity and thickness of 2.8-3.2 nm, a gold layer with thickness of 3.8-4.2 nm and a second BeO layer with thickness of 3.0-4.0 nm. After ion-plasma cleaning and before depositing the first BeO layer on the surface of the heated epitaxial p-GaN layer, an aluminium oxide layer with thickness of not less than 30% of the thickness of the epitaxial p-GaN layer is deposited and then removed.
EFFECT: minimisation of defects of the growth structure and increased stability of the said transparent contact structure.
FIELD: electronic engineering; integrated circuit manufacture on silicon.
SUBSTANCE: proposed method includes formation of active areas of devices on substrate; masking; opening of contact cuts for active areas; formation of metal deposition system that has amorphous metallide possessing negative mixing heat and incorporating components characterized in higher pressure of inherent vapors or higher sublimation heat than substrate material, and other components of metal deposition system. High stability of metal deposition system provides for manufacturing semiconductor device capable of operating at high temperatures approximately over 650 °C.
EFFECT: provision for preventing ingress of metal deposition system components into active area and escape of impurities from the latter.
6 cl, 2 dwg, 1 tbl
FIELD: micro- and nanoelectronics, micro- and nanomechanics where insulated conductors are used.
SUBSTANCE: proposed method for filling pockets in solid body with conducting material includes coating of solid-body surface, bottom, and side walls of mentioned pockets with first layer that functions as barrier material preventing diffusion of mentioned conducting material in solid body; application of second layer onto first one that functions as wetting layer for conducting material; application of third layer by way of physical or chemical deposition onto third one from gas phase that has in its composition mentioned conducting material; coating of third layer with fourth one that also incorporates conducting material; melting of conducting material by heating and profile leveling; material melting by heating is conducted after applying third layer and fourth layer is applied by any method of physical deposition from gas phase, chemical deposition from gas phase, chemical deposition from solution, electrochemical deposition, or chemical-mechanical deposition.
EFFECT: facilitated procedure, enlarged functional capabilities.
12 cl, 17 dwg
FIELD: ink jet printers.
SUBSTANCE: method includes precipitating resistive layer and conductive layer on insulated substrate, forming a resistive heating element, forming of insulating barrier layer above contour of said conductive layer, forming of gap in said barrier layer, forming of metallic layer being in electrical contact with said conductive layer contour through said gap, having geometry, which opens predetermined portion of said contour of conductive layer, making a layout from metallic layer from said contour of conductive layer through said gap in insulating barrier layer to adjacent portion of said insulated substrate, so that layout from metallic layer on said adjacent portion of said insulating substrate forms a relatively large and flat area, remote from said conductive layer contour, for forming displaced spring contact. After precipitation of resistive layer and conductive layer on insulating substrate, contour of conductive layer is formed first, having a recess, forming later said resistive heating element, and then contour of resistive layer is formed with overlapping of conductive layer contour for value, exceeding precision of combination during lithography process and error of dimensions during etching of resistive layer.
EFFECT: higher quality, higher reliability, higher efficiency.
2 cl, 10 dwg
FIELD: ink-jet printers and their printheads having small holes for programmable ejection of ink droplets.
SUBSTANCE: proposed method for producing printhead thin-film interconnection structure includes deposition of resistor layer and conductor layer onto insulated substrate, formation of patterns of layers deposited onto insulated structure to form resistive heating element, formation of insulating barrier layer onto pattern of mentioned conductor layer, formation of window in mentioned barrier layer, production of metal layer contacting mentioned conductor layer pattern through mentioned window whose geometry opens up predetermined area of mentioned conductor layer pattern, and metal layer pads on insulating barrier layer above heating layer; prior to arrangement of conductors from metal layer, insulating barrier layer is treated with etching solution for cleaning and recovering surface insulating barrier layer, and along with wiring of metal layer from mentioned conductor layer pattern through mentioned window in insulating barrier layer on adjacent area of mentioned insulated substrate metal layer wiring section is made in the form of pad on insulating barrier layer above heating element used as stabilizing evaporation surface. In this way insulating barrier layer is cleaned and its properties are recovered, metal layer wiring adhesion to insulating barrier layer, and especially adhesion of metal layer pad to insulating barrier layer above heating element, is enhanced.
EFFECT: enhanced quality and reliability of printhead.
3 cl, 11 dwg
FIELD: producing copper tracks on insulating substrates.
SUBSTANCE: negative image of track is projected onto copper halide solution layer in organic solvent of substrate with the result that concentric capillary flow occurs in layer which transfers solution to illuminated sections of substrate wherein copper halide tracks remain upon solvent evaporation. These tracks are reduced to copper ones in hydrogen current at temperature sufficient to conduct reducing reaction.
EFFECT: facilitated procedure, reduced cost and copper consumption, improved environmental friendliness due to elimination of wastes.
1 cl, 3 dwg
FIELD: microelectronics; complementary metal-oxide-semiconductor transistors.
SUBSTANCE: proposed method for producing CMOS transistor gate regions includes formation of regions of second polarity of conductivity, insulator, and gate silicon dioxide in substrate of first polarity of conductivity, deposition of polycrystalline silicon layer, its doping, formation of gate regions of p- and n-channel transistors, thermal cleaning in trichloroethylene and oxygen, deposition of separating silicon dioxide, modification, formation of drain and source regions of both polarities of conductivity, thermal cleaning in trichloroethylene and oxygen, deposition of pyrolytic insulating silicon dioxide, its modification by thermal firing in trichloroethylene and oxygen, opening of contact windows, metal deposition, and process operations (removal of natural silicon dioxide, formation of gate silicon dioxide, formation of polycrystalline silicon layer) conducted within single vacuum cycle of one reactor, whereupon polycrystalline silicon layer is doped.
EFFECT: improved and regulated electrophysical properties of gate silicon dioxide enabling enhancement of threshold voltage reproducibility and yield.
4 cl, 3 dwg
FIELD: ohmic contacts for microelectronic devices such as microwave field-effect transistors.
SUBSTANCE: proposed method includes production of vacuum in vacuum chamber, sequential electron-beam evaporation of Ti, Al, Ni, and Au in vacuum chamber onto section of AlGaN layer surface, and high-temperature annealing; prior to Ti, Al, Ni, Au evaporation Ti is sprayed in vacuum chamber to form 2-3 Ti monolayer on surfaces of elements disposed within vacuum chamber; Ti, Al, Ni, Au are evaporated onto section of AlGaN layer surface at vacuum of 1 x 10-7 to 1 x 10-8 mm Hg.
EFFECT: reduced contact resistance of ohmic contacts due to reduced amount of residual oxygen and water vapors in vacuum chamber.
FIELD: ohmic contacts for microelectronic devices such as microwave field-effect transistors.
SUBSTANCE: proposed method includes sequential evaporation of Ti, Al, Ni, Au onto section of AlGsN surface layer and fast thermal annealing of semiconductor heterostructure; fast thermal annealing is conducted using contact method and graphite resistive heater, semiconductor heterostructure being disposed on heater surface. In the course of annealing temperature of GaN/AlGsN semiconductor heterostructure is controlled to ensure reproducibility of its parameters.
EFFECT: facilitated procedure, reduced time requirement, enhanced quality of heterostructure.
FIELD: light devices production.
SUBSTANCE: method of quantum wells mixing within semiconductor device implies: a) formation of layer structure with quantum wells including doped upper layer; b) formation of etch preventing layer over mentioned upper layer; c) formation of temporary layer over mentioned etch preventing layer, and mentioned etch preventing layer has significantly lower etch rate than mentioned temporary layer on condition that etching requirements are preliminary specified; d) process of quantum wells mixing upon device structure making significant violation of at least a part of consumed layer; e) removal of temporary layer from at least device contact area by etching selective relative to etch preventing layer to uncover mentioned etch preventing layer within contact area; and f) formation of contact over layer structure with quantum wells directly on the surfaced uncovered after execution of stage e) at least within mentioned contact area.
EFFECT: improvement of device contact resistance.
15 cl, 10 dwg
SUBSTANCE: invention pertains to electronics, particularly to microelectronics, and can be used when making silicon semiconductor devices. The method of making a system for metal plating silicon semiconductor devices involves forming a dielectric film based on silicon dioxide on a silicon substrate with active regions, formation in this film of contact windows to active elements of the substrate, deposition of a film of molten aluminium with a given thickness, formation of the metal pattern and subsequent thermal treatment for obtaining ohmic contacts. Thermal treatment is carried out in a hydrogen atmosphere with addition of 0.5-3.0 vol.% water or 0.25-1.5 vol.% oxygen.
EFFECT: higher quality of the system of metal plating due to reduced defectiveness and improved electrical characteristics.