Automated repair bench (bars)

FIELD: information technologies.

SUBSTANCE: automated repair bench comprises a computer with software and hardware, which includes 10 input-output devices, an analogue generator, a logical analyser, a digital oscillograph, power supply units, an internal local bus, a unit of external slots for connection of a tested device, and also an intellectual controller, comprising an inbuilt 32-digit processor on a crystal (NIOS-processor), connected to the computer along a USB bus and with a main memory of a fast memory DDR type, and also with a bus arbiter connected to an address port and an input-output port of the intellectual controller, connected with the internal local bus, at the same time all internal devices of hardware are controlled by the 32-digit processor on a crystal (NIOS-processor) along the internal local bus. (n+1) relay control units are connected to the internal local bus, and each of them comprises 64 input-output lines, ensuring operation with radio-electronic equipment, comprising electromagnet relays. Each relay control unit comprises (n+1) input-output devices, every of which comprises 64 input-output lines.

EFFECT: higher efficiency of testing digital-to-analogue devices and devices that comprise relays.

3 cl, 1 dwg

 

The invention relates to electrical engineering and can be used to diagnose repair and adjustment of electronic equipment (REE), made on the base of 3-5 generations used in military technology and in the economy, in stationary and field conditions.

Modern diagnostic tools REA can be divided in principle into two groups:

- the use of random effects with a further signature analysis (hereinafter signature analyzer).

- use of special test influences with further comparison of response CEA reference (hereinafter the test method).

The advantage of the signature analyzer is easy hardware implementation and low cost. The disadvantages of this method include low reliability, the impossibility of testing elements (chips) REA containing finite automata with memory. To test these items REA you need to make changes to the schema, i.e. to break some chains and feeding the signals into the circuit, which greatly complicates the process of diagnostics and Troubleshooting.

Test method finds greatest application in the diagnosis of the elements of the CEA, as it has high reliability testing and ease of Troubleshooting, but requires significant the hardware cost. The test method allows you to test virtually all types of digital and analog elements of the CEA. When using test method there are two approaches to the construction of the test device:

- state machine with memory;

- hardware / software device.

When building a test device according to the scheme of a finite state machine with memory is easier achieved a high rate of change test influences, but sharply limited other technical and operational parameters, such as the formation of bounded and unbounded sequences, the analysis of delays in the checked items REA etc.

Managing electronic computer (hereinafter PC), which is part of the test device (finite state machine), is designed to store test influences and visualization of the device under test.

Hardware test device free from the above disadvantages, because the computers used in such devices, controls the operation of the entire device, which allows changing only the software part, to change the structure and parameters of the test device.

Known diagnostic tools and repair REA now you can call such complexes as "PARM" [1], "Diane" [2].

The closest in technical SunOS and to the claimed technical solution is the solution selected as a prototype - "hardware-Software workstation for diagnosis and repair of electronic assemblies "PARMA", intended for the diagnosis, functional control, repair and commissioning of digital and digital-to-analog electronic circuits of various configurations.

In the known diagnostic stand the test method used under the scheme of finite state machine. The stand consists of a control computer software and hardware, which includes interfaces with a computer (adapter)designed to control the communication between the computer and the internal devices and units of the complex, United by the underlying bus, on the one hand, with a computer and, on the other hand, devices and units of the complex. Each hardware module of the complex corresponds to the database system for the collection and storage of diagnostic information for each test Board. This is a test exposure, reference response, waveform data on all contacts of the items included in the test fee (ICS, transistors, passive elements, and so forth), circuit and functional schema Association table (NET list). Testing the Board using the hardware and software diagnostic complex based on the use of test tables checks (so-called repair database)that for every new the cost, not previously diagnosed on the complex, are made manually by the operator. The reference reaction for the test is removed with a known good card when applying for her this test. The complex is able to memorize and store all the information in the repair databases for each specific Board. The process of testing boards is divided into two stages: the control operation of the Board (on the principle of "just-defective") and, if the card is not functioning, the failure localization.

Diagnostic stand adopted for the prototype, along with the inherent positive qualities has a number of significant drawbacks that limit its technical characteristics and area of application, in particular:

- diagnostic complex does not allow in-one test kit to diagnose and localize the fault elements REE containing digital and high-frequency analog part, as two independent systems (digital-analog and analog) can not work simultaneously, which greatly increases the time of diagnosis, and in some cases (for example, analyzer frequency) is not possible in General to test items REA containing electromagnetic relay, which is not provided available output drivers.

in the known technical solution, the time change impacts in the test is abrow unstable since the issue of test influences is the computer, nahodyashayasa running operating system (Windows), and the instability of the time change of the test impacts complicates the study of the response of the DUT oscilloscope;

- all internal devices "PARM" is controlled from the built-in (external) computer bus LPT mode EPP v1,9, with change speed test influence is limited by the rate of exchange on the bus LPT.

These shortcomings are not present when using the internal device, made according to the scheme of a finite state machine that contains the memory test influences and memory responses. However, the use of a finite state machine dramatically reduces operational capabilities of the test system due to:

- the impossibility of formation of limited and unlimited (condition) sequences for digital lines;

- inability of the joint, in one test set, digital, digital-analog and analog inspections;

- when you change one test in the test set to rewrite the entire array in memory effects, which dramatically reduces the speed debug test set.

The basis of the proposed solution the goal is to create automated repair stand (BARS) for the diagnosis, repair and adjustment REA with improved and compared with the prototype specifications, enhanced functionality in General to get rid of the shortcomings inherent in the diagnostic stand adopted for the prototype.

Automated repair stand, which contains the control computer with software and hardware, which includes the internal local bus, at least not more than 10 devices, I / o, analog generator, logic analyzer, digital oscilloscope, built-in power supply units, the unit of external connectors for connection of the test device.

The peculiarity of this technical solution is that the hardware introduced intelligent controller that contains an embedded 32-bit processor on a chip (NIOS-processor)associated with the computer via USB and with random access memory device (RAM) is a type of high-speed DDR memory, and bus arbiter connected to the address port and data port I / o intelligent controller, with all internal device hardware controlled by a 32-bit processor on a chip (NIOS-processor) internal local bus. To the internal local bus connected (n+1) control units relays, each of which contains 64 I / o line output, designed to work with REA, containing in its composition electromagnetic relays. The control unit relay contains (n+1)device I / o, each of which contains 64 lines of input-output.

The proposed automated repair stand "BARS" in contrast to the known technical solutions has improved the scheme of measurements, namely, instead of two subsystems (digital-analog and analog intermediate frequency) with their controllers, and internal buses use the same scheme of measurement-based predictive controller with an embedded processor that allows you to improve technical characteristics of the stand and to expand its functional and operational capabilities, in particular:

- the introduction of the intelligent controller embedded 32-bit processor on a chip (NIOS-processor)associated with the computer via USB and with random access memory device (RAM) is a type of high-speed DDR memory allows the external computer via the USB to load into RAM test set, and all of the internal arrangement of the BARS are controlled by a 32-bit processor on a chip (NIOS-processor) internal local bus, the speed change test influences constant and limited only by processor speed and the rate of exchange of the local bus;

- introduction to hardware (n+1) control units relays, each of which contains 64 lines I / o, provide REA, containing in its composition of electroma the magnetic relay;

- introduction to the control unit relay (n+1) device I / o, each of which contains 64 I / o line output.

Thus, the new features that distinguish the proposed stand from the nearest analogue in conjunction with the known technical solutions described in the scope of patent claims formulas to achieve technical advantages compared with the closest analogue, namely:

- all major processing response is a 32-bit processor that can significantly relieve the external computer;

- built-in (external) computer is used for data storage and visualization of the testing process;

- the possibility to change the data for one test in the test set without having to rewrite the entire array test set that speeds up and simplifies the process of debugging the test set.

- the ability to change the speed change test influences within a single test set, which is necessary for testing analog devices and devices containing relays;

- the ability to alter the structure and performance 32-bit processor;

- the ability to quickly modify and upgrade the control program 32-bit processor without physical interference with the circuitry of the stand.

The drawing shows a functional block scheme is as basic automated repair stand (snow LEOPARD). The stand consists of a control computer (1) with software such as "Windows XP", and a special test program, developed using the software package "DELPHI 7", hardware (2), which includes: intelligent controller (3), bus (4) USB, 32-bit processor (5) of the crystal (NIOS-processor)connected to the control computer (1) bus (4) USB and random access memory device (RAM) (6) type high-speed DDR memory and with the referee bus (7)connected to the address port (8) and the port (9) I / o, local bus (10), digital devices (11) I / o, analog generator (12), made in the form of synthesizers (13) harmonic signals and synths (14) pulse signals, the logic analyzer (15), a control unit relay (16), built-in independent power supplies (17) with digital control, digital oscilloscope (18), block (19) external connectors for connecting the test device (20).

Intelligent controller (3) is implemented in the FPGA company ALTERA and DRR memory and is designed to save the table test influences, send them to the execution units, testing responses and transfer them to the computer.

Digital device (11) I / o performed on the basis of FPGA ALTERA and logical elements. The device I / o contains 64 lines, each of which can be the t programmatically set the input modes, output bidirectional mode:

in input mode, the input can be set to TTL, open collector, load 75 Ohm;

in the output mode TTL, open collector, working load of 75 Ohms;

- mode bidirectional - TTL.

Analog generator (12) is designed to test and adjust the DAC and ADC.

Synthesizer harmonic signals (13) is made based on FPGA ALTERA and logical elements and contains a 4-phase channel with independent setting of frequency and phase for each channel, and the frequency setting is selected in the range of 0.1 Hz - 60 MHz.

Synth pulse signals (14) contains a 4-phase channel with independent frequency setting 0.1 Hz - 200 kHz. The output signal switchable shape, namely, sinusoidal, sawtooth, rectangular.

Logic analyzer (15) allows you to control the digital signal levels TTL and CMOS.

The control unit relay (16) is made based on FPGA ALTERA, logical elements and powerful electronic relays, contains 64 lines capable of switching voltage 30 V with a maximum current up to 1 A. If you need to switch higher current possible parallel operation of several lines.

In the test bench consists of three software-adjustable and two fixed-block (17) power of the test item REA:

1. Software-adjustable block and power:

- +5 V (3), adjustable from 3 V to 6 V;

- 6,SV (1.5 a), adjustable from 5 V to 9 V;

- 12.6 V (1.5 a), adjustable from 9 to 15 Century

2. Unregulated power supplies:

- 27 V (1.5 a);

- +48 V (1) (a), stand-alone.

The proposed automated repair stand (snow LEOPARD) works as follows:

Bus (4) USB processor (5) intelligent controller (3) the control processor (1) submits a command to "take a block of data, which in the RAM (6) intelligent controller (3) is rewritten dataset test influences. On the command "start" the processor (5) intelligent controller (3) carries out the installation of the system configuration, verify, and record mode of operation of all devices in the test bench BARS. After you complete the installation of the system processor (5) intelligent controller (3) holds the sample data test influences of RAM (6) intelligent controller (3)decoding and outputting the data to the specific device system LEOPARD and reading the response from the test device (20). After working the entire dataset test influences the processor (5) intelligent controller (3) carries out the processing of the data required by the algorithm and transfer them to the control computer (1). When any operator intervention the control processor (1) bus (4) USB delivers to the processor (5) and the intellectual controller (3) required the team. After the command execution controller (3) and system controller (3) continues to execute the program laid down in the test set.

Automated repair stand (LEOPARD) has been tested and used in JSC SDB "Compass" for the diagnosis of repair and adjustment of electronic equipment (REE), made on the base of 3-5 generations used in military technology and in the economy, in stationary and field conditions.

Sources of information

1. Patent of Ukraine # 56099, IPC G05B 19/048, 2003.

2. Magazine "Radiator, No. 11, "Diana", page 42, Kiev, 1999.

1. Automated repair stand (snow LEOPARD), consisting of the management of electronic computing machines (computers) software and hardware, which includes the internal local bus, at least not more than 10 devices, I / o, analog generator, logic analyzer, digital oscilloscope, built-in power supply units, the unit of external connectors for connection of the test device, characterized in that the hardware introduced intelligent controller that contains an embedded 32-bit processor on a chip (NIOS-processor)associated with the computer via USB and memory device (RAM) is a type of high-speed DDR memory, and bus arbiter connected to the address port and the input port is you is Yes intelligent controller, connected to the internal local bus, with all internal device hardware controlled by a 32-bit processor on a chip (NIOS-processor) internal local bus.

2. The device according to claim 1, wherein the internal local bus connected (n+1) control units relays, each of which contains 64 I / o line output, designed to work with REA, containing in its composition electromagnetic relay.

3. The device according to claim 1 or 2, characterized in that each control unit relay contains (n+1) device I / o, each of which contains 64 lines IO.



 

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