Vertical field transistor

FIELD: electricity.

SUBSTANCE: in vertical field transistor containing the source connection, ohmic contact to the source, source, vertical conducting channels, gate made in the form of metal band, sink, the first and the second dielectric layers located on upper and lower surfaces of metal band and adjacent to side surfaces of vertical conducting channels, and substrate, to lower sink surface there in series applied is layer of ohmic contact, contact layer of ductile metal and damping layer of ductile metal, to lower surface of non-perforated end of metal band there in series applied is the first process layer, the second process layer and support for non-perforated end of metal band; substrate is made from heat-conducting dielectric material; to upper side of substrate there applied are the first and the second contact platforms which are galvanically connected to lower surfaces of damping layer and metal support, and all the transistor elements arranged on dielectric substrate, except the source connection, are enveloped with protective dielectric filling.

EFFECT: invention allows increasing output power of transistor and improving reliability and its life time.

8 cl, 3 dwg

 

The invention relates to the field of solid state electronics and can be used in the creation of devices that are designed to enhance, generating and converting RF and microwave oscillations.

Known vertical field-effect transistor (Fasahah. Powerful GaAs VTS. Field-effect transistors on gallium arsenide. The principles of operation and technology / Sat. articles edited DVD Lorenzo and Her. M.: Radio and communication, 1988. S.112-131)containing serially connected metal layer that is output to the drain, a substrate made of GaAs n+-type layer of GaAs n-type layer of GaAs of the p-type layer of GaAs n-type ohmic contact layer of GaAs n-type and the metal layer, which is the output of the source. Metal output of the source is made in the form of a narrow ribbon conductor, a metal output flow - in the form of a wide belt of the conductor. The longitudinal axis of both wires lie in the same vertical plane. The output of the gate is formed in the form of two V-shaped metallized grooves located on both sides of the tape source over the longitudinal edges of the tape runoff entering the inside of the upper layer of GaAs n-type and a layer of GaAs p-type. The outer surfaces of the metallized grooves surrounded by layers of ohmic contacts to the two top layers are made of GaAs. Both metallized grooves galvanically with dynany each other. Managed vertical channel is located between the V-shaped metallized grooves.

The disadvantages of such a transistor are relatively low upper operating frequency, caused by the relatively large values of the parasitic parameters, usage is low and the surface of the semiconductor wafer (due to the relatively large values of the area occupied by the shutter), the relatively high thermal resistance of the semiconductor structure, limiting the output power of the device, and high mechanical stresses on the boundary layers that occur due to structural inhomogeneities of the neighboring layers.

Known vertical transistor with permeable base (Msur. Modern devices based on gallium arsenide. M.: Mir, 1991), containing a flat cathode (negative electrode), a flat anode (positive electrode)located parallel to the cathode, control electrode, in the form of flat metal bars located parallel to the flat cathode (at a shorter distance from the cathode than the anode) and the semiconductor material filling all the space between the three named electrodes. The transistor is controlled by the spatial charge generated in the semiconductor material around the flat metal lattice (bulk charge barrier is ottke).

The disadvantage of such a transistor are relatively low power output, high mechanical stresses at the boundaries of the electrodes with a semiconductor material and a low efficiency.

Closest to the claimed object on the greatest number of essential features is a vertical field-effect transistor (U.S. Pat. U.S. No. 4903089, IPC: 01L 29/80, Appl. 02.02.1988, publ. 20.02.1990)containing serially connected semiconductor substrate, a drain made of a semiconductor of the n+-type, vertical conductive channels made of n-type semiconductor, the shutter is made in the form of a metal tape, perforated within the semiconductor structure, the dielectric layers located at the bottom and top surfaces of the perforated metal strip and adjacent to the side surfaces of the vertical conductive channel, the source, is made of a semiconductor of the n+-type ohmic contact to the source and the output source. The transistor is a prototype made of gallium arsenide (GaAs).

The disadvantages of this device are relatively low conductivity semiconductor base material, through which play an important part allocated a small portion of the semiconductor structure of thermal energy, and considerable mechanical example is the position on the border of the semiconductor substrate and the drain, having a different crystalline structure, which degrades the electrical characteristics of the device and reduces the reliability and durability of his work.

The main technical objective of the proposed solution is to increase the output power of the vertical field-effect transistor by reducing its thermal resistance and increase the reliability and durability of his work by reducing it to stress and strain.

The main technical problem is achieved by the vertical field effect transistor comprising a metal output source ohmic contact to the source, the source, is made of a semiconductor of the n+-type, vertical conductive channels made of n-type semiconductor, the shutter is made in the form of a metal tape, perforated within the semiconductor structure, the drain is made of a semiconductor of the n+-type, the first and second dielectric layers located on the upper and lower surfaces of the metal strip and adjacent to the side surfaces of the vertical conductive channels, and a substrate, according to the proposed solution, on the bottom surface runoff consistently applied the ohmic contact layer, the contact layer of a ductile metal and a damping layer of ductile metal on the bottom surface of imperforated end of the metallic linen is s consistently applied the first process layer, made of the same material as the ohmic contact to the drain of the second process layer, made of the same plastic metal contact layer for ohmic contact to the drain and stand for non-perforated end of a metal tape, made of ductile metal, the substrate is made of dielectric material, on the upper side of the substrate deposited first and second contact pads, made of ductile metal, the first and second contact pads of the substrate are electrically connected with the lower surfaces respectively of the damping layer and a metal stand, and all elements of the transistor, is placed on the dielectric substrate, except for the output source surrounded by a protective dielectric filling, while the role of the findings to the drains of the shutter are part of the first and second contact pads of the substrate located outside surfaces of their connection with the damping layer and the stand.

In the particular case of vertical conductive channels are in the form of a rectangular matrix.

In particular, if the length and width of the output of the source ohmic contact to the source, the source, the drain ohmic contact to the drain and a layer of ductile metal deposited on the ohmic contact to the drain coincide with the length and width of a rectangular matrix of vertical conductive is of analy, measured between the end walls of the conductive channels.

In the particular case of all metal elements are made of the same plastic, metal, namely copper, or gold, or aluminum. In the particular case of the dielectric substrate is made of beryllium oxide or aluminum nitride, or silicon carbide, or on the basis of them.

Conducted by the applicant's analysis of the level of technology has allowed to establish that the analogs are characterized by the sets of characteristics is identical for all features of the proposed device are missing.

Search results known solutions in this and related areas of technology in order to identify characteristics that match the distinctive features of the prototype of the invention has shown that they do not follow explicitly from the prior art.

Of certain of applicant's prior art there have been no known effect provided essential features of the invention transformations on the achievement of the technical result. Therefore, the invention meets the condition of patentability "inventive step".

Figure 1 shows the General view of the device, figure 2 is a section a - a and figure 3 - cross-section B-B.

Vertical field-effect transistor consists of a metal output of source 1, the ohmic contact to the source 2, source 3, is made of poluprovodn the ka n +-type, vertical conductive channel 4 made of n-type semiconductor, gate 5, in the form of metal perforated tape ended unperforated end extending beyond the semiconductor structure of flow 6 made of a semiconductor of the n+-type ohmic contact to the drain 7, the contact layer of ductile metal 8 deposited on the ohmic contact to the drain 7, the first dielectric layer 9 and the second dielectric layer 10 located on both sides of perforated metal tape and adjacent to the side surfaces of the vertical conductive channel 4, the dielectric substrate 11, the first contact pads 12 and the second pad 13 made of plastic (metal deposited on the upper surface of the dielectric substrate 11), conclusions (taps) 14 and 15 of the drain 6 and the gate 5, which is a continuation of the first contact metal pads 12 and the second contact metal pads 13, technological layer 16, made of the same material as the ohmic contact to the drain 7, technological layer 17 made of the same plastic metal contact layer for ohmic contact to the drain 8, the damping layer 18, made of ductile metal, reducing mechanical stresses in the layers of the semiconductor structure is ture when changing its temperature, stands for non-perforated end of the metal strip 19, is made of ductile metal, dielectric protective padding 20.

A feature of the proposed vertical field-effect transistor is that the dielectric substrate 11 coated with the first and second contact metal pads 12 and 13, ending with flat connectors, drain 14 and gate 15, is first produced separately from the rest of the transistor. The rest of the also first transistor is fabricated on a semiconductor substrate of GaAs, the lower element of such a structure is a metal output of source 1 and the upper elements of the damping layer 18 and the stand 19. Alternative technology of growing semiconductor epitaxial layers on the surface of the monocrystalline dielectric substrate, which have high thermal conductivity but different in composition from the composition of the epitaxial layers, not reached the level of mass production for products solid-state RF and microwave electronics. In addition, this technology is very difficult to include the formation of embedded metal layers between the semiconductor layers and the dielectric substrate. Growing damping layer 18 and the cradle 19 is carried out by electroplating or by the method of vacuuming the spraying. After the galvanic connection of the damping layer 18 with the first contact pad 12 and the stand 19 with the second contact pad 13 of the dielectric substrate 11, for example, low-temperature ultrasonic method of planting semiconductor patterns on the dielectric substrate 11, is filled polymer dielectric fluid surrounding the structure elements of space on the lower level, which coincides with the top surface of the dielectric substrate 11 to the upper level, which coincides with the top surface of the metal output to the source 1. Then, the polymerization process of the dielectric fluid and converting it into a solid dielectric protective padding 20.

The proposed vertical field-effect transistor operates as follows. When applying a positive voltage to the output flow 14 (positive electrode) relative to the metal of the output of source 1 (negative electrode) and when applying a positive bias to the metal output of gate 15 (also relative to the metal output source 1) through the transistor begins to flow the current, limited spatial rectangular-loop charges formed around each protrusion of the shutter 5, which is located in each of the vertical conductive channel 4. These spatial whom charges are volumetric charges of the Schottky barrier, formed in monocrystalline semiconductor material of the vertical conductive channels 4, adjacent to the lugs of the bolt 5. With the change of the gate voltage 5 varies the cross-sectional area of each space charge, resulting in a change of the total layer of the cross section of the vertical conductive channel 4 and change the current of the transistor. At constant voltage on the gate 5 and the low voltage at the drain 6 drain current increases with increasing voltage on the drain 6, and then is saturated, which is associated with the saturation drift velocity of electrons in an electric field. With a further increase of the voltage at the drain 6 drain current or does not increase, or increases only slightly.

Increasing the output power from the proposed vertical field-effect transistor with respect to the transistor prototype is achieved by replacing the substrate of gallium arsenide having a low thermal conductivity, dielectric substrate 11 from beryllium oxide (EEO), aluminum nitride (AlN) or silicon carbide (SiC) or material made based on them and having a significantly higher thermal conductivity. From thermal conductivity of the substrate, through which is dissipation depends on the maximum working power transistor, the Conductivity of a substance is determined by the coefficient of thermal conductivity λ, var is represented in W/(m·K), where To is the temperature in degrees Kelvin. thermal conductivity of the substrate transistor of the prototype at 300 K does not exceed λ(GaAs)=55 W/(m·K). For real-insulating substrate of GaAs λ does not exceed 40 W/(m·K). thermal conductivity of the substrate made of beryllium oxide, aluminum nitride, or carbide of silicon at 300 K, is equal to: λ(EEO)=250 W/(m·K), λ(AlN)=170 W/(m·K) and λ(SiC)=150 W/(m·K), that is, exceeds λ(GaAs) not less than 4.5, 3.1 and 2.7 times. In the proposed transistor as a ductile metal are copper, gold or aluminum, which at 300 K λ(Cu)=401 W/(m·K), λ(Au)=317 W/(m·K) and λ(Al)=237 W/(m·K), and λ which can exceed λ(GaAs) more than 7.3, 5.8 and 4.3 times.

Increase reliability and durability of the proposed transistor is carried out by introducing a damping layer 18 of plastic metal inserted between the semiconductor structure and the dielectric substrate 11, which reduces mechanical stress in the semiconductor structure by changing the temperature.

Note that when using the proposed transistor in the integrated circuit containing dielectric substrate 11, between all elements of the integrated circuit resistive connection through the dielectric substrate 11 is not (in contrast to an integrated circuit fabricated on a substrate of unnatural semiconductors is (a).

1. Vertical field-effect transistor comprising a metal output source ohmic contact to the source, the source, is made of a semiconductor of the n+-type, vertical conductive channels made of n-type semiconductor, the shutter is made in the form of a metal tape, perforated within the semiconductor structure, the drain is made of a semiconductor of the n+-type, the first and second dielectric layers located on the upper and lower surfaces of the metal strip and adjacent to the side surfaces of the vertical conductive channels, and a substrate, characterized in that the bottom surface runoff consistently applied the ohmic contact layer, the contact layer of a ductile metal and a damping layer of ductile metal on the bottom surface of the unperforated end of the metal strip are sequentially deposited first process layer, made of the same material as the ohmic contact to the drain of the second process layer, made of the same plastic metal contact layer for ohmic contact to the drain and stand for non-perforated end of a metal tape, made of ductile metal, the substrate is made of dielectric material, on the upper side of the substrate deposited first and second contact pads, made of p is actiongo metal, the first and second contact pads of the substrate are electrically connected with the lower surfaces respectively of the damping layer and a metal stand, and all elements of the transistor, is placed on the dielectric substrate, except for the output source, surrounded by a protective dielectric filling, while the role of the conclusions of the drain and gate are part of the first and second contact pads of the substrate located outside surfaces of their connection with the damping layer and the stand.

2. The transistor according to claim 1, wherein the vertical conductive channels are in the form of a rectangular matrix.

3. The transistor according to claim 2, characterized in that the length and width of the output of the source ohmic contact to the source, the source, the drain ohmic contact to the drain contact layer plastic metal deposited on the ohmic contact to the drain coincide with the length and width of a rectangular matrix of vertical conductive channels, measured between the end walls of the conductive channels.

4. The transistor according to claim 3, characterized in that all of its metal elements are made of the same plastic metal.

5. The transistor according to claim 4, characterized in that all of its metal elements made of copper.

6. The transistor according to claim 4, characterized in that all metal parts are made of gold.

7. T is assistor according to claim 4, characterized in that all of its metal elements are made of aluminum.

8. The transistor according to claim 5 or 6, or 7, characterized in that the dielectric substrate is made of beryllium oxide or aluminum nitride, or silicon carbide, or based on them.



 

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