Voltage switching unit with protection against current overload

FIELD: radio engineering.

SUBSTANCE: voltage switching unit with protection against current overload includes electronic switch which supplies the power to load unit and to overload freezing unit. Overload freezing unit freezes the activation of electronic switch at initial supply of input voltage and provides the deactivation of electronic switch when the current is higher than the specified one. Additionally introduced shaper of delayed pulse unlocks the electronic switch, provides the specified delay relative to the supply of input voltage.

EFFECT: improving reliability of the device owing to excluding the current stabilisation mode at any kinds and modes of load, and enlarging functional capabilities owing to tuning of current commutation time relative to supply of input voltage.

2 cl, 4 dwg

 

The invention relates to means of electronic equipment and can be used for switching the voltage from the power source to the power load with protection against excess current, and overload protection as the power source and the switch voltage.

Known compensation voltage stabilizer [1] protection from overcurrent, containing an electronic switch, is performed on the transistor, a current limiting resistor and a second transistor, managing electronic switch.

The disadvantage of this device is the inability to completely disable load from a voltage source, which may lead to unacceptable modes of operation of the unit load. For example, if the unit load is an electronic device, the elements of this device will be invalid under reduced pressure.

The number of known devices - switches voltage [2-5], based on series-connected electronic switch and the shunt; to increase the voltage drop at the latest by using Comparators and logic elements is controlled (off) electronic key.

The disadvantage of such devices is the lack of limitations inrush currents that can cause false triggering of the protection circuit. In addition, give the Batwa have low immunity because of the possibility of false positives logic elements.

As a prototype of the proposed device functionality can be specified on the "Key stabilizer, constant voltage" [6]with the current protection.

The device prototype contains in the chain of current flow in the load of the electronic key, is performed on the transistor, and the power overload protection, performed on the n-p-n transistor. The emitter-collector transition n-p-n transistor is connected between the emitter and base of transistor electronic key. Base n-p-n transistor is connected through a resistor to a common point of the capacitor and two diodes (negative findings). A second output capacitor connected to the positive bus input voltage, the second terminals of the diodes are connected to the first diode to the negative bus input voltage, a second diode connected load on a dial-up voltage.

The device prototype operates as follows.

In the absence of a short circuit in the load capacitor (3) is charged through the base-emitter transition n-p-n transistor (14) almost to the level of supply voltage (contrast voltage determined by the voltage drop across the base-emitter transition). After charging the capacitor, the transistor 14 is locked and is the opening of the transistor (7) in the load circuit. When a short circuit or reducing the load resistance of the condensate is p (3) begins to run, current flows through the transistor (14) and the transistor is fully or partially closed.

The disadvantage of this device is that when the switching voltage in a nonlinear load (in which the resistance depends on the voltage, for example, when the number of failures of semiconductor elements in the device, powered through the switch voltage) or partial reduction of the load resistance (in which the switching transistor can switch to linear mode) electronic key enters current limit, what is the increased power dissipation in the switching transistor. This can lead to overheating and failure.

The objective of the invention to increase the reliability of the device due to the exclusion mode current stabilization for any type and load modes and functionality due to the possibility of setting the time of switching current relative to the input voltage.

This task is achieved by the fact that the switch voltage with protection from overcurrent, containing connected in series bus negative potential of the input voltage, an electronic key, a second input connected to the positive bus potential of the input voltage, and the negative bus potential of the output voltage, is connected to the PE the new entrance block fixation overload, containing a resistor and a capacitor, and n-p-n transistor, the emitter and collector of which are connected respectively to the first input and control input of the electronic key as the second input and output unit fixing overload, additionally introduced shaper of the delayed pulse, the first input connected to the positive bus potential of the input voltage, the second input is connected to the negative bus potential of the input voltage, and the output is connected to the third input of the unit fixing overload formed by the base of n-p-n transistor and the output limiting resistor connected in series with the parallel connected resistor and capacitor, the second set of conclusions which the first input unit fixing overload.

The driver of the delayed pulse is made in the form of an RC-link, which input is the first input of the shaper delay and is connected through a resistor to the collector of the transistor base-emitter transition which is connected parallel to the capacitor of the RC-element, the emitter is the second input of the shaper of the delayed pulse, the output of which is connected through a capacitor to the collector of the transistor.

The functioning of the inventive device is illustrated by figure 1-4.

Figure 1 shows the diagram of the switch voltage with protection from overcurrent. Figure 2 and 3 Pref is found examples of different execution switch voltage with protection from overcurrent. Figure 1-3 shows:

1 - bus negative potential of the input voltage,

2 - bus positive potential of the input voltage,

3 - electronic key is composed of:

4 is a key element (field-effect transistor - figures 1 and 3, the composite bipolar transistor figure 2), 5, 6 - sensitive resistors of the voltage divider;

electronic key 3 has: inputs 3-1 (first entry), 3-2 (second entrance), 3-7 (control input) and the output 3-18,

7 is a block fixation overload is composed of:

8 - n-p-n transistor, 9 - resistor, 10 - condenser 11 - limiting resistor;

the fixing unit overload 7: 7-1 (second entrance), 7-12 (third input), 7-18 (first entry) and exit 7-3,

12 - shaper of the delayed pulse is composed of:

13 - effect transistor 14 and capacitor 15 and the resistor 16 is aperiodic link of capacitor 17 and resistor 18;

the driver of the delayed pulse 12 has inputs 12-1 (second entrance), 12-2 (first entry) and output 12-7,

19 - bus negative potential of the output voltage,

20 - bus positive potential of the output voltage,

21 - unit load capacitance (22) and active (23) components. Figure 3 additionally shows:

24 - shunt,

25 is a protective diode.

Figure 4 shows a copy of the waveforms recorded during the simulation of one implementation of the claimed device and an example of a form of voltage, the post is speaking to the input of the device (between points 2 and 1) b - possible additional load as the ratio of current overload of Ilaneto the nominal current IMr.in the voltage at the load 21, g - load current, the load current with a larger scale of time.

The device is made as follows.

Bus negative potential of the input voltage 1 (hereinafter referred to as "bus 1") is connected to the first input (3-1) electronic key 3, 3-18 output of which is connected to the negative bus of the output signal 18 (hereinafter - "the tire 18") and the first input (7-18) unit fixing overload 7. The second input (3-2) electronic key 3 is connected to the positive bus of the output signal 20 (hereinafter - "the tire 20") and the first input (12-2) shaper of the delayed pulse 12. The second input (7-1) unit fixing overload is connected to the bus 1 and a second input (12-1) shaper of the delayed pulse 12, the output 12-7 which is connected with the third input (7-12) unit fixing overload 7. Output 7-3 block fixation overload 7 is connected with the control input (3-7) electronic key 3. The positive bus input 2 (hereinafter referred to as "bus 2") combined with the bus 20.

Electronic key 3 contains a key element 4 (as a key element can be chosen field-effect transistor or a composite bipolar transistor and the voltage divider, the imp is United on the resistor 5 and 6. Their common point is connected to the gate (when using a field-effect transistor - see figure 1 and 3) or base (when using a bipolar transistor - see figure 2) - this point is a control input (3-7) electronic key 3. A second output resistor 5 inside the electronic key connected to the first input (3-1), and the second output resistor 5 inside the electronic key is connected to a second input (3-2).

In the fixing unit overload 7 base n-p-n transistor 8 is connected to the first output limiting resistor 11; their point of connection is the third entrance (7-12) unit fixing overload. The resistor 9 and the capacitor 10 are connected in parallel; one of their common point is the first entrance (7-18) unit fixing overload 7, another common point is connected to the second output limiting resistor 11. The emitter of transistor 8 is the second entrance (7-1) unit fixing overload 7. The collector of transistor 8 is output (7-3) unit fixing overload 7.

The driver of the delayed pulse 12 RC-link 16 in the form of serially connected capacitor 17 and resistor 18. The General point of their compounds (exit RC-link) is connected to the base of the transistor 13, the emitter of which is a second input (12-1) and is connected to the second lead of the capacitor 17. The collector of transistor 13 is connected through resistor 15 to the first input (12-2) and with the first conclusion to which danzatore 14, the second lead of the capacitor 14 is the output of the shaper of the delayed pulse 12. Entrance aperiodic link 16 (second output resistor 18) connected to the first input (12-2) shaper of the delayed pulse 12.

Switch voltage protection over-current is as follows.

For example, in the interval from t1to t10between the trunks of the positive potential of the input voltage 2 and the negative potential of the input voltage 1 device voltage U2,1(waveform a), figure 4). There is a current IB(the base current of the transistor 8) in the chain: bus negative potential of the input voltage 1 → emitter-base n-p-n transistor 8 → the resistor 11 → the capacitor 10 → load 21 → bus 2 and 20. The value of this current (waveform d) and e), the time t1) (figure 4) at the moment the supply voltage is determined by the value of the resistor of the resistance 11 and the capacitive component of the load 22 unit load 21. The resistance value of the resistor 11 is selected based on the conditions of opening of the transistor 8. At the opening of the transistor 8, the voltage between the gate and source (or base and emitter - to figure 2) a key element 4 (in particular, transistor) is set at the level at which it is closed, and the current in the load is not flowing.

At the same time (starting from time t1) is the charge con is Satoru 17 through a resistor 18 to a voltage, when opened, the base-emitter junction of transistor 13 (the time interval from time t1until t2). The time constant of charge of the capacitor 17 is determined by the time constant of the RC element 16. Then starts to open the transistor 13, as a result begins to close the transistor 8, the transition of the gate-drain of the transistor 4 appears a voltage sufficient to open the latter. For different types of field-effect transistors, this voltage may be in the range of (2-4) to (10-15) Century For bipolar transistors, this voltage may be in the range of (0.6 to 0.8) Century the opening of the transistor 4 is determined by the time constant of the RC element 16, which is selected based on the following factors:

- provide small starting current - usually not more than (2.5-3.0) values from the values of the operating current,

- small time of transition from the transient time depends on the heat on the key element 4 (during the time of the leading edge it is in linear mode). The transition process is completed in a period of time from time t2until t3(figure 4). In the process of emergence of the load voltage (waveform d) (4) current IBceases and the transistor 8 is locked.

Next (until t4there is a mode of passing the rated current of the determined active components that are contributing to the overall resistance of the load.

If, for example, in the period of time from t4until t7there is a "failure" voltage (in absolute value), there are transients in the circuit the current flowing in the load on the leading edge of failure (t2-t5and on the trailing edge of failure (t6-t7).

When overcurrent - decreasing resistance 23 load 21 or when a short circuit (phase t8-t9waveform b) is the voltage at the load (U19, 18) starts to fall, you may receive the current IBstarts to open the transistor 8, starts off the key element 4 and decreases the current through the load, which also contributes to reduction of the output voltage and increase the current IBi.e. produces positive feedback, contributing to the cessation of current through the load.

Failure short circuit or restore the load resistance does not cause the voltage across the load and current through it, as if off the electronic key voltage on the load 21 is absent, and the current IBnot terminated.

Further, if the input voltage is removed, and then submit again, the circuit is restored and operates as described above.

If, for example, at the input of the switch voltage will appear a hindrance, leading to a decrease of the voltage U2,1 (portion of time from t4to t7), then there is a reduction of the voltage U20, 19. The decrease in the current I1,18in the area from t4to t5and its increase in the area from t6to t7associated with the current charge capacity of the load 22. After loss of signal interference voltage on the load is restored to the voltage that was before the act of interference.

Depending on the type of the selected electronic key 4 and n-p-n transistor 8, and the required ratio between the nominal and in-rush current and peak values of the switched current at the time of occurrence of an overload, the device can be optionally added to the shunt resistor 23 and the diode 24. The shunt 23 is used in case of a voltage drop on the electronic key is not enough to fix the overcurrent at the specified level. The diode 24 serves to protect the base-emitter junction n-p-n transistor 8, if the specified transition has a low permissible reverse voltage.

In comparison with the known switch voltage [6] the present invention has improved reliability through the implementation of secure electronic key against over power dissipation (temperature), as eliminated stabilization mode current in the device and pulse mode when the current overload. Dissipation powerfully shall be allocated once during the time t 3-t2for the given example (waveform d) (4) is close to the value of I1,18·(U2,1-U20,19)/4=(7-10) W in a period of time (2-3) MS.

Adjusting the delay time of an electronic key is provided by selecting the time constant of the RC-link - selection of values of capacitor 17 and resistor 18. The delay also depends on the switching voltage. Calculations and simulations show that the time delay for this circuit device is in the range from 0.07 to 0.13 from the values of RC. In particular, when the values of the capacitor 17 is 10 μf, and resistor 18, is equal to 20 kω, the delay is about 2 to 3 MS.

The proposed set of features considered by the authors in decisions not met for solving the task and not obvious from the prior art, which allows to conclude that the technical solutions according to the criteria of "novelty" and "inventive step".

Literature

1. The power supplies of electronic equipment. Directory edited Gshively. M.: Radio and communication, 1986, strb, RES.

2. Description of the invention to the patent of Russian Federation №2210183, H03K 17/08.

3. Description of the invention to the patent of Russian Federation №2258302, H03K 17/08.

4. Description of the invention to the patent of Russian Federation №2240647, H03K 17/08.

5. Description of the invention to the patent of Russian Federation №2208292, H03K 17/08

6. Description of the invention to the patent of Russian Federation №2286593, 05F 1/569.

1. Switch voltage with protection from overcurrent, containing bus negative potential of the input voltage, connected to the first input of an electronic key, a second input connected to the positive potential bus output voltage, and the negative bus potential of the output voltage, is connected to the output of the electronic switch and the first input unit fixing overload containing a resistor and a capacitor, and n-p-n transistor, the emitter and collector of which are connected, respectively, to the first input and control input of the electronic key as a second input, characterized in that it additionally introduced shaper of the delayed pulse first input connected to the positive bus potential of the input voltage, the second input is connected to the negative bus potential of the input voltage, and the output is connected to the third input of the unit fixing overload formed by the base of n-p-n transistor and the output limiting resistor connected in series with the parallel connected resistor and capacitor, the second set of conclusions which are the first entrance of the fixing unit overload.

2. Switch voltage with protection from overcurrent according to claim 1, characterized in that the driver of the delayed pulse is made in the form of an RC-link input which is is the first input of the shaper delay and is connected through a resistor to the collector of the transistor, the base of the emitter junction of which is connected in parallel with the capacitor of the RC-element, the emitter is the second input of the shaper of the delayed pulse and the transistor collector is connected to the first output capacitor, a second output which is the output of the shaper of the delayed pulse.



 

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FIELD: electricity.

SUBSTANCE: protection circuit of the power supply unit of a dc voltage apparatus is installed at the output of the power supply unit, and between the positive terminal (3) of the power supply unit and the positive terminal (1) of said apparatus there is a switching element (S1) and an inductor (L1), which is connected between the switching element (S1) and the positive output terminal (1), wherein the inductor (L1) on its side connected to the positive output terminal (1) is also connected to the an output capacitor (C2), and the side of the inductor (L1) connected to the switching element (S1) is connected to a diode (D1), which is connected in parallel to the output capacitor (C2) n the cathode side, and there is also a device for controlling the switching element (S1), which includes the switching element (S1) depending on current measured in the protection circuit.

EFFECT: designing an apparatus which, as a result of connecting units when the apparatus is operating, the absence of current harmonics is determined, and therefore undervoltage on the conductor line.

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