Transistor and method of making said transistor

FIELD: electrical engineering.

SUBSTANCE: invention relates to semiconductor electronics and can be used for making heavy duty and high-precision transistors. The transistor contains a first set, which includes N1>1000000 regions with the same conductivity, a second set which includes N2 >1000000 regions with the same conductivity, as well as a third set, which includes N3>1000000 regions with opposite conductivity. The regions are made with formation of a first set of separate same-type point p-n junctions between regions from the first and third sets and a second set of separate same-type point p-n junctions between regions from the second and third sets. Electrodes, adjacent regions included in at least one of the said sets, for which the condition Ni>1000000, where i∈{1, 2, 3}, is satisfied, are connected in parallel by one conductor, i.e. are connected into a single current node.

EFFECT: obtaining high-precision heavy duty transistors with stable electrical parametres.

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The invention relates to semiconductor electronics and can be used for the manufacture of super-high-frequency diodes, transistors and other semiconductor devices with high-precision, stable electrical parameters, operating in low-power and frequency range, and in conditions of high temperatures and electrical overloads up to hypervisor frequency of 3 THz.

From literature is known Schottky diode (see Ipplepen. // Fundamentals of microelectronics, ed. 2-E. M.: Laboratory of basic knowledge. 2004, Pp.93-95), which proposes to achieve by eliminating the diffusion capacity is not the main charge carriers relatively high values of the operating frequency from 3 to 15 GHz.

Known mnogomotornye transistor (Tarabrin BV, Jakubowski SV, Barkanov N.A. // Handbook of integrated circuits. M: Energy, 1980. - 816 C.). These transistors solve the problem of expanding the number of input logic signals in circuits.

From the patent literature known powerful microwave transistor containing the base electrodes and the semiconductor substrate with a transistor cells, each of which includes a region of the collector region, the emitter and base contact each with its located on the surface of the substrate metallized area, one of which is connected to the common electrode output and a ballast resistor in contact with its opposite sides with the emitter region and the metallized area of the emitter, according to the invention at least one of the sites or one of the ballast resistors, at least one cell has recesses in the form of a groove depth of not less than thickness of metallization (see RF Patent №2253924).

Known for high-power microwave transistor, it is the total area of the grooves in the pads metallization emitter and base regions of each transistor module, designed to reduce the parasitic capacity of the sites, increases the inductance of its output circuit (see RF Patent №2227946).

Known for high-power microwave transistor, it is the average size of isolated fragments pads metallization emitter and base regions of each transistor module decreases with increasing inductance of its output circuit. If this additional condition is newwelcome total area of isolated fragments metallization of this module relative to the module with the smaller values of the inductances of the output circuits (see RF Patent №2227945).

A close analogue is microwave transistor (see VimpelCom. // Semiconductor devices. The transistors. M: "RICKEL", "Radio and communication". 1995, S-92) TO-5 with an operating frequency of 12 GHz and a power of 40 m is so This result in terms of frequency, this transistor is achieved by reducing the sizes of the base and the emitter layer and the decrease of the contact electrodes on the base and the emitter, but its capacity is relatively small.

The closest analogue is the transistor with many unrelated separate emitters in the form of strips or disks (see Val, Lkitchen. Semiconductor devices. St. Petersburg - Moscow - Krasnodar, "DOE", 2003, str).

Usually power dissipation Pto(or output power) at the collector of the transistors are subdivided into low (Rto≤0.3 watts)average power (Pto=0,3 W - 1,5 W) and high power (Pto≥1.5W). The power transistors on one (or more) decimal order of magnitude higher than 1.5 W, therefore, properly be attributed to heavy duty (CM).

On the working range of high-frequency transistors are conventionally divided into the high frequency RF range up to 3-30 MHz), very high frequency VHF (range up to 30-300 MHz), ultra high frequency UHF (range 0.3-3 GHz), ultra high frequency SHF (range up to 3-30 GHz extremely high frequency EHF (range up to 30-300 GHz) and hyperviscous frequency (GWh) (range up to 300 GHz - 3 THz).

Common disadvantages of all semiconductor (conventional and high-frequency) devices are a great value and the variance of the full resisting film to prevent the effect in p-n junctions, consisting of the active (R), capacitive (C) and inductive (L) components. This leads to reduced power semiconductor device, instability of electrical parameters, to a significant variation of volt-ampere characteristics (VAC), and also leads to reduced sensitivity and performance, resulting in lower operating frequency. In this regard, as a rule, all high frequency, for example, microwave GWh transistors have low power. The disadvantages of the known semiconductor devices must be attributed to the instability of their electrical parameters at low and high temperatures.

In this regard, there is a need to manufacture high-precision semiconductor transistors with a simultaneous increase in their power, operating frequency, stability, input and output characteristics, able to work both in normal conditions and in the extreme, particularly at low and high temperatures, in terms of electric and thermal overloads in the range microwave GWh.

In this solution, the reduction of the dispersion of the resistance values of the electrical parameters, increasing resistance to over-heat and electric voltage and at the same time stable operation in the microwave GWh range is achieved through the application of new physical methods of modification of the materials used in the manufacture of semiconductor devices. It's simple, but for a given level of technological development of fundamentally new ways of physical modification based on the use of common universal principle of time-temperature (power) and frequency equivalence (principle Rets) and the laws of mathematical statistics [1-4].

According to the principle of Rets the exposure time (or the same that frequency)applied power load (or scale), the frequency (or time of exposure), the exposure temperature is called in solids or other physical objects equivalent changes in physical characteristics, in particular, they lead to a decrease or increase of the experimental data scatter physical measurements [1-2]. Therefore, in order to reduce the spread and magnitude of the physical parameter, for example, resistance R, of any semiconductor material, you can find the appropriate temperature, power amperage, frequency of exposure to the material, or the scale of the sample. Researchers of the 20th century [5] to this end, I reduced the temperature of the experience, for example, they discovered in this way the existence of a certain critical temperature Tkrat which the material is passed into the superconducting state. Electrical resistance when the temperature was decreased almost to zero, and the variance of the fight the Oia was practically absent, i.e. the resistance was stable in size, had no experimental scatter. In this case, derivatives electrical parameters (for example, current and voltage) are also perfectly stable.

According to the principle of Rets same result can be obtained by changing not only the temperature, but the change in power load or frequency change, or a change in exposure time, or by changing the scale of the sample. However, the use of these methods, except for the change of scale require large energy and financial costs and technically difficult or impossible (due to their high cost) to implement at this stage of technology development.

According to the present invention, the decrease in impedance, eliminating scatter and increased temperature stability and the operating frequency is achieved by combining subtle elements of the used semiconductor material in one statistical bundle or cable (see "effect of the rope", "beam effect" [3-4]. Thus according to the invention this requires a sufficiently large number N>1 (where N is an integer and it must be infinitely large, and ideally N→∞) of these elements in the rope and that these elements were separate and the same. In addition, according to the effect Tsoi [4] to implement the effect of strengthening or weakening ka the CSO of any physical parameter of the beam (beam elements) should be even with relatively small geometrical dimensions (ideally, there should be infinitely small and tend to zero), i.e. in the case of semiconductor devices, p-n-transitions (beam elements) must be a point.

Currently, to overcome the shortcomings of semiconductor devices researchers and technologists are on their way to modification of the chemical structure of semiconductor materials from which they are made. In particular, for obtaining high-precision high-precision, heavy-duty and high-frequency, or temperature stable devices are expensive ultra-pure materials and other products of modern nanotechnology. All this greatly increases the cost of creating and manufacturing of semiconductor devices leads to an increasing complexity of the technology for their production.

The present invention is directed to the manufacture of heavy-duty and high-precision semiconductor GWh transistors are characterized by a high stability of the input and output characteristics, capable of working in conditions of low and high temperature, electrical and frequency overloads without major financial costs.

The technical result of the present invention is easy (no capital cost) adaptation in existing modern semiconductor technology and high-precision heavy-duty (CM) transistor with stable electrical parameters, is able to work in normal temperature is about power and frequency of the exposure conditions, and until GWh-range in terms of electrical and thermal overloads.

In the diode structures are designed to ultimately transistors and other semiconductor devices, the technical result is achieved by the fact that they are made of at least one p-region and at least one n-region adjacent to each of the specified areas of the electrodes made of the number N>1 (where N is an integer and preferably, N"l and sought to infinitely large number) regions of the same conductivity and a region of opposite conductivity with the formation of N separate homogeneous point p-n transitions, and the electrodes adjacent to each of the N regions of the same conductivity, connected in parallel through a single conductor, i.e. merged into one node (or the beam).

In the particular case mentioned N the region of the same conductivity may be p-regions, and the said one region with the opposite conductivity to be n-region.

In transistor structures, the technical result is achieved by the fact that the transistor includes the first set includes N1>1000000 regions of the same conductivity, the second set including N2>1000000 areas with the same conductivity, and the third set including N3>100,000 domains with opposite conductivity made with the formation of the first set of separate homogeneous point p-n junctions between the regions of the first and third set and a second set of separate homogeneous point p-n junctions between the regions of the second and third sets, while the electrodes adjacent to the areas included in at least one of these sets, for which the condition Ni>1000000, where i∈{1, 2, 3}, connected in parallel through a single conductor, i.e. combined into a single current node.

The specified region of the same conductivity included in the first and second sets are p-regions, and areas included in the third set - n regions. The first and second sets contain the same number of p-regions: N1=N2. First, second and third sets contain the same number of p - and n-regions, respectively: N1=N2=N3.

The first and third sets contain the same number of p - and n-regions, respectively: N1=N3.

The second and third sets contain the same number of p - and n-regions, respectively: N2=N3.

The specified region of the same conductivity included in the first and second sets are n regions, and areas included in the third set - p-fields.

The first and third sets contain the same number is in n - and p-regions, respectively: N 1=N3.

The second and third sets contain the same number of n - and p-regions, respectively: N1=N2=N3.

First, second and third sets are n regions, and the third set contains the p-region.

A method of manufacturing a transistor includes a semiconductor material that contains the first set includes N1>1000000 regions of the same conductivity, the second set including N2>1000000 areas with the same conductivity, and the third set including N3>1000000 regions of opposite conductivity, which are made with the formation of the first set of separate homogeneous point p-n junctions between the regions of the first and third set and a second set of separate homogeneous point p-n junctions between the regions of the second and third sets, while the electrodes adjacent to the areas included in at least one of these sets, for which the condition Ni>1000000, where i∈{1, 2, 3}, connected in parallel with one of the conductor.

The specified region of the same conductivity included in the first and second sets are p-regions, and areas included in the third set, - n regions.

The first and second sets contain the same number of p-regions: N1=N2. The first is which and third sets contain the same number of p - and n-regions, respectively: N 1=N2=N3.

The first and third sets contain the same number of p - and n-regions, respectively: N1=N3.

The second and third sets contain the same number of p - and n-regions, respectively: N2=N3.

The specified region of the same conductivity included in the first and second sets are n regions, and areas included in the third set - p-fields. The first and second sets contain the same number of n-regions, respectively: N1=N2.

First, second and third sets contain the same number of n - and p-regions, respectively: N1=N2=N3.

The first and third sets contain the same number of n - and p-regions, respectively: N1=N3.

The second and third sets contain the same number of n - and p-regions, respectively: N2=N3.

In the transistor according to the invention, therefore, there are many possible different structural combinations of performance, for example:

- "mnogomotornye" transistor (for example, p-n-p). In this transistor emitter is made with the number of p-n junctions ("emitter-base") N1>1 (ideally N1→∞), one base with one p-n junction (collector-base) and one collector. While adjacent to the emitter of the p-regions electrodes through one wire the ICA connected in parallel in the circuit, converging into a single node;

- "mnogokollektornoi" transistor (p-n-p). This transistor is made the collector p-n junctions (collector-base) N2>1 (ideally N2→∞), one base and one emitter with a single p-n junction (emitter-base"). While adjacent to the collector of the p-regions of the electrodes are assembled in a parallel circuit, converging into a single node;

- "multibase" transistor (p-n-p). This transistor is fabricated base with the number of p-n junctions (collector-base) N3>1 (ideally N3→∞), one collector and one emitter with a single p-n junction (emitter-base"). While adjacent to the base of the n-regions of the electrodes are assembled in a parallel circuit, converging into a single node;

- "mnogovato-emitter-collector" transistor (p-n-p). In this transistor emitter is made with the p-regions and p-n junctions (emitter-base") N1>1 (ideally N1→∞), the collector p-regions N2>1 (ideally N2→∞) and the base with the n-regions and p-n junctions (collector-base) N3>1 (ideally N3→∞). Thus the electrodes, and adjacent to the base n-region, and the emitter of the p-region, and the collector of the p-regions are connected within the corresponding sets of p - or n-regions in parallel in the circuit, converging into a single node.

Possible other combinations and combinations of the base-collector-emitter or article is ka-gate-source. Thus, the smaller the p-n junctions and more will be the number of N p-n junctions with the adjacent p and n regions with electrodes of the base-emitter-collector in a parallel circuit, the more stable will be the electrical parameters and the greater will be the increased power, increased temperature stability, performance and operating frequency of the transistor. Ideally, to achieve a technical result of the invention, as noted above, the p-n junction must be infinitely small geometrical dimensions, i.e. they must be a point.

In particular, in "megaelectron" the transistor, the greater will be the number of N p-n junctions, the more charge carriers at the junctions of the emitter-base and the greater will be the gain of the collector current in the active mode of the transistor. In "megacollection" the transistor, the greater will be the number of N p-n junctions, the greater will be collected charge carriers at the electrode collector and thereby more increasing current in the external circuit of the transistor. In "multibase" transistor by increasing the number of p-n junctions "base-collector decreases the variance and increase the stability of the electrical parameters of the base (resistance, current and voltage), resulting in an ultra-stable and high-accuracy current-voltage characteristics of the transistor. In addition, this transistor increases the I its speed and operating frequency.

In "mnogovato-emitter-collector" transistor is changing all the parameters mentioned above: eliminates the variation of electrical parameters (inductance, resistance, input and output currents and voltages); all current-voltage characteristics of the transistor is perfectly stable; significantly increase all electrical characteristics (current, voltage and power); it significantly increases the resistance to temperature, electrical and frequency overloads.

In the above-described method for performing semiconductor transistor essentially through electrodes adjacent to the p-regions and n-regions, connected by one conductor in parallel circuit to one node, the internal resistance of p-n junctions with the p-regions and n regions of conductivity. Such an Association of separate and uniform p - and n-regions and the corresponding p-n junctions in a single node leads to unexpected effects in abnormally abrupt decline and elimination of the magnitude of the variation in the total resistance of the p-n junctions in semiconductor devices. This effect of abrupt reduction of the resistance in a parallel electrical circuit leads to the stability of the electrical parameters and increase power, temperature and frequency stability of a semiconductor transistor according to the invention the Result of a decrease in resistance from Ohm's law for parallel circuits. In our case, the internal resistance of p-n junctions connected in parallel electrical circuit, the total resistance of this circuit, assuming uniformity and individual constituent elements - resistance circuit is inversely proportional to the number of resistances in this circuit. And if such a parallel connection, when a large value of the number N of elements-resistance of the at least one p-n junction will be close to zero resistance value, or what is the minimum value, the electric current will follow the path of least resistance and the total resistance value of the law of the shunt will take a value less than the smallest value will approach zero.

The above set of parallel connected conductors is basically statistical sample (or beam) of N>1 elements. These elements of statistical sampling are p-n junction (p - and n-regions), having, as a rule, the large experimental scatter of the values of the resistances.

Assuming the current resolution of conventional photolithography, the size of the cells for the introduction of impurities and formation of p-n junctions can have 2-3 microns in diameter with a circular configuration. Accordingly, the area of p-n junction S will be limited to these dimensions. According the theory and experimentally observed data scatter is greater, the smaller the p-n junctions [1-4]. And the bigger the dispersion and the number N of p-n junctions, the greater the likelihood that a statistical sample will be p-n-transitions with small values of resistance R. In this statistical beam (or sample) of the resistance according to the law of large numbers, the variance decreases inversely proportional to the number of resistances, i.e. the greater the number N of p-n junctions, the smaller will be the variance of the values of resistance and stable electrical parameters of the device.

Therefore, according to our invention in semiconductor structures during their manufacture it is necessary to use a sufficiently large number of p-n junctions (ideally, their number should strive, as noted above, to the infinitely large number) with a sufficiently small geometrical dimensions.

Thus, to enhance the effect of the anomalous decrease of the resistance of the internal circuit of the semiconductor transition requires that the number of p-n junctions sought to the infinitely large number, i.e. N→∞, and that these transitions were separate, point, and size (in particular, the area S of each of the N p-n junctions would be small enough and ideally tends to zero, i.e. S→0. This condition correspond to point navigation.

In General, for the implementation of the technical result in the proposed method, manufactured by Garrett, Borg is of high precision CM GWh transistor must meet the following conditions for p-n junctions:

1) p-n-transitions must be separate (should be considered separately, i.e. they must be between unrelated),

2) p-n junction must be the same type (same, same) and made in the same technological conditions (must adhere to the principle of uniformity),

3) the number of p-n junctions should be large enough; for them shall be observed inequality N>1 (in the ideal case, N→∞),

4) the size of the p-n junctions should be minimal, in particular, the area of each p-n junction should strive for zero - S→0 (must adhere to the principle of minimality of the size of p-n junctions, i.e. it is preferable that the transitions were spot).

When these conditions are met in the transistor according to the invention (as will be shown below) impedance will tend to the minimum (zero) value. This is a consequence of the reduction of the active R (R→0), capacitive (C→0) and inductive L→0 component of the resistance of the p-n junctions. The value of the quality factor Q in such a transistor with an increasing number N→∞ p-n junctions is committed to a sufficiently large value. In General, therefore, the time constant τ=R·C of the transistor according to the invention decreases and tends to zero (τ→0). In the operating frequency of such a transistor will seek to infinitely large value (f→∞), and the temperature of the structural stability of electrical parameters will increase up to temperature, close to the temperature of adoption (diffusion) of impurities in a semiconductor crystal.

As the impedance decreases, the power will increase. Therefore, increasing the number N and reducing the size of the individual p-n junctions, it is possible to make any transistor high and hyperviscous the operating frequency f, very high output power Ptoon the header and ultra-high temperature stability of electrical parameters.

In accordance with modern technology [1-4], the statistical beam (cable, service etc) or just beam in the framework of the present invention should be understood multielement statistical structure formed from a number N>1 (where N is an integer) individual of the same type of individual constituent elements-resistors (in this case, the resistance of p-n junctions with p - and n-regions), United (United) parallel circuit through a single conductor in a single node two opposite current contacts or electrodes.

In the framework of the present invention under the same type are understood to be separate (not connected) p-n-transitions performed in the same way (same conditions) from the same materials using the same impurities in the same amounts), with essentially the same geometric size of the market, the configuration and shape and the same structure-sensitive physical (mechanical, electrical, electromagnetic and other) characteristics and properties. The case when all the p-n transitions are absolutely identical, preferred, but in practice difficult to achieve. In addition, under a separate p-n junctions refers to the separateness and isolation from each other (for example, any separator or insulator), each of p-n junctions is located separately (separately) from the other p-n junctions in the device.

Proof of the technical results in the elimination of the spread in the data and reduce the resistance and capacitance of p-n junctions in the invention presented in Fig.1-3. These figures are presented:

Figure 1. Comparative variation chart of the statistical distribution of the values of resistance R p-n junctions serial microwave semiconductor Schottky diodes (with a frequency of 10 GHZ) and a diode structures according to the invention: (N=1) and control samples of serial diodes with one p-n junction; (N=4) samples according to the invention with 4 separate homogeneous p-n transitions; (N=8) - diodes according to the invention with eight separate homogeneous p-n transitions; (N=1000), the diodes according to the invention with a number separate homogeneous p-n junctions 1000.

Figure 2. Comparative variational dia the programmes of the statistical distribution of the values of capacitance of p-n junction of the serial diode KD 522 (number of p-n junctions N=1) and performed according to the invention with a similar number of individual p-n junctions: N=4, 8, 12 and 1000.

Figure 3. The comparative static volt-ampere characteristics of the output of the serial transistor CT-315 G with N=2 p-n junctions: 1 emitter (N1=1), 1 base (N3=1), 1 reservoir (N2=1); number of individual transitions N=16 p-n junctions: 8 emitters (N1=8), 8 bases (N3=8), 8 collectors (N2=8) when the base currents Jb=8, 20, 30, 40 µa.

From figure 1, thus, it is clear that with a parallel connection of a number N>1 separate homogeneous p-n junctions with a single conductor in a single node, the total resistance R and the magnitude of the dispersion drastically reduced. If the values are, for example, N=1000 separate homogeneous p-n junctions, the resistance falls almost to zero, and the variance is completely eliminated. This accordingly leads to the stabilization and strengthening of all electrical parameters of semiconductor devices according to the invention: current, voltage, power.

From figure 2 it is seen that when combined in parallel circuit number N>1 separate homogeneous p-n junctions is reduced not only the resistance value, but also its capacity when the number of transitions N=1000 acquires a value of zero. The lack of capacity, an increase in the number of p-n junctions N due to a sharp drop in resistance in a parallel circuit p-n junctions, in which the accumulation of charges at the p-n junction which x does not occur i.e. formed at the junctions of parasitic charge, not accumulating, immediately goes into an external electrical circuit.

The experimental data shown in figures 1-2, obtained at different temperature and frequency domains: temperature ranging from -100°C to +300°C, and the frequency from 1 kHz to 1 GHz.

In figure 3 an example of the output volt-ampere characteristics (VAC) for industrial transistors KG 315 G and manufactured according to the invention with N=16 single homogeneous p-n junctions (with N1=8 p-n junctions "emitter-base", N3=8 p-n junctions "collector-base"). From figure 3 it can be seen that the output current-voltage characteristics for the serial transistor CT 315 G at different base currents Jbunstable, while mnogovershinnoe transistor according to the invention with N=16 output current-voltage characteristics perfectly stable. Similar results were obtained for the input I-V characteristics.

Thus, in the semiconductor device when combined in parallel circuit of N>1 p-n junctions with a single conductor in a single node is reduced dispersion and total internal resistance Raboutp-n junctions in this node, leading to an increase in the output power of the device. In addition, increased temperature stability, operating frequency and the quality factor q of p-n junctions. These effects and formed the basis of the method of manufacturing ultra TRANS the stores with an ultra-stable electrical parameters, able to work in conditions of temperature, power loads and frequency of exposure.

The invention is further illustrated by the specific example of implementation, SEE GWh-transistor with reference to the accompanying drawings.

Example 1. A method of manufacturing SEE GWh-transistor.

According to the invention serves beam SEE GWh-transistor circuit design is shown in figure 4-6.

The figures adopted the following conventions:

1 - electrode collector; 2 - electrode of the emitter; 3 - electrode base; 4 - dielectric; 5E, 5B, 5K - contact area of the emitter, base and collector; 6 - collector (n-layer); 7 - emitter (n-layer); 8 - base (p-layer); 9 - single homogeneous p-n junction.

Figure 4. Scheme design heavy duty beam GWh mnogoemitternom, base and collector (MAPK) transistor (section a-a).

Figure 5. Scheme design heavy duty beam GWh MAPK transistor (top view).

6. Scheme design heavy duty beam GWh MAPK transistor (bottom view).

When designing CM GWh transistor as the base model was taken bipolar serial UHF-transistor type TA - 5. This serial silicon transistor with an input power of 25 mW and an output power of 50 mW with an operating frequency of 12 GHz.

In the proposed version SMGC transistor design collector 6 consists of N2=1000 n-regions, adjoined on one side N=1000 electrodes 1, and on the other side - adjacent N3=1000 uniform (unrelated) p-n junctions "collector-base (Fig.4-6).

The emitter 7 is made of N=1000 n-regions with N1=1000 uniform (unrelated) point p-n junctions 9 (emitter-base), combined into a single current node with N=1000 electrodes 2 and pads (figure 4-5). To further reduce the capacitance With the conductive circuit are derived outside the emitter region.

Base 8 made of N=1000 p-regions adjacent to one side of the N3=1000 separate homogeneous p-n junctions 9 (collector-base), and on the other side adjacent N1=1000 separate homogeneous p-n junctions (base-emitter voltage). In addition, to the 8 adjacent N=1000 electrodes 3. Especially the performance of the base - pad (see figure 4-5) outside of the base in order to reduce the barrier and diffusion capacity, and the thickness of the base, so that charge carriers was transparent, reduced to 0.6-0.8 mm.

For the manufacture of the specified transistor uses a standard technology. For execution of the transistor is taken, for example, 100 mm standard plate-substrate thickness 270-300 microns of semiconductor material such as silicon p-type with polished surface.

Then all the operations o f the s on the substrate p-n junctions, conductive circuits, electrodes and connections are made using photolithography.

Technological cycle of successive operations is well known. To carry out the invention in semiconductor technology changes only the number of cells-Windows and their configuration under the p-n junction, the conductive circuit and the electrodes. In order to ensure that the design of the transistor according to the invention, it is necessary to increase the number of Windows under the p-n junction, for example, in 2000 time (i.e. the number of transitions N will be equal to 2000). Structurally, the template provides a conductive circuit connecting in parallel 1000 cells-Windows emitters and 1000 cells-Windows base. Thus, fabrication of a bipolar transistor according to the invention requires only minor changes: changed the design of the photomask, in particular the configuration and number of Windows. The photomask is made on the basis of the schematic design of the transistor (see figure 4-7). The above structure of the transistor impedance R and the capacitance value decreases to values close to 0.

Depending on the supply of the input signal and the number N of p-n junctions obtained devices with different specifications. Thus, the output power for N=16 p-n junctions is 4.8 watts, the operating frequency of 120 GHz. For the transistor, made of N=2000 p-Peregudov, the operating frequency is 600 Hz and the power depending on the current supply and voltage ranges from 60 to 300 watts. Transistors made according to the invention show high stability of electrical parameters, high temperature stability of electrical parameters above the base, within the measured values for temperatures up to +300°C.

Example 2. Special cases of the implementation of beam-type transistors. 7-9 show other types of beam transistors with different number of p-n junctions. Figure 7 presents the circuit design transistor with N1=4, N2=1, N3=4 (4 emitter 4 collector, one database), and Fig is a diagram of the structural design of the transistor with N1=4, N2=1, N3=4 (4 emitter 4 base 1 collector). To applicable laws MAPK transistors.

In conclusion, it should be noted that the above examples are presented only for a better understanding of the invention and its advantages, and in no way cover all possible instantiations of its implementation. For example we SEE GWh-transistor and the manufacturing method can be used not only in the power amplification and conversion GWh, but in the mode of generation, GWh, because the p-n junctions are at the same time as the processes of the produced electron-hole pairs, and recombination.

The effect of formation of electron-hole pairs we used above for the manufacture of the transistor, and the effect of recombination in this regard, can be used to generate different frequencies, including GWh and above.

Specialist in the art it is clear that there may be other specific options for its implementation, for example, photosensitive, or diodes and light-emitting diodes, thyristors or transistors with different (combinations of) p - and n-regions (in particular, instead of the p-n-p transistors can be performed similarly n-p-n transistors), and the use of other semiconductor materials, in particular, gallium arsenide, polymeric semiconductor materials, etc. in Addition, it is obvious that all these methods and variations, apparent to the specialist, do not go beyond the scope of claims of the present invention is defined only by the attached claims.

SOURCES of INFORMATION

1. Kartashov EM, Choi B., Shevelev CENTURIES Structural-statistical kinetics of destruction of polymers. Moscow: Chemistry, 2002. 736 S.

2. Tsoi Century, Kartashov E.M. and Shevelev V.V. THE STATISTIKAL NATURE AND LIFETIME IN POLYMERS AND FIBERS. Utrecht-Boston. Brill Academic Publishers / VSP. 2004, 522 p.

3. Choi B. About three scientific discoveries associated with the phenomenon of discontinuity. Moscow, Mir-Chemistry, 2004, 208 S.

4. Choi B., Lavrent'ev V.V. basis for the creation of materials with ultra-high physical ha what acteristically. Moscow, Energoatomizdat, 2004, 400 S.

5. Ginzburg V.L. / Superconductivity: the day before yesterday, yesterday, today, tomorrow. // Uspekhi Fizicheskikh nauk. 2000, vol 170, No. 6, s-630.

1. Transistor containing a first set including N1>1000000 regions of the same conductivity, the second set including N2>1000000 areas with the same conductivity, and the third set including N3>1000000 regions of opposite conductivity, made with the formation of the first set of separate homogeneous point p-n junctions between the regions of the first and third sets and the second set of separate homogeneous point p-n junctions between the regions of the second and third sets, while the electrodes adjacent to the areas included in at least one of these sets, for which the condition Ni>1000000, where i∈{1, 2, 3}, connected in parallel through a single conductor, i.e. combined into a single current node.

2. The transistor according to claim 1, characterized in that the region of the same conductivity included in the first and second sets are p-regions, and areas included in the third set - n regions.

3. The transistor according to claim 2, characterized in that the first and second sets contain the same number of p-regions: N1=N2.

4. The transistor according to claim 2, characterized in that PE is the first, the second and third sets contain the same number of p - and n-regions, respectively: N1=N2=N3.

5. The transistor according to claim 2, characterized in that the first and third sets contain the same number of p - and n-regions, respectively: N1=N3.

6. The transistor according to claim 2, characterized in that the second and third sets contain the same number of p - and n-regions, respectively: N2=N3.

7. The transistor according to claim 1, characterized in that the region of the same conductivity included in the first and second sets are n regions, and areas included in the third set - p-fields.

8. The transistor according to claim 7, characterized in that the first and third sets contain the same number of n - and p-regions, respectively: N1=N3.

9. The transistor according to claim 7, characterized in that the second and third sets contain the same number of n - and p-regions, respectively: N2=N3.

10. The transistor according to claim 1, characterized in that the first and second sets are n regions, and the third set contains the p-region.

11. A method of manufacturing a transistor including a semiconductor material containing the first set includes N1>1000000 regions of the same conductivity, the second set including N2>1000000 areas with the same what roudinesco, and the third set including N3>1000000 regions of opposite conductivity, which are made with the formation of the first set of separate homogeneous point p-n junctions between the regions of the first and third sets and the second set of separate homogeneous point p-n junctions between the regions of the second and third sets, while the electrodes adjacent to the areas included in at least one of these sets, for which the condition Ni>1000000, where i∈{1, 2, 3}, connected in parallel with one of the conductor.

12. The method according to claim 11, wherein the specified region of the same conductivity included in the first and second sets are p-regions, and areas included in the third set - n regions.

13. The method according to item 12, wherein the first and second sets contain the same number of p-regions: N1=N2.

14. The method according to item 12, wherein the first, second and third sets contain the same number of p - and n-regions, respectively: N1=N2=N3.

15. The method according to item 12, wherein the first and third sets contain the same number of p - and n-regions, respectively: N1=N3.

16. The method according to item 12, wherein the second and third sets contain the same number of p - and n-wher is th respectively: N 2=N3.

17. The method according to claim 11, wherein the specified region of the same conductivity included in the first and second sets are n regions, and areas included in the third set - p-fields.

18. The method according to 17, characterized in that the first and second sets contain the same number of n-regions: N1=N2.

19. The method according to 17, wherein the first, second and third sets contain the same number of n - and p-regions, respectively: N1=N2=N3.

20. The method according to 17, characterized in that the first and third sets contain the same number of n - and p-regions, respectively: N1=N3.

21. The method according to 17, characterized in that the second and third sets contain the same number of n - and p-regions, respectively: N2=N3.



 

Same patents:

FIELD: semiconductor engineering.

SUBSTANCE: high-power semiconductor device 10 has active region incorporating drift area 20. At least part of drift area 20 is disposed in membrane 16 that has upper and lower surfaces 15 and 17 opposing one another. Upper surface 15 of membrane 16 in one of alternatives has power leads connected thereto directly or mediately to enable crosswise voltage application through drift area 20. As an alternative, at least one power lead is connected directly or mediately to upper surface 15 and at least one power lead is connected directly or mediately to lower surface 17 enabling vertical application of voltage through drift area 20. Lower surface 17 of membrane 16 has no semiconductor substrate in immediate proximity of this surface in each of mentioned alternatives.

EFFECT: improved design.

40 cl, 43 dwg

The invention relates to a storage device of a high integration degree and method of their manufacture

The invention relates to a power semiconductor technology

The invention relates to semiconductor technology, in particular to the technology of epitaxial structures for semiconductor devices

The invention relates to a solid state microwave devices and UHF ranges, intended for the protection of sensitive input circuits of electronic receivers

FIELD: physics.

SUBSTANCE: invention is related to the field of nanomaterials application. It is suggested to use carbon of bulbous structure as sensitive element of detector in terahertz range of waves that absorbs electromagnet radiation (EMR) in the range of frequencies of 30 - 230 THz.

EFFECT: improved performance characteristics.

3 dwg

FIELD: chemistry.

SUBSTANCE: invention refers to the high-strength epoxide composition used for impregnation at production of high-strength glass-, carbon,- organic-, and boron plastics working in the wide temperature range and used in different industrial sectors (machinery construction, shipbuilding, aircraft and space industries, for production of the parts of complicated configuration e.g. thin- and thick-walled casings). The invention refers also to the method for preparation of the said composition including the following components (weight parts): 10-100 - diglycidyl resorcinol ether, 10-100 - product of epichlorohydrin condensation with triphenol, 6-12 - oligoether cyclocarbonates with mass ratio of cyclocarbonate groups in the range from 18 to 29, 28-50 - curing agent (primary aromatic amine), 0.5-2.5 - curing agent (tertiary amine), 0.25-1.25 - mixture of carbon and silicate nanomaterials. The mass ratio of diglycidyl resorcinol ether to product of epichlorohydrin condensation with triphenol is in the range from 1 : 9 to 9 : 1. Metaphenylen diamine or 4,4'-diaminodiphenylmethane or their eutectic mixtures in ratio from 40 : 60 to 60 : 40 are used as primary aromatic amine. Mono-, di and trimethylsubstituted pyridine or monovinylsubstituted pyridine are used as tertiary aromatic amine. The carbon nanomaterial is fullerene C2n, wherein n is no less than 30, the silicate nanomaterial is organobentonite, the fullerene : organobentonite ratio is in the range from 1 : 3 to 3 : 1. The method of composition preparation consists in stirring of nanomaterials mixture with oligoether cyclocarbonates by ultrasonic action at frequency 22-44 kHz during 30-45 min. Then the obtained suspension is mixed with beforehand prepared mixture of diglycidyl resorcinol ether and product of epichlorohydrin condensation with triphenol. After that the curing agent in the form of aromatic primary and tertiary amine mixture is added. The ready composition is cured in step mode with maximal curing temperature 155°C.

EFFECT: invention allows obtaining of the composition with high physical, mechanical and dissipative properties.

2 cl, 2 tbl, 6 ex

FIELD: construction.

SUBSTANCE: invention is related to the field of construction, namely to the field of construction works with application of water cement systems, and may be used in construction and repair works with application of concrete or mortar based on water-cement mixture. Method for control of setting and hardening processes in water-cement systems includes mixing of cement and water with previous treatment of water with acoustic oscillations with frequency from 17.5 to 22.5 kHz until level of energy introduced in water is from 3.0 to 40 kW-hr per 1 m3 of water. Invention is developed in dependent clauses.

EFFECT: expansion of facilities for effect at water-cement mixtures in process of their setting and hardening.

8 cl, 9 ex

Masonry mortar // 2363679

FIELD: construction.

SUBSTANCE: invention is related to masonry mortars and may be used for making structures out of bricks, concrete stones and light rock stones. Masonry mortar contains cement, filler, additive in the form of nano-catalysts and water. Filler used is fly ash created in gas treatment systems during sand drying, as nano-catalysts - carbon tubes or fullerenes at the following ratio of components: cement - 400 kg/cub.m; fly ash - 1250 kg/cub.m; nano-catalysts - 0.02 kg/cub.m; water - 340 kg/cub.m.

EFFECT: increased strength and frost resistance of masonry mortar.

1 tbl, 1 ex

FIELD: chemistry.

SUBSTANCE: invention relates to versions of transparent composition, applied, for instance, as under crystal filler, to solid-body device, and to method of transparent composition production. According to first version transparent composition contains, at least, one hardened aromatic epoxy resin, at least, one solvent, filler, and at least, one component selected from group including cycloaliphatic epoxy monomer, aliphatic epoxy monomer, hydroxyaromatic compounds and their combinations and mixtures. Filler represents colloidal silicon dioxide, functionalised with organosiloxane, and has particle size from 20 nm to 100 nm. If necessary, composition contains, at least, one component, selected from group including epoxy resins, acrylate resins, polyimide resins, fluoropolymers, benzocyclobutene resins, bismaleimide triazine resins, fluorinated polyallyl ethers, polyamide resins, polyimidoamide resins, phenolic cresol resins, aromatic polyester resins, resins of polyphenylene ester and polydimethylsiloxane resins. According to second version composition of under crystal filler contains cresol-novolac epoxy resin, at least, one component selected from group including cycloaliphatic epoxy resin, aliphatic epoxy resin, hydroxyaromatic compounds and their mixtures and combinations, at least, one solvent, dispersion of functionalised colloidal silicon dioxide, which has size of solid particles from 50 nm to 100 nm, and, at least, one catalyst. Solid-body device contains crystal, padding and transparent hardened composition of filler, located between crystal and padding. Filler composition contains, at least, one aromatic epoxy resin, dispersion of functionalised colloidal silicon dioxide, at least, one solvent, and, at least, one component selected from group including cycloaliphatic epoxy monomer, aliphatic epoxy monomer, hydroxyaromatic compounds and their combinations and mixtures. Functionalised colloidal silicon dioxide has size of solid particles from 50 nanometers to 100 nanometers. Method of manufacturing transparent under crystal filler composition includes the following stages. First, colloidal silicon dioxide is functionalised. Stable concentrated dispersion of functionalized colloidal silicon dioxide, with solid particle size from 50 nm to 100 nm, containing from 15 wt % to 75 wt % of silicon dioxide, is formed. Aromatic epoxy resin solution is mixed with, at least, one component, selected from group including cycloaliphatic epoxy monomer, aliphatic epoxy monomer, hydroxyl aromatic compounds and their mixtures and combinations, in solvent, with dispersion of colloidal silicon dioxide. Further solvent is removed and filler composition is hardened.

EFFECT: reduction of composition heat expansion coefficient and increase of temperature of its vitrifying.

9 cl, 6 tbl, 9 ex

FIELD: chemistry.

SUBSTANCE: invention refers to the preparation of the materials for ferroelectric ceramics used in electronics. The method includes the hydrolysis of rare metal compound with formation of rare metal precipitate which is then separated and suspended. The compound of the alkali or bivalent metal is fed into suspension at pH 5.5-13 and temperature 71-95°C. The suspension is vigorously mixed during 15 min or more at the value of Reynolds criterion (8-20)·104. The ferroelectric powder is washed and dried at the temperature 40-95°C. The rare metal compounds are compounds of titanium, zirconium, tantalum or niobium in the form of fluorides, chlorides, sulphates or phosphates. The alkali metals compounds are used in the form of hydroxides, chlorides, nitrates or sulphates. The bivalent metals compounds are compounds of barium or strontium in the form of hydroxides, nitrate, chlorides, sulphates as well as lead nitrate.

EFFECT: providing of the particle size control of the nanodimensional powders of the titanates, zirconates, tantalates or niobates of mono- and bivalent metals and obtaining of stoichiometric powders with narrow grading and saving of monophasity

8 cl, 10 ex

FIELD: nanotechnologies.

SUBSTANCE: invention relates to quantum electronics. Solid-state silicon nanostructures intended for lasers and optical amplifiers are formed by consecutive application of silicon oxides layers on silicon body. Resulted structure is subjected to annealing in nitrogen atmosphere. This allows the silicon monoxide layers transform into the silicon nanocrystal layers separated by those of silicon dioxide. Erbium ions are implanted into the formed structure silicon dioxide layer for the structure to be subjected again to annealing. Above described silicon nanostructure can be used for laser and optical amplifier optical pumping out.

EFFECT: laser and optical amplification in solid-state and silicon nanostructures.

5 cl, 3 dwg

FIELD: nanotechnologies.

SUBSTANCE: invention relates to micro system hardware, and can be used in producing sensors based on tunnel effect to convert displacement into electric signal in monitoring data processing systems that serve to forecast, diagnose and control the effects of impact waves and acoustic oscillations exerted onto various structures, vehicles, industrial buildings and structures, as well as to control temperature, develop supersensitive mikes and medicine hardware. In compliance with this invention, the sensor cantilever electrode represents a bimorph beam made up of consecutively formed layers differing in thermal expansion factors. Note that the lower layer thermal expansion factor is lower as compared with that of the upper layer. Note also that the tunnel electrode represents a bundle of nanotubes. The proposed nanosensor incorporates thin-film heater to allow desorption of low-molecular substances, precision alignment of tunnel gap and formation of nanotubes after removal of "sacrificial" service layer.

EFFECT: increased sensitivity, vibro- and impact resistance, manufacturability and reproducibility, lower costs of manufacture.

2 cl, 3 dwg

FIELD: technological processes.

SUBSTANCE: composition hardened with the help of radiation includes abrasive grain and binders. Binder contains from 10 wt % to 90 wt % of cation-polymerised composition, not more than 40 wt % of radical-polymerised composition and from 5 wt % to 80 wt % of powder filler in conversion to binder weight, and powder filler contains dispersed submicron particles. Abrasive products containing different composite binding materials are described, and also methods for manufacture of abrasive products.

EFFECT: improved working characteristics of abrasive products, prolonged service life.

158 cl, 3 dwg, 5 tbl, 5 ex

Nano-marker // 2361270

FIELD: physics; alarms.

SUBSTANCE: invention relates to nanotechnology and control systems, in particular, for determining and controlling location of objects. The nano-marker contains a processor module, display, marking element, identification device and a receiving device, made in form of a narrow-band receiver, which receives a response signal from a mark, an ultrasound detector, which identifies a signal from a passive mark using frequency and intensity, characterising ultrasonic oscillations of the specific mark made, and which are the code of the marked object. The identification device is provided with a unit for comparing standard frequency for the ith object, recorded in the data base of the processor module, and frequency of the received response signal from the passive mark, as well as intensity of a signal, received from each ith mark with its threshold value. The nano-marker is also provided with one or several containers with an adhesive mixture of filler and substance with magnetostrictive properties, containing a stepless dosing device for the adhesive mixture. After solidification, the adhesive mixture forms a passive mark in form of a crystal, and that way, the mark is a nano-mark.

EFFECT: design of a portable, compact marker for easy marking and identifying objects.

21 cl, 1 dwg

Magnetic materials // 2244971

FIELD: magnetic materials whose axial symmetry is used for imparting magnetic properties to materials.

SUBSTANCE: memory element has nanomagnetic materials whose axial symmetry is chosen to obtain high residual magnetic induction and respective coercive force. This enlarges body of information stored on information media.

EFFECT: enhanced speed of nonvolatile memory integrated circuits for computers of low power requirement.

4 cl, 8 dwg

FIELD: electronic engineering.

SUBSTANCE: proposed substance related to materials acting on electromagnetic fields so as to control and change them and can be used for producing materials with preset optical, electrical, and magnetic characteristics has in its composition active-origin carrier in the form of clusters of atoms, nanoparticles, or microparticles, its insulating function being checked in the course of manufacture; this function is characteristic controlling interaction between substance and electromagnetic field.

EFFECT: improved characteristics of heterogeneous substance.

25 cl

FIELD: optics; coherent electromagnetic radiation systems.

SUBSTANCE: novelty is that metal, such as silver, nanoparticles whose plasma resonance frequency is close to frequency of transfer of mentioned active particles to inverted population level are additionally placed in prior-art amplifier on quantum (active) points.

EFFECT: enhanced gain for low and high strengths of fields being amplified.

1 cl, 2 dwg, 1 ex

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