Device for controlling short term mismatches in pulse trains

FIELD: computer engineering.

SUBSTANCE: invention relates to computer engineering and can be used in digital automatic systems. The technical outcome allows for quantitative measurement of the degree of short term mismatch between pulses. The device contains pulse formers (1-4), AND elements (5-7), OR elements (8 and 9), delay elements (10-12), RS flip-flops (13 and 14), standard frequency generator (15), pulse counter (16), memory register (17), input (18) for the first controlled pulse train and input (19) for the second controlled pulse train. The newly introduced AND element (7), delay elements (10-12), RS flip-flop (13 and 14), generator (15), pulse counter (16) and register (17) allow for achieving the said technical outcome.

EFFECT: increased functionalities of the control device.

2 dwg

 

The invention relates to computing and radar systems and can be used for digital processing of radar signals, converted to videospussy.

A device for control of temporary mismatches between points of zero crossing of two sinusoidal signals on the author's certificate of the USSR No. 435520, CL G06F 17/04, 1970, contains two pulse shaper element OR the five elements And two trigger and the Converter of the time interval in the code.

Signs of this analogue, coinciding with the essential features of the claimed device are two pulse shaper element OR three element And two triggers.

A disadvantage of this device is the low reliability of testing results.

It is also known a device for controlling temporal errors of pulse sequences according to the author's certificate of the USSR No. 1605235, CL G06F 11/16, 1989, contains four pulse shaper, the three elements, the element OR, counting the trigger and two trehshipovyh D-flip-flop.

Signs of this analogue, coinciding with the essential features of the claimed device are four pulse shaper, the three elements, the element OR counting the trigger.

The disadvantages of this device are due to the presence in the composition of the device is TBA D-flip-flops complexity and relatively low reliability.

The closest to the technical nature of the claimed (prototype) is a device for monitoring temporal errors of pulse sequences according to the patent of Russian Federation №2024926, CL G06F 11/16, NC 5/19, 1991, containing five pulse shapers, two elements And two elements and counting OR trigger in which the first and second inputs of the first element OR connected to the outputs respectively of the first and second pulse shapers, the input of the third pulse shaper connected to the first input device and the output with the first input of the first element And the fourth input of the pulse shaper is connected with the second input device, and the output to the first input of the second element And the inputs of the first and second pulse shapers are connected respectively with the first and second input devices, the second outputs of the first and second elements And is connected to the outputs respectively of the second and first pulse shapers, the first input of the second element OR is connected to the output of the first element And the first output, the second input with the output of the second element And the second output device and the output to the input of the reset counting trigger a counting input connected to the output of the first element OR the input of the fifth pulse shaper connected to the output of the counting trigger, and the output from the third output device is Ista.

The characteristics of the prototype, coinciding with the essential features of the claimed device are four pulse shaper, two elements And two OR element.

The disadvantages of this device, inherent and devices by author's certificates of the USSR No. 435520 and 1605235 are limited functionality. The fact that both of these devices provide only quality control temporary mismatch between pulse sequences, that is, ahead of the first sequence second or behind it. At the same time, in practice often need to know the quantitative evaluation of this ahead of (or behind). These analogues of the inventive devices provide only a very rough estimate of temporary mismatch, i.e. determine, it is the half-period pulse or not. Therefore there is a need for more accurate quantitative measurement of the extent of the temporary misalignment between the input device pulses.

The task, which directed the creation of the invention is to expand the functionality of the monitoring device by providing a possible quantitative measure of temporary error.

The technical result is achieved by the fact that in the known device in the Eden third element, And three delay elements, two RS-trigger oscillator reference frequency, the pulse counter and the memory register, the first input of the third element And is connected to the generator output of the reference frequency, the second output of the second OR element, and the output from the counting input of the counter pulses, the first delay element connected between the inverted output of the second RS-flip-flop and the second input of the first element And the second delay element connected between the inverted output of the first RS-flip-flop and the second input of the second element And the third delay element connected between the output of the first element OR the input of the reset pulse meter, S input of the first RS-flip-flop connected to the output of the first element And R is the input - output of the fourth pulse shaper, and direct the output to the first input of the second element OR S-input of the second RS-flip-flop connected to the output of the second element And R is the input - output of the third pulse shaper, and direct the output to the second input of the second element OR the inputs of the first and second pulse shapers connected with inverted outputs, respectively, of the first and second RS-flip-flops, the first and second information inputs of the memory register connected to the output of the first or second delay elements and with the output of the pulse counter, respectively, and control input - output of the first OR element.

To achieve t the economic result in the known device for monitoring temporal errors of pulse sequences, contains four pulse shaper, two elements And two elements OR in which the first and second inputs of the first element OR connected to the outputs respectively of the first and second pulse shapers, the input of the third pulse shaper connected to the first input device and the output with the first input of the first element And the fourth input of the pulse shaper is connected with the second input device and the output with the first input of the second element And entered the third element And three delay elements, two RS-trigger oscillator reference frequency, the pulse counter and the memory register, the first input of the third element And connected to the generator output of the reference frequency, the second output of the second OR element, and the output from the counting input of the counter pulses, the first delay element connected between the inverted output of the second RS-flip-flop and the second input of the first element And the second delay element connected between the inverted output of the first RS-flip-flop and the second input of the second element And the third delay element connected between the output of the first element OR the input of the reset pulse meter, S-input of the first RS-flip-flop connected to the output of the first element And R is the input - output of the fourth pulse shaper, and direct the output to the first input of the second element OR S-input of the second RS-flip-flop coupled to the output storageelement And R-entrance - with the release of the third pulse shaper, and direct the output to the second input of the second element OR the inputs of the first and second pulse shapers connected with inverted outputs, respectively, of the first and second RS-flip-flops, the first and second information inputs of the memory register connected to the output of the first or second delay element and the output of the pulse counter, respectively, and control input - output of the first OR element.

The combination of the newly introduced elements and connections not obvious from the prior art, therefore, the proposed device should be considered to be new and involve an inventive step.

The invention is illustrated by drawings.

Figure 1 - structural diagram of the device;

figure 2 - timing diagram explaining the operation of the device, while the number on each of the diagrams is equal to the element number of the structural scheme, the output of which shows the signal on this chart, and the number with a dash means the signal at the inverted output of the RS-trigger.

The device contains conditioners 1-4 pulses, items 5-7 And the elements 8 and 9, OR, the elements 10-12 delay, RS-triggers 13 and 14, the generator 15 of the reference frequency counter 16 pulses, the register 17 of the memory, the input 18 of the first controlled pulse sequence and the input 19 of the second controlled pulse the sequence.

The input of the shaper 1 is connected to the input device 18, and the output from the first input unit 5 And the R-input of the trigger 14. The input of the driver 2 is connected to the input device 19, and the output from the first input element 6 And the R-input of the trigger 13. S-input of the trigger 13 is connected with the output element 5 And direct the output to the first input element 8 OR and inverted output directly to the input of the shaper 3, and through the delay element 11 with the second input element 6 I. S-input of the trigger 14 is connected with the output element 6 And direct access to the second input element 8 OR and inverted output directly to the input of the shaper 4, and through the delay element 10 to the second input unit 5 I. the First input element 7 And is connected to the output of the generator 15 reference frequency, the second output element 8 OR, as the output from the counting input of the counter 16, the input reset through the delay element 12 is connected to the output element 9 OR the control input of the register 17 of the memory, and the output from the second information input of the register 17 of the memory. The first information input of the register 17 of the memory is connected to the output of one of the elements 10 or 11 delay (in the diagram in figure 1 it is connected to the output element 11). The first and second inputs of the element 9 OR connected to the outputs of the formers 3 and 4, respectively.

The device operates as follows.

In the initial state, the counter 16 Obol is h, and on direct outputs of the triggers 13 and 14 are signals of logic level zero (chain installation not shown).

Pulses, the temporal misalignment between which is subject to control, proceed to the inputs 18 and 19 of the device to the inputs of the formers 1 and 2, respectively. The formers 1 and 2 on the leading edge of the received at their inputs the signals form on their outputs short pulses (time t1and t2if the pulse at the input 18 is ahead in time of the pulse at the input 19, and the moments of t3and t4- otherwise).

Consider first the operation of the device when the controlled pulse at the input 18 appears earlier than at the inlet 19. This occasion correspond to the timing diagram on figa. In this situation, at time t1the trigger 14 of its state does not change. The element 5 is open on the second input signal level logical units that passed through the element 10 with the inverted output of the trigger 14. Therefore, the pulse from the output of the imaging unit 1 passes through the element 5 on the S-input of the trigger 13, resulting in the latter is thrown. On his direct output of a signal level of the logical unit, which through the element 8 is supplied to the second input element 7. The generator 15 generates short pulses of the reference frequency with the level of logical units, the cat is who receives at the first input element 7. These pulses passing through the element 7 is opened by the second input signal level of the logical unit with the output element 8, proceed to the counting input of the counter 16. The counter 16 starts counting of the time interval elapsed from the time t1receipt of the pulse on the input device 18. In addition, at time t1under the action of a signal with a logic level zero with inverted output of the trigger 13 which has passed through the element 11 to the second input element 6, the latter is closed for the passage of the pulse shaper 2.

The process of the pulse generator 15 counter 16 continues until time t2receipt of the pulse on the input device 19 and the formation of a short pulse shaper 2. The delay Δt of the elements 10 and 11 is the lowest available, but sufficient for the passage of a short pulse through the elements 5 and 6, respectively, so the time t2element 6 remains closed on the second input, and the pulse shaper 2 on the S-input of the trigger 14 fails, the trigger 14 remains in its original state. The pulse shaper 2 is supplied to the R-input of the trigger 13. The trigger 13 is thrown to its original state. At its direct output, and hence the output element 8 a signal of logic level zero, the element 7 is closed by the second input is, and the pulse generator 15 are being sent to the counting input of the counter 16. As a result, the time t2in the counter 16 is formed by a number proportional to the temporal mismatch t2-t1between the pulses at the inputs 18 and 19 of the device. The code number from the output of the counter 16 is supplied to the second information input of the register 17. The first information input of the register 17 with the output element 11 at the time t2a signal of logic level zero, corresponding to the sign of the temporary misalignment between the controlled pulses. At the same time t2under the action of the positive differential signal on the inverted output of the trigger 13, the imaging unit 3 generates a short pulse, which passes through the element 9 to the control input of the register 17. Under the action of this pulse in the memory register 17 provides information with its information inputs. Thus, in the register 17 is recorded information about the sign and magnitude of the temporary misalignment between the controlled pulses at the inputs of the device. The pulse from the output element 9, in addition, through the element 12, the delay time Δt which is selected sufficient to record the information in the register 17, is input to the reset of the counter 16, resulting in the counter 16 is reset to zero.

Next cycle powerjets is.

If a controlled pulse at the input 18 occurs later than at the inlet 19, the operation of the device proceeds as described. This occasion correspond to the timing diagrams figb. The difference is only that in this case has a trigger 14, and using elements 10 and 5 are prevented from passing on the S-input of the trigger 13 short pulse shaper 1 and the transfer trigger 13. The element 7 at time t3opens on the second input signal level logical units with direct access to the trigger 14, the counter 16 counts the number of pulses of the generator 15 that fit in the time interval t3-t4on the first information input of the register 17 at time t4supplied with the output element 11, the signal level of logical units, and record the information in the register 17 is carried out at time t4under the action of the short pulse generated by the imaging unit 4 in the positive differential signal on the inverted output of the trigger 14.

It is easy to see that in the inventive device is controlled not only sign a temporary mismatch between the input sequences, but also a quantitative measure of the magnitude of this error, which significantly extends its functionality compared to the prototype.

Thus, the technical result achieved in the proposed device, is expanding the functionality of the device by providing a possible quantitative measure of temporary mismatch between pulses.

The inventive device quite easily realizable on the basis of integrated circuits series 530, 533 (see, for example, Wllile. Popular TTL chips. - M.: The Argus. - 1993).

Device for controlling temporal errors of pulse sequences containing four pulse shaper, two elements And two elements OR in which the first and second inputs of the first element OR connected to the outputs respectively of the first and second pulse shapers, the input of the third pulse shaper connected to the first input device and the output with the first input of the first element And the fourth input of the pulse shaper is connected with the second input device and the output with the first input of the second element, And characterized in that it introduced the third element And three delay elements, two RS-flip-flop, generator reference frequency, the pulse counter and the memory register, the first input of the third element And is connected to the generator output of the reference frequency, the second output of the second OR element, and the output from the counting input of the counter pulses, the first ele is UNT delay is included between the inverted output of the second RS-flip-flop and the second input of the first element And a second delay element connected between the inverted output of the first RS-flip-flop and the second input of the second element And the third delay element connected between the output of the first element OR the input of the reset pulse meter, S-input of the first RS-flip-flop connected to the output of the first element And R is the input - output of the fourth pulse shaper, and direct the output to the first input of the second element OR S-input of the second RS-flip-flop connected to the output of the second element And R is the input - output of the third pulse shaper, and direct the output to the second input of the second element OR the inputs of the first and second pulse shapers connected with inverted outputs, respectively, of the first and second RS-flip-flops, the first and second information inputs of the memory register connected to the output of the first or second delay element and the output of the pulse counter, respectively, and control input - output of the first element OR.



 

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