Device for transmitting data between a computer and peripheral devices, made in form of universal serial bus

FIELD: computer engineering, namely, local computer networks, in particular, home networks based on universal serial buses.

SUBSTANCE: device for data transmission contains a cable with signal lines, power buses, microchip of computer controller which generates commands which determine operation of peripheral device, microchip of device controller which control directions of streams of data being transmitted, positioned in a peripheral device, two microchips of transformers of signal levels from contacts of control microchips, four circuits for correction of transfer characteristic of signal lines of cable, four matched loads, two stabilizer circuits and four filters meant for reduction of power noise.

EFFECT: removed limitation on length of used cable, possible usage of various types of cables without necessity to develop expensive microchips for repeaters each time, which have functions of double purpose: matching of impedance of cable and controllers and transformation of levels of signals from outputs of controller microchips.

5 dwg

 

The invention relates to computing, and in particular to the field of local area networks for universal serial buses.

Known serial bus data intended for a peripheral device type mouse, keyboard, printer, modem and hard disk [1].

It is also known a device for data transmission between a computer and peripheral devices, made in the form of universal serial bus, includes cable with signal lines, power rails and connectors on the ends for connecting peripheral devices to a personal computer, a controller chip that generates commands that define the operation of peripheral devices, and chip located in the peripheral device [2].

The disadvantages of these devices for connection of a personal computer peripheral devices are:

- restrictions on the length of the packet of digital information,

- high complexity, due to the complexity of the electrical signal repeaters,

- high complexity, due to the presence of devices - splitters cables.

Closest to the invention is a device for data transmission between a computer and peripheral devices [3], made in the form of a universal serial bus include the cable from the signal lines, power rails and connectors on the ends for connecting peripheral devices to a personal computer, a controller chip computer that generates commands that define the operation of peripheral devices, the controller chip device that controls the directions of flows of the transferred data that is located in the peripheral device, which contains at least two circuits of the repeater, the first and second external electrodes are connected to the outputs of the circuits of the controllers, and the third and fourth external electrodes connected to the cable, the termination impedances of the cable and controllers and converts the signal levels of the output circuits of controllers located in a personal computer and a peripheral device, to ensure their transmission cable without reflection signals in it.

Functional diagram of the device according to the prototype [3] for data transmission between a personal computer and a peripheral device illustrated in figures 1 and 2.

Device for transferring data between the personal computer 1 of the peripheral devices 2, shown in figure 1 and selected as a prototype, made in the form of universal serial bus, includes cable with signal lines 3 and 4, a power bus (not shown) and connectors 5 and 6 at the ends to connect periphery the explosive device with a personal computer, the controller chip 7 computer that generates commands that define the operation of peripheral devices, the controller chip 8 device that controls the directions of flows of the transferred data that is located in the peripheral device 2. The device further comprises two identical circuits 9 and 10, a functional block diagram of which is shown in figure 2. The first chip 11 and second 12 external electrodes connected to the output circuits of the controllers 7 and 8, and the third 13 and fourth 14 external electrodes with the signal lines 3 and 4 of the cable. Chip 9 and 10 agree the impedances of the cable and controllers and convert the levels of the signals from the output circuits of the controllers 7 and 8, located in the personal computer 1 and the peripheral device 2, for transmission over the cable without reflection.

As shown in figure 2, each additional chip 9 and 10 includes first and second receivers 15 and 16, the United differential inputs, respectively, with the first 11, second 12, third 13 and fourth 14 external electrodes of the chip 9 and 10, and the outputs to the inputs respectively of the first and second transmitter 17 and 18, which are differential outputs connected to the third 13 and fourth 14, the first 11 and second 12 external electrodes of the chip 9 and 10. Chip 9 and 10 contain the timer device 19 connected to the logs of the mini-block 20, the inputs of which are connected to the outputs of the receivers, and outputs to the control inputs of the first and second transmitters 17 and 18, for generating transmitter signals permit data transmission to the external electrodes 11, 12, 13, 14 circuits 9 and 10.

Analysis of technical solutions, declared in the prototype [3], shows that it does not completely eliminate the disadvantages of the known devices used for connection of a personal computer peripheral devices.

So serious disadvantage of the device, as claimed in the prototype [3], is a fundamental limitation of the length of the communication lines 3 and 4 in the device data by the value of the order of 25 meters Is due to the fact that the prototype is not taken into account:

1) the transient response of the signal line cable section is very slow rise near stationary values, which leads to a significant impact on the distortion of the pulse shape of the signals into digital packets of information and, as a consequence, a significant increase in jitter (deviation indicative of signal sites from their desired position in time),

2) the voltage drop on the power bus, resulting in increased jitter digital signals,

3) not taken into account the effect of noise on the amount of jitter at longer signal line cable.

In the prototype is not provided with the agreement in full of the amount of wave resistance of the cable with IC output - relay due to real variations of the resistors in the technology of integrated circuits.

In addition, limit the types of cables and their parameters. Chip repeaters must be developed for each nominal value of the wave resistance of the cable.

The problem to which the invention is directed, is the achievement of the technical result consists in increasing the length of the cable used, up to the value limited only by the Protocol of data exchange (response) in the serial bus in accordance with the specification of this bus, and the ability to use different types of cables without the necessity to develop costly chip relay functions dual-purpose - matching impedance of the cable and controllers and conversion levels of the signals from the output circuits of the controller, due to:

- use simple, universal chip converters, suitable for any type of cables that perform one function for converting signal levels of the output circuits of the controllers

- inclusion in the device of the four correction circuits transient response of the signal lines of the cable, the four agreed loads, two schemes stabilizers and four filters intended for slimming the noise power.

To achieve the mentioned technical result in the device to transfer data between your computer and peripheral devices [3], made in the form of universal serial bus, includes cable with signal lines, a power bus, the controller chip of the computer that generates the commands that define the operation of peripheral devices, the controller chip device that controls the directions of flows of the transferred data that is located in the peripheral device

extras include new elements, which are essential features: two chips converters levels of signals from the chip outputs of the controllers, with the first of the converters first and second terminals are connected respectively with the first and second pins of the controller computer, the third output of the first Converter chip is connected to the first output of the first signal line of the cable and through the first correction pattern transition characteristics of the cable to the input of the first agreed load, the fourth output of the first Converter chip is connected to the first output of the second signal line of the cable and through the second correction pattern transition characteristics of the cable with the first output of the second coherent load, the first and second findings of the second chip transformations which the user is connected respectively with the first and second terminals of the controller device, the second output of the first signal line cable is connected to the third output of the second Converter chip and through a third correction pattern transition characteristics of the cable with the first output of the third of the agreed load, a second output of the second signal line cable is connected to the fourth output of the second Converter chip and through the fourth correction pattern transition characteristics of the cable with the first output of the fourth agreed load, the third output circuits of the controller computer connected to the fifth output of the first Converter chip, the first output of the first voltage regulator, the first conclusions of the first and second filters for noise reduction on diet, the second pins of the first and second concerted exertion and the first output total bus cable, the sixth output of the first Converter chip is connected to the second pins of the first filter designed to reduce noise on the power supply and the first voltage, the fourth output circuits of the controller computer is connected to the second output of the second filter designed to reduce noise on the power supply, the third output of the first voltage and the first output bus power cable, the third output circuits of the controller device is connected to the fifth output of the second chip por the formers, the first output of the second voltage, the first output of the third filter designed to reduce noise on the power supply, the first output of the fourth filter designed to reduce noise on the power supply, the second output of the third of the agreed load, a second output of the fourth coordinated load and the second output to the shared bus cable, the second terminal of the second voltage regulator is connected to the sixth output of the second chip inverter and the second output of the third filter designed to reduce noise on the power, the fourth output circuits of the controller device is connected with the second output of the fourth filter designed to reduce noise on the power supply, the third output of the second voltage and the second output the power bus cable

The present invention is illustrated by drawings and waveforms shown in figure 3, 4, 5.

Figure 3 shows a functional diagram of the device proposed in the invention, for transferring data between a personal computer and a peripheral device, which includes a computer 1, a peripheral unit (PU) 2, the signal line (SL, SL) 3, 4 cable, the controller chip 7 computer, the controller chip 8 peripheral devices, chip transducers (P1, P2) 21, 22, circuits 23, 24, 25, 26 correction (W1, CK2, TC3, SK4) per the output characteristics of the signal lines of the cable, coordinated load (CN, CH2, CH3, CH4) 27, 28, 29, 30, stabilizers 31, 32 voltage (STN, STN), filters (F1, F2, F3, F4) 33, 34, 35, 36, designed to reduce noise on the power bus (OSH) 37, bus 38 power (noise reduction).

While the proposed device for transferring data between the computer 1 and the peripheral devices 2, made in the form of universal serial bus, includes cable with signal lines 3 and 4, the power bus, the controller chip 7 computer that generates commands that define the operation of peripheral devices, the controller chip 8 device that controls the directions of flows of the transferred data that is located in the peripheral device. The device further comprises two integrated circuits of the converters 21, 22 levels of signals from the chip outputs of the controllers 7 and 8, with the first of the converters 39 and the first and second terminals are connected respectively with the first and second pins of the controller 7 computer, the third output of the first Converter chip 21 is connected to the first output of the first signal line 3 of the cable and through the first correction pattern transition characteristics of the cable to the input of the first coordinated load 27, the fourth output of the first Converter chip 21 is connected to the first output of the second signal line 4 of the cable and through the second rhythm is the 24 correction of the transition characteristics of the cable with the first the second conclusion of the agreed load 28, the first and second findings of the second chip of the inverter 22 are connected respectively with the first and second terminals of the controller 8 device, the second output of the first signal line 3 of the cable is connected to the third output of the second chip Converter 22 and through a third circuit 25 correction of the transition characteristics of the cable with the first output of the third of the agreed load 29, the second output of the second signal line 4 of the cable is connected to the fourth output of the second chip Converter 22 and through the fourth circuit 26 correction of the transition characteristics of the cable with the first output of the fourth coordinated load 30, the third output circuits of the controller 7 computer connected to the fifth output of the first Converter chip 21, the first output the first regulator 31 voltage, the first conclusions of the first and second filters 33 and 34, designed to reduce noise on the power supply, the second pins of the first and second agreed loads 27, 28 and the first output bus 37 of the cable, the sixth output of the first Converter chip 21 is connected to the second pins of the first filter 33, which is meant to reduce noise on the power, and the first regulator 31 voltage, the fourth output circuits of the controller 7 computer is connected to the second output of the second filter 34, designed to reduce noise on the power supply, the third turn is the home of the first regulator 31 voltage and the first output bus 38 power cable, the third output circuits of the controller 8 devices connected to the fifth output of the second chip Converter 22, the first output of the second regulator 32 voltage, the first output of the third filter 35, which is intended to reduce noise on the power supply, the first output of the fourth filter 36, which is meant to reduce noise on the power supply, the second output of the third of the agreed load 29, the second output of the fourth coordinated load 30 and the second output bus 37 of the cable, the second output of the second regulator 32 voltage is connected to the sixth output of the second Converter chip 22 and the second output of the third filter 35, which is intended to reduce noise on the power, the fourth output circuits controller 8 devices connected with the second output of the fourth filter 36, which is meant to reduce noise on the power supply, the third output of the second regulator 32 voltage and the second output bus 38 power cable.

The device according to the present invention, operates as follows.

In standby mode, the outputs of the controller 7 is configured to reside in the state of logical "0" and logic "1" respectively. When this status in the circuits of the inverters 21 and 22 is setting the direction of data transmission from the controller 7 to the personal computer 1 to the controller 8 preferenceactivity 2. It then transfers the packet of digital data from the third and fourth pins of the Converter 21 respectively on the first conclusions of the signal lines 3 and 4 of the cable. When the status of the signal lines 3 and 4 is installing the chip Converter 22 in the receiving mode. Chip transducer 21 transmits data using pulse signals of smaller amplitude (˜0.5 In) compared with the amplitude of the output signal (˜3.3V) of the controller 7. The decrease in the amplitude of the signal in the chip Converter 21 data that comes from the output of the controller 7, provides lower power consumption and lower noise generation in the device. The packet of digital data from the communication lines 3 and 4 is supplied to the third and fourth pins of the Converter 22 and is transmitted further to a bidirectional first and second terminals of the controller 8.

In transmission mode the third and fourth conclusions the converters 21 and 22 are a source of pulse current, which through the correction patterns of the transition characteristics of the external cable is connected agreed load. The agreed value of the loads is equal to the wave resistance of the cable used. Therefore, in the device ensures reliable transmission of data without reflection signals in lines 3 and 4 of the cable. The presence of external whom she agreed load allows you to negotiate different types of cables with different wave impedance. The correction pattern of the transition characteristics of the cable allows you to adjust the transient response of the cable at the site of slow growth and significantly improve the shape of the pulse signals into digital packets of information. Serial connection circuit correction of the transition characteristics of the cable and consistent load allows you to adjust the transient response of the cable without reducing the amplitude of the pulse signals. 4 shows the waveform of the pulse signal at the output of the signal line without correction schemes of the transition characteristics of the cable. Figure 5 presents the waveform of the pulse signal at the output signal line from the correction circuits of the transition characteristics of the cable. Waveform analysis shows a significant improvement in the form of a pulse signal and having a steep front and a slice of the pulse using the serial connection circuit correction of the transition characteristics of the cable with a matched load. Signal line cable is bidirectional transmission lines. Therefore, to ensure the identity of the form of pulse signals when they are transmitted in different directions, the correction patterns of the transition characteristics of the cable and consistent loads are determined at the beginning and at the end of the signal lines. The arrival of the pulse signals to utime front and cut on the findings of the converters 21 and 22, operating in the receive mode, allows the shape of the output pulse signals that do not depend on the transmitted information, and hence to reduce the jitter of the pulse signals into digital packets of information.

When using long transmission lines is the supply voltage drop on the power bus that affects the magnitude of the threshold komprimovane receiver circuits of the converters 21 and 22. As a result, when the canopy front and slice pulse signal that affects the change of pulse duration in digital packets of information, and therefore increases the jitter of the pulse signals. The use of voltage regulators 31 and 32 provides for constant voltage by changing the length of the cable, and consequently, to reduce the jitter of the pulse signals.

When the length of transmission lines increases the length of the front and slice pulse signal, and the presence of noise on the power leads to an increase in noise on the pulse signal and to increase the jitter. Connection filters 31, 32, 33, 34, designed to reduce noise on the power to the first and second output power bus and the voltage regulators 31 and 32 reduces the noise power, and hence the jitter of the digital signal.

This allows you to extend the length of the communication lines 3 and 4 in the transmission device data is x, according to the present invention, up to 40 meters, limited only by the Protocol of data exchange in the serial bus, and also to use different types of cable and coordinate their wave resistance.

The transmission of data packets from the peripheral device 2 to the personal computer 1 is performed in the sequence described above.

Conducted patent studies have shown that the set of features of the present invention is a novel that has the novelty of the claimed device.

In addition, patent research showed that in the literature there are no data showing the effect of the distinguishing features of the claimed invention to achieve a technical result, which confirms the inventive step of the proposed device.

This set of distinctive features allows you to achieve the mentioned technical result.

The device for data transmission, according to the invention may find wide application not only in home computer networks and in networks with different types of peripheral devices located at a considerable distance from each other.

Literature

1. M.Dolle, A Dynamic Line-Termination Circiut for Multireceiver Nets, IEEE Journal on Solid-State Circuits, vol. NO. 12, December 1993, pp 1370-1373.

2. Han Shu, Usb Multi-Function Connecting Device, United States Patent 6058441, May 2, 2000.

3. RF patent N2275682.

Device for transferring data between a computer and peripheral devices, made in the form of universal serial bus, includes cable with signal lines, a power bus, the controller chip of the computer that generates the commands that define the operation of peripheral devices, the controller chip device that controls the directions of flows of the transferred data that is located in the peripheral device, characterized in that it includes two chips converters levels of signals from the chip outputs of the controllers, with the first of the converters first and second terminals are connected respectively with the first and second pins of the controller computer, the third output of the first Converter chip is connected to the first output the first signal line of the cable and through the first correction pattern transition characteristics of the cable to the input of the first agreed load, the fourth output of the first Converter chip is connected to the first output of the second signal line of the cable and through the second correction pattern transition characteristics of the cable with the first output of the second coherent load, the first and second findings of the second chip of the Converter are connected respectively with the first and second terminals of the controller device, the second you are the od of the first signal line cable is connected to the third output of the second Converter chip and through a third correction pattern transition characteristics of the cable with the first output of the third of the agreed load, the second output of the second signal line cable is connected to the fourth output of the second Converter chip and through the fourth correction pattern transition characteristics of the cable with the first output of the fourth agreed load, the third output circuits of the controller computer connected to the fifth output of the first Converter chip, the first output of the first voltage regulator, the first conclusions of the first and second filters for noise reduction on diet, the second pins of the first and second concerted exertion and the first shared bus cable, the sixth output of the first Converter chip is connected to the second pins of the first filter designed to reduce noise on the power supply and the first voltage, the fourth the output circuits of the controller computer is connected to the second output of the second filter designed to reduce noise on the power supply, the third output of the first voltage and the first output bus power cable, the third output circuits of the controller device is connected to the fifth output of the second Converter chip, the first output of the second voltage, the first output of the third filter designed to reduce noise on the power supply, the first output of the fourth filter designed to reduce noise, p is the power, the second output of the third of the agreed load, a second output of the fourth coordinated load and the second output to the shared bus cable, the second terminal of the second voltage regulator is connected to the sixth output of the second chip inverter and the second output of the third filter designed to reduce noise on the power, the fourth output circuits of the controller device is connected with the second output of the fourth filter designed to reduce noise on the power supply, the third output of the second voltage and the second output bus power cable.



 

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