Method and device for accelerated search of broadband signal

FIELD: data processing in broadband radio communications and radio navigation.

SUBSTANCE: proposed method intended for use where reception of extended-spectrum data signals keyed by simulation-resistant pseudorandom nonlinear derivative sequences is always preceded by synchronization includes concurrent accumulation of periodic mutually correlated function values of signal segments arriving from output of dynamically matched adjustable filters with two standard sampling lines affording generation of random derivative, as well as determination of time step numbers of their mutual shift corresponding to delay synchronism. Then current delay of entire signal being received is found from combination of these time step numbers. Used as dynamically matched adjustable filters in search channels are acousto-electronic convolvers.

EFFECT: reduced time and hardware requirement for searching broadband delay signals characterized in high simulation resistance.

2 cl, 9 dwg

 

The invention relates to methods and devices for processing data in a broadband radio communication and navigation, where the step of receiving information signals with spread spectrum (ALS), manipulated by some pseudo-random sequence (SRP), is necessarily preceded by the synchronization phase. The essence of the phase synchronization detection on the receiving side of the time delay of the received signal relative to the reference is generated in the correlation detector (i.e. the search signal by the delay) as well as in determining the true frequency of the signal [1, 2].

The desired result when implementing search the CDS should be the provision of complex traits [1, 2]:

- minimization of time and hardware costs for implementation of the method of the search signal.

- required (acceptable for reliable processing) correlation and imitazioni properties used by the SRP.

Known methods of search CPC delay using to reduce the average seek time of a priori information about the location and structure of the segments of the SRP [2]. The current signal delay can be determined by threshold detection value of the intercorrelation function between some short reference sequence and logical located segment of the similar patterns of the received signal [2].

Naib is more similar to the claimed method is search CDS, the essential features of which are the weighted summation of the responses of several digital agreed filters configured in several different segments of the SRP with a priori known structure having a minimum cross-correlation with respect to each other and unevenly spaced along the length of the received input sequence [3]. Weight summation are determined by the order of segments, and the current signal delay will be determined by the fact of a threshold value of the weighted sum of the responses agreed filters.

Similar characteristic of this method [3] with claimed is the use of a priori information about the correlation of the values of the quantum numbers of the current delay of the received signal and quantum detection total value of mutual correlation between the received and reference sequences.

From the point of view of providing the above-mentioned technical result, the known method has a number of disadvantages:

- reduction in the average search time only when close to the ideal of disturbances when the probability of false detection or omission of segment SRP is very small;

- the use of a restricted class of the SRP, studied in detail from the point of view of intercorrelation properties of component segments;

significant hardware satr what you're building block of digital agreed filters to search for the SRP of great length.

A device for synchronization of noise-like signals [4], the crucial task of finding a signal using two channels of quadrature processing from analog to digital and digital to analog converters, circular drives and computers correlation function, which allows to consider this device is the closest analogue to the proposed device search on the composition and the tasks. However, this device increases the search speed signal only at the expense of increasing the noise immunity of the phase detection condition of synchronism, but not implemented algorithm accelerated search, optimizing the order of analysis of the region of uncertainty of the signal in the delay or, as in the inventive device, taking into account the peculiarities and regularities of patterns used manipulative pseudo-random sequences.

The inventive method for accelerated search and realizing it device solve the problem quick search on the delay signals, manipulated derivative nonlinear sequences (EOR) [5]. This class of sequences in comparison with the traditionally used linear SRP (M-sequence and derived from them) has significant potential advantages: a large number of lengths for which they exist, high structural what kritou, special correlation properties, allowing to successfully implement both traditional and new efficient algorithms for signal processing based on them. The use of the property EOR underlying the proposed method searches for the delay and ensures the achievement of a set of characteristics that define the best technical result, namely:

- due to the build rule code PNP structure allows to realize the inventive method quick search and reduce the time of searching the CDS for the delay;

due to the EOR correlation properties of CDS for large and ultralarge lengths close to optimal;

- provides high infotouriste signals and the most vulnerable to interference phase search of CDS in the radio link;

- implementation of the method does not require selection of the SRP on the basis of knowledge of the structure of various segments in the reference segments are segments of a signal, the length of which is determined by the lengths of the two producing component, and the structure of unmanaged changes with each beat of processing in real time;

- implements the search device can be built using elements acoustoelectronic equipment that meets the stringent requirements on energy-intensive, time, and weight and dimensions [6].

The basis of the implementation of allaamah method and device are particularly coded patterns EOR, due to their rule formation.

According to [5] PNP 2-th order (also called two-derived non-linear recurrent sequences - PNLC) W of length L are called sequences, which are formed from 2-producing lines (PL) - duplicate producing the component (a simple non-linear recurrent sequences - NLRP) of length L1and L2(L1<L2) Vi, j=1,2 by (1):

V1and V2- producing line NLRP;

- binary symbol (0 or 1) with index i modulo length L1recurrent NLRP.

The rule of formation of two-EOR figure 1 illustrates.

As producing component (PC) are used NLRP two types: known codes are quadratic residues (qwic) with the number of symbols L1∈l and L2∈l: where l=4x+1 (type K1), l=4x+3 (class K3), and characteristic codes (HC) with the number of characters l=4 (type X0), l=4+2 (type x2), x=1, 2, 3,... [7]. The PNP types are determined by the combination of types producing component.

The search method is based on the property EOR installed in the machine simulation and consisting in the fact that periodic mutual correlation function (PVCF) DUP various types of manufacturing lines, with the purposes of the duplicate qwic or HC of the same type and length, has up to 3 fixed levels depending on the SRP. Their values are given in table 2. Figure 3 a and b respectively are shown confirming the validity of the correlations table 2 graphs of PWCF PNP type CC length L=77 with a production line composed of qwic L2=11 (a) and PVCF PNP type CC length L=221 produces a line drawn from qwic L2=17 (b).

A strong mutual correlation EOR with their PC with the mutual shifts that are multiples of the periods of L1and L2these produce a component that is used to establish synchronism for the delay PNP accurate to units of length L1and L2segments generated in EOR relevant PC according to the rules (figure 1). As can be seen from table 2, to implement the method of finding the CDS for the delay, based on the setting of synchronous time status of each PC on the strong values PWCF with it, it is advisable to use EOR built from producing component type K3 and K1. This is due to the strong mutual correlation EOR with both DPS of these types. From the rules of DUP (1) it is obvious that the combination of the numbers of cycles of synchronism EOR separately with each of the two DPS that are defined on the same period of the signal processing can be set to the current latency of the entire TNG (i.e. C is the current measure of the mutual shift of the received and reference sequences).

However, as a result of the interference structure of the received signal may be distorted so that the probability of a correct choice of expressed values PWCF with PL in the quantum shift that are multiples of the lengths of the PC, for one period of the analysis will be very small. To improve you need to implement the accumulation PWCF with a period of L1and L2with respect to L1and L2initial shifts, respectively. It should be expected that in the cycles that are multiples of L1and L2will be an accumulation of PWCF, and in other cycles due to random fluctuations PVCF around some mean value accumulation will not occur.

The inventive method search ALS is characterized is given in algorithm 4 and the following set of actions.

The search starts with a random mutual shift of the l0reference PL relative to the beginning of TNG, with accumulated PVCF EOR with each SQUARE is equal to zero (R∑1i=0 and R∑2j=0 for all i and j of the initial shifts relative to the l0; i=0,1, ...L1-1; j=0,1,...L2-1), current measure number l=1, the non-current shifts i and j are assigned zeros (block 1).

With 1-m tact (block 2) in the finder get values PVCF as the results of the correlation segments of length L1(PL-1) and L2(PL-2) received and reference signals, and store them with numbers i and j.

With 2-m t the drive oncoming traffic received and reference signals receive and retain with numbers i=i+1 and j=j+1 the results of the correlation segments, shifted in the opposite side to the 1st time regarding segments that are processed in the previous step (figure 6 a and b, as the matched filter is considered AEC). Such a procedure is implemented to i=L1-1 and j=L2-1.

With the next beat of the values of i and j are reset to zero (blocks 6, 7), and received them PVCF summarize with already stored in the memory to zero i and j.

The accumulation values PWCF (blocks 2, 4, 5) on each l-th clock cycle, the following periods PC L1and L2for each of the L1values of i and L2values of j, to produce the condition l=L·P, where P is the number of periods of accumulation PWCF (block 3).

Of L1and L2accumulated in the channels of values PVCF produce the maximum values of R∑1imaxand R∑2jmax(block 8) and record the corresponding number of shifts imaxand jmaxrelative to the initial zero, corresponding to the l0.

To form the PNP with some cyclic shift With that resolves the mismatch in time accept and support PNP, the values of CA, c1and C2PC-1 and PC-2 determine (block 9) obtained by imaxand jmaxusing the following relations:

Values, c1and C2relate the following defined during modeling of zootoxin the s:

where C(modL1- the operation of taking the numbers With modulo L1.

Then in the control phase matching delay form the reference CDS, manipulated EOR with the required CA (box 10), measure the degree of correlation with the received signal (block 11), and in case of detection threshold RTHENthe main peak PVCF decide to capture the signal in the delay. Otherwise, the search continues with the new period accept CDS.

The main features of the proposed method is the following set of actions:

use as manipulative SRP desired CDS derivative nonlinear sequence (EOR)generated in accordance with rule (1) of the code quadratic residues;

using as reference signals, manipulated producing lines (PL), composed of codes quadratic residues;

the implementation of parallel accumulation PWCF with a periodicity of L1and L2quanta processing using the correlation values of two different segments of the received and reference signals of length L1and L2whose structure (segments) dynamic changes in real time with each beat of the receipt of the received signal and determines the restructuring of correlators;

preliminary odnovremenno reduction in the number of cells of uncertainty on the delay of the received signal to the L 1and L2cells relative to the first and second reference generating lines;

in the control phase, the establishment of synchronism for the delay is implemented by forming the reference signal without directly determine the current time delay of the received signal using expression (2) by the combination of the numbers of cycles of synchronism among the rulers.

Diagram of the device search CDS, manipulated EOR implementing of the accelerated search, presented in figure 5.

The search delay is implemented in two similar in structure to the channel search first and second producing components (PC 1 and PC-2), in which the detection of quantum synchronism with the corresponding manufacturing line is the maximum value of the accumulated PWCF.

Channels search for PC-1 and PC-2 contains: the correlators 1, using as dynamically tunable agreed filters acoustoelectronic convolver (AEC) with integration times θ1and θ21=L1·τeand θ2=L2·τethat τe- the duration of elementary symbol SRP); generators 4 reference sequences producing component; amplifiers 5; analog-to-digital converters 6 (ADC); drives PVCF, including parallel digital adder 7 and the operational application : nausea device (RAM), consisting of memory elements 8; schema matches 9; schema selection of beat matching (SVTS)containing a count of 10 clock pulses (TI) overflow, the key 11, the digital comparator 12 (CC), the counter 13, a register 14, the transmitter 15 shifts with1and c2. Also the schema contains the generator 3 reference of the derived signal and the control circuit 2.

The result of the work of each channel is to determine the values of c1and C2cyclic shifts of the PC in the control phase matching will generate the generator 3 reference the derived signal with the resulting CA, corrects skew of the delay.

In each of the channels of AEC 1 receives the received signal SIas a recurrent inverted in time CDS, manipulated DUP (ALS-EOR), and the reference signal (OS) Ssupports, manipulated the corresponding manufacturing line. With every stroke with the AEC 1 de-energized, proportional to the energy of folds segments of length L1and L2moving towards each other reference lines (Ssupports)generated by the generators of the support bars 4, the first and second producing component, and SI.

After amplification in the amplifier 5, the output signal of the AEC are converted in analog-to-digital Converter 6 with sampling frequency equal to the frequency FP is. The first digitized value PWCF (for zero shifts i=0 and j=0 relative to the initial mutual shift of the l0) through the parallel adder 7 unchanged (so as to this point from the output RAM to the other inputs of the adder nothing comes) in parallel is written in first-order bits (memory elements 8) shear RAM registers. The total number of registers must match the number of bits of the maximum possible accumulated value PWCF. The number of N digits in registers equal to the number of shifts for which will accumulate PVCF, i.e. L1and L2channels 1 and 2 respectively. With each beat of the cell RAM registers in parallel are then filled in with the digitized value of the envelope of the output of AEC. After the L1cycles in channel 1 (and L2in channel 2, cell 1...N RAM channels filled with L1and L2values PVCF obtained for all shifts i and j (i=0,1...L1-1; j=0,1...L2-1). Co following tact to the inputs of the adders 7 enter values PVCF obtained in the ADC 6 for shifts, located at the distance L1and L2cycles with respect to the zero initial shifts i=0 and j=0. They are summed with the values PWCF for i=0 and j=0, input by a clock pulse (T) through schema matching 9 to the other input of the adder 7 to the last cell (N) registers the RAM and then written into the first rasra the s registers in RAM.

Thus, the number of ticks analysis for channel 1 is equal to l1=P·L-L1and for channel 2 l2=P·L-L2(where P is the given number of periods of the received signal, which is the accumulation of PWCF) in the RAM channel search PC-1 and PC-2 will be recorded L1and L2values of Rε1i; PVCF accumulated for L1and L2values of i and j mutual shifts, the following intervals of the lengths of the reference PC.

When the number of ticks of the analysis of values of l1and l2in the counters 10 occurs overflow, and for L1and L2cycles before the end of the specified time of analysis (the total number of ticks analysis is R·L), open the keys 11, to permit the passage of the following amount PVCF from the adder 7 to the digital comparator (CC) 12. Also the overflow signal of the counter 10 run counters 13 number L1and L2cycles of the shift for which the CC will get the maximum value of the accumulated PWCF. Coming to the Central Committee of 12 first value PVCF saved it as a threshold.

With the following quantum adders in the Central Committee will be (i+1)-th and (j+1)-th values of the accumulated PWCF. In case of excess over previous (received for shift i=0 or j=0) with the Central Committee of 12 to the buffer register 14 receives a signal permitting the entry from the counter 13 non-shift-i (or j)for which this m the ment accumulated in the channel PVCF maximum. With each stroke comparison to the Central Committee of 12 channels search as threshold remains, whichever is the greater of the current value of the total PWCF.

As a result of executing a comparison operation for the L1and L2last cycle analysis will be allocated and recorded in the registers 14 shift values of imaxand jmaxcorresponding to the maxima accumulated in the channels PWCF.

Signal overflow for values of L1and L2counter 13 run solvers 15 cyclic shifts using to calculate with1and C2the values of imaxand jmax. The transmitter 15 implements the operations of the expressions (2).

The obtained values with1and C2enter the generators 4 reference sequences producing component, which form a PC with cyclic shifts with1and C2. Characters generated by PCs receive to the generator 3 reference derived signal and provide support ALS-EOR (Ssupportswith the resulting shift With that corrects skew of the delay between the received SIand reference Ssupportssignals when checking the fact of synchronism in the control circuit 2.

The main features of the proposed device is the following set of features: use to obtain the convolution of the received and reference signals dependence is of Evolver (AEC) as a dynamically tunable matched filter, output whose voltage is supplied to analog-to-digital Converter, and then the digitized signal into a parallel adder, in which to implement digital non-coherent accumulation is also supplied previously obtained and stored in the RAM value of the response of AEC for the corresponding quantum mutual shift, while after the desired number of periods of accumulation of each of the received total of the values entered in the scheme of quantum of synchronism (SVTS), where the value of the quantum of synchronism by the delay of each of the two producing lines is determined by tact selecting the maximum of all total values PWCF and the establishment of corresponding quantum shift, which then enters in the transmitter shift, and with him on the generator reference sequence which produces components for forming the reference signal for transfer to the AEC on the stage of finding or forming producing components for generator support PNP, which feeds manipulated EOR reference signal in the control circuit of synchronism.

1 shows a rule forming derivatives of nonlinear sequences.

Figure 2 shows a table of values of a periodic intercorrelation function (PVCF) DUP various types of manufacturing lines (PL).

Figure 3 shows the graphs depend on the particular PVCF STUMPS type CC length L=77 with producing line, composed of qwic L2=11 (a) and PVCF PNP type CC length L=221 produces a line drawn from qwic L2=17 (b).

Figure 4 shows the algorithm of accelerated search CDS, manipulated EOR.

Figure 5 shows a diagram of the device search CDS, manipulated EOR.

Figure 6 illustrates how the correlation segments of the received and reference signals in the AEC on two adjacent bars of the handle.

Figure 7 depicts the dependence of the average sample accumulated value PVCF the number of periods of accumulation, with 25 percent of distorted symbols of the received signal.

On Fig shows the dependence of the probability of successful synchronization delay on the degree of distortion of the received signal (in percent of the total number of characters SRP) for DUP length L-77, 385, 770, 7700, 77000 at 32 periods of accumulation PVCF received and reference signals.

Figure 9 depicts the dependence of the equivalent linear complexity lsdifferent types of EOR (CK, CK, CK, CK) and known linear SRP (gold, Kasami, M-sequence) of their length.

The possibility of implementing the proposed method of searching using as correlators dependence of convolvers (AEC) confirmed the results of the simulation of the process of accumulation PVCF segments accept CDS-EOR with updated (every the act SRP) segments of the manufacturing line. The process of vzaimosohranenii in the AEC segments of the received and reference signals on 2 adjacent bars of the processing explained 6 (θ1and θ2the time integration of AEC, τe- the duration of elementary symbol PNP). The possibility of reliable selection of the maximum value of the accumulated PVCF EOR with PL corresponding to synchronism with this PC, is confirmed is shown in Fig.7. the dependency on the number of periods of accumulation of P normalized average sample M(R∑1irandom values accumulated PVCF DUP L=143 (L1=11, L2=13) PC L1for all values i=0, 1...L1-1 their mutual shifts within a period of KKB. Pronounced increase in the average sample M(R∑10) total PWCF (Fig.7), accumulated in the quantum shift that are multiples of L1corresponds to the cycles in synchronism with the first production line. For other i, regardless of the number of periods of accumulation, the value of M(R∑10) PVCF fluctuates around zero in a certain range of values. The average selective degree of distortion of the received sequence DUP equal to 25 percent of distorted characters in the SRP, which confirms the feasibility of the method in terms of interference.

The values accumulated in the channels PWCF are determined by the expressions:

where R(S[m], S1[q]) and R(S[m], S2[q]the relative values PVCF between segments Smlength L1and L2accept CDS-EOR and segments S1qand S2qthe same reference lengths producing lines;

m and q are the number of cycles of the beginning of the segment relative to the l0-th shift; R∑1i(l0and R∑2j(l0) - total value PWCF (R periods ALS-EOR) for the i-th and j-th cycles of analysis at the beginning of a search with a mutual shift of the l0.

Probability P∑1maxand R∑2maxthe correct choice of the maxima of R∑1imaxand R∑2jmaxof L1and L2values are determined for each channel accumulation PVCF of expressions:

where f(R∑10) and f(R∑20) is the density of the normal distribution probability accumulated in channels 1 and 2 values PWCF in cycles in synchronism with the respective producing qwic;

f(R∑1i) and f(R∑2j) is the density of the normal distribution probability accumulated in channels 1 and 2 values PWCF in cycles shift, not corresponding to the synchronous state of the qwic segments EOR.

The total probabilitysync correctly (i.e. correct choice highs accumulated PWCF in both ka is the al) is defined:

The ability to ensure quick search CDS with large base (DUP length L=77, 385, 770, 7700, 77000) for a small number of periods of accumulation of the received signal (32 periods of accumulation PVCF) with high probability, the synchronization delay is confirmed in the simulation and is shown on Fig dependencies of the probability of successful synchronizationthe degree of distortion of the received signal (in percent of the total number of characters SRP). Comparison (with equal bases ALS) values achieved relative search time, expressed in number of periods of the analysis of the ALS, with the same index to known methods, demonstrates the advantage of the proposed method at the time of searching the CDS on a delay of about 2-3 times before convolving search [2] using the famous SRP, 10 or more times before a multi-step search [2] and 100 times or more before successive cyclic search [2].

Implementation of high imitator resistance of the used signals confirmed is shown in Fig.9 dependencies is equivalent to the linear complexity of different types of EOR (CK, CK, CK, CK) and known linear SRP (gold, Kasami, M-sequence) of their length. The advantage of the equivalent linear complexity is the example is about 5 times and more for lengths SRP L≈ 2·103and increases with the length of the SRP.

The construction of the inventive device that implements the method of the search signal, possibly within the signal processor on modern high-speed electronic components with a high degree of integration. At higher clock frequencies SRP fSRPexceeding the capabilities of the ADC performance, and conversion functions may be distributed between multiple (m) of the ADC so that each of them provided conversion with sampling frequency fSRP/m. Digital comparator can be implemented using a chip type full adders. Made on the basis of shift registers RAM has sufficient performance and does not require special distribution and switching devices.

The inventive device search CDS, manipulated EOR can be used both independently and to reduce the search time by the addition of conventional devices for detecting the fact of synchronism for the delay level of correlation over the entire length of the reference and received signals and implementing well-known cyclic, multi-stage, or other search methods. The applicability of this method and device search is primarily due to the use of CDS, manipulated EOR-based codes quadratic residues. This obespechivaetsya stealth phase synchronization delay, as well as the possibility of rapid adaptation of the radio link to the information and interference conditions due to changes in small increments lengths manipulating the SRP.

Sources of information:

1. Varakin LA communication Systems with noise-like signals [Text] -M.: Radio and communication, 1985. - 384 S.

2. Zhuravlev, V.I. Search and synchronization in wideband systems. [Text] / V.I. Zhuravlev - M.: Radio and communication, 1986. - 240 S.

3. Snitkin I.I. Sync delay for the digital processing of extra-long recurrent sequences [Text] / Snitkin I.I., Brown V.I., Srobbin A.T. / news of higher educational institutions. Electronics, No. 7, 1990 - p.31-35.

4. USSR author's certificate No. 1003372, CL 04L 7/02, 1983(authors Assurable, Avicci, VMmark, Biedrosanas, Art, Vmetro).

5. Snitkin I.I. Theory and practical application of complex signals nonlinear structures. Part 3. [Text] / Ind. - MO: 1989 - 148 C.

6. Debt V.I. application of the dependence of convolvers for signal processing in communications technology [Text] / V. Dolgov, etc. // Foreign electronics - 1990. No. 8 - p.58-66.

7. Sverdlik could BE Optimal discrete signals [Text] / could BE Sverdlik): Owls. radio, 1975. - 200 S.

1. The way quick search of wideband signals based on the use of a priori information about the correlation value is of the quantum numbers of the current delay of the received signal and quantum detection total value of mutual correlation between the received and reference sequences, wherein the search signal delay, manipulated derivative nonlinear sequences, carried out in parallel on two channels, one of which as a reference applied consistently repeating component length L1in the other L2the search starts with a random mutual shift of the l0reference sequences relative to the received signal, in the search process with correlation device channels on each step of receiving values of the periodic intercorrelation functions in the correlator segments L1and L2moving in opposite directions received and reference signals, then the first and second channels, the values of intercorrelation function segments accumulate, respectively, with a periodicity of L1and L2cycles with respect to L1and L2her first values, the accumulation values of the periodic intercorrelation functions perform in several periods L of the received signal, the result of L1and L2accumulated in each of the two channels select the maximum values and record the corresponding numbers of cycles of mutual shifts of imax∈ (0, 1,...L1-1 ) and jmax∈ (0, 1,...L2-1) relative to the initial corresponding to the l0and next received i maxand jmaxdetermine the values of cyclic shifts of c1and c2producing a component according to the following proportions:

then by the parallel formation of two repetitive sequences producing component length L1and L2generated by cyclic shifts of c1and c2respectively, as well as character-by-character sum modulo two of these sequences form a reference derived sequence of length L=L1·L2received cyclic shift on the phase control eliminates the misalignment in time taken and the support derived signals, and its value determined by the values of c1and c2in accordance with the expression c1=L1(Mod L1), c2=L-C(mod L2), where C(mod L1- the operation of taking the numbers With modulo L1while the decision to capture the signal in the delay take on the fact of exceeding the threshold value of the mutual correlation function of the received and obtained the support of the derived signal, otherwise the search continues.

2. The device search broadband signal delay, containing two channels, each channel processing of the correlator, one input of which is filed with the received signal and the other input is connected to the generator output of the reference sequence, as well as analog-to-digital Converter (ADC drive periodic intercorrelation function (PVCF) and schema elements match, characterized in that the first and second processing channels generator reference sequence is executed in the form of a reference generator produces a sequence of repeated components of length L1and L2accordingly, the correlator is implemented on the basis of the dependence of convolver (AEC), the output of which through an amplifier connected to the input of the ADC, the output of which is connected with the first group of inputs of the parallel digital adder, the outputs of which through the drive PVCF connected to one of inputs of the circuit elements match, the outputs of which are connected with the other group of inputs of the parallel digital adder, the outputs of which are connected to the input circuit of the selection cycle synchronism, the output of which is connected to the input of the generator of the reference sequence producing components, and another output of this generator of each channel is connected with the corresponding input of the generator of the derived signal, the output of which is connected with one of inputs of the control circuit of synchronism for the delay, other input of which is the entrance of the received signal, and another input schema elements match and the control input schema selection of beat matching cycles are the m input device.



 

Same patents:

FIELD: technology for realization of cyclic synchronization of interference-resistant cyclic codes, in particular, cascade codes.

SUBSTANCE: in accordance to method, at transferring side one synchronization series is selected for N code words following one another, check section of code words is added with modulus two to appropriate section of aforementioned synchronization series. At receiving side received input series, consisting of several code words following each other, is divided onto original interference-resistant cyclic codes polynomial, producing a total of interference-resistant cyclic codes syndrome and synchronization series. By subtracting synchronization series from produced total, interference-resistant cyclic codes syndrome is selected. On basis of interference-resistant cyclic codes syndrome combination of errors in interference-resistant cyclic codes is computed and its weight is evaluated. On basis of error combination weight, trustworthiness degrees of code words following each other are computed. If total trustworthiness degree exceeds threshold value, decision about performing code cyclic synchronization of input series is taken.

EFFECT: increased interference resistance of cyclic synchronization.

2 cl

FIELD: digital communications, namely, engineering of devices for cyclic synchronization of digital information transfer systems with temporal compression.

SUBSTANCE: known device contains random-access memory device, adjustment and diagnostics device, phasing device and generator equipment. Cyclic evenness determining device is introduced to known device. Therefore, cyclic synchronization device provides cyclic synchronization of different digital transmissions, wherein synchronous combination is absent, while on positions at the end of cycle signals are transferred, filling sum of signals of appropriate digital transmission up to evenness.

EFFECT: expanded functional capabilities of device for cyclic synchronization.

2 cl, 3 dwg

FIELD: electric communications engineering, possible use in receiving cycle synchronization devices of systems for transmission of discontinuous messages.

SUBSTANCE: device contains synchronization signal recognition device, adder, block of shift registers, solving block, generator of cyclic impulses, counter of cycles, comparison block, counter of distorted synchronization impulses, counter of total number of synchronization impulses, AND element, counter of clock impulses, trigger, block for selecting maximal weight of response, threshold selection block, second threshold selection block, block for selection of counting coefficient, signal input, clock input and output of device. Synchronization signal recognition device contains shift register, detector of errors in synchronization group, generator of weight of response to synchronization signal. Solving block contains comparison block, memory block, subtraction block, comparison block, comparison counter, second AND element, third AND element, OR element. By means of second element AND, third element AND, and also element OR in synchronous mode, and also in case of synchronism failure, generation of synchronization signal is performed at output of solving block. Restoration of synchronism after failure and phasing of device for new position of cyclic synchronism is performed in case of occurrence of two events simultaneously: determining of new position of cyclic synchronization signal by solving block and detection of failure of cyclic synchronism by means of cycles counter, comparison block, threshold selection block and count coefficient selection block, because during regular repeating at certain information position of cycle of false synchronization group and random distortion of true synchronization group phase of cyclic impulse generator does not alter, thus causing no false synchronism failure.

EFFECT: increased interference resistance of device for cyclic synchronization.

4 dwg

FIELD: electric communications, possible use in receiving devices for synchronization by cycles of system for transferring discontinuous messages.

SUBSTANCE: device contains synchronization signal recognition device, forbidding element, first AND element, adder, shift registers block, generator of clock pulses, OR element, cycles counter, counter of distorted synchronization signals, block for selecting allowed number of distorted synchronization signals, block for selecting threshold, block for selecting counting coefficient, counter by exit from synchronization status, and also solving assembly, containing first comparison block, memory block, subtraction block, second comparison block, comparison counter, second AND element, third AND element, second OR element.

EFFECT: increased reliability of operation of device for synchronization by cycles due to excluded possibility of overflow of shift registers block in synchronous operation mode.

1 dwg

FIELD: digital data transfer systems for frame synchronization of correcting codes including noise-immune concatenated codes.

SUBSTANCE: proposed device for adaptive code frame synchronization has delay register 1, error detection assembly 2, decoder unit 10, counter 11, threshold unit 21, synchronizing-sequence generator 18, modulo two output adder 12, random-access memory 15, modulo two adder unit 16, number comparison unit 13, full adder 19, synchronization counter 17, error counter 14, and code converter 20. Error detection assembly is set up of two series-connected Huffman filters 3, 4 and syndrome register; each Huffman filter has register 6/7 and modulo two adder 8/9.

EFFECT: enhanced noise immunity.

1 cl, 1 dwg

FIELD: digital communications;

SUBSTANCE: proposed device is used for frame synchronization of digital time-division multiplex data transmission systems and incorporates provision for synchronizing data transmission class at dispersed sync combination of group signal and for implementing parallel search for synchronism. Device has first, second, and third random-access memories, storage register, decoder, distributor, generator equipment, phasing unit, flip-flop, first and second inverters, adjusting unit, first, second, and third inverters, first, second, third, fourth, and fifth AND gates, first and second OR gates.

EFFECT: enlarged functional capabilities.

1 cl, 2 dwg

FIELD: communications.

SUBSTANCE: device has control circuit, first input of which is connected to output of phase sign decoder, second input is connected to first clock input of device, third input is connected to second clock input of device, circuit OR, connected by its inputs to outputs of controlled system, and output of OR circuit is connected to third block for forming cyclic phasing signal, while the latter is made on basis of same circuit of logic numbers processing and consists of two numbers signals switchboard, arithmetic adder of two numbers, memory device, meant for recording K numbers, on basis of K data words, required for forming of cycle synchronization signal, AND match circuit, decoder, pulse counter, performing function of threshold element.

EFFECT: higher trustworthiness.

1 dwg

FIELD: digital communications.

SUBSTANCE: device has random access memory, adjusting device, synchronous combination decoder, phasing device, generator equipment, three commutators, signals distributor, time analyzer and signals remover.

EFFECT: higher reliability, higher effectiveness, higher interference resistance.

1 cl, 3 dwg

The receiver clock // 2242093
The invention relates to radio engineering

The invention relates to telecommunication and can be used in the receiving device sync cycles of transmission of discrete messages

FIELD: the invention refers to the technique of detection of a target and determination of the direction at a target.

SUBSTANCE: the mode is realized by way of receiving of ultra wideband impulses reflected from the target, of delaying them on various time multitude in various channels of surveillance and multi channel processing. In the first variant of the current mode variation of the form of receiving impulses on a great number of discrete time positions are carried out by way of averaging-out by channels of surveillance at known direction of incoming reflected impulses in a beforehand designed control sector and then found valuation of the form of receiving impulse is used as a base signal in multi channel correlation processing. In the second variant valuation of magnitude of receiving impulse is formed in concrete moment of time for each base direction in beforehand given angular sector of control, valuation of the form of the receiving impulse is found according to formed valuations of magnitude 0f the receiving signal for various discrete moments of time; found valuation of receiving impulse is used as a base signal in multi channel correlation processing; out of multitude of results of correlation processing correlation maximum is chosen. This maximum is used as preliminary threshold decision statistics in the procedure of detection of the target; the direction of incoming reflected impulses with the help of interpolating valuation of the position of the correlation maximum in the environs of that base direction for which the largest result of multi channel correlation processing.

EFFECT: the use of this invention at location of a target with the help of ultra wideband impulses allows to receive signals incoming not only from in advance chosen base directions.

6 cl,9 dwg

FIELD: computer science.

SUBSTANCE: device has first and second regenerators of random evenly spaced signals, second and first comparators, generator of short pulses, second and first binary counters, decoder, D-trigger, first and second RS-triggers, AND element, XOR element, reverse counter, clock pulse generator, divider with rebuilt division coefficient , pulse distributor, group of M synchronization blocks, group of M pulse distributors, N (M-10) - input elements R and N blocks for calculating ordinates of correlation function.

EFFECT: simplified construction and higher reliability .

2 cl, 4 dwg, 1 tbl

FIELD: specialized information extracting means.

SUBSTANCE: device has displacement registers, comparator block, XOR element, multiplexer, triggers, counter, AND elements.

EFFECT: simplified construction.

1 dwg

The invention relates to the field of computer engineering and can be used to process a random process

The invention relates to specialized tools computer engineering and can be used for comparative analysis of random processes, spaced in time

The invention relates to the field of computer engineering and can be used for analysis of random processes

The invention relates to a device for digital signal processing

The invention relates to specialized computing devices, designed to determine the correlation functions of random processes

The invention relates to measuring technique and can be used in measuring systems intended for the analysis of the characteristics of the stochastic correlation of random processes

The invention relates to the field of computer engineering and can be used in measuring systems

FIELD: specialized information extracting means.

SUBSTANCE: device has displacement registers, comparator block, XOR element, multiplexer, triggers, counter, AND elements.

EFFECT: simplified construction.

1 dwg

Up!