Special signals generator

FIELD: radio engineering, possible use for construction of equipment for forming current in underground or underwater current ducts.

SUBSTANCE: negatively reversed connection is inserted between load and output cascade of generator, also, overcharge protection circuit is provided. To increase reliability of generator, temperature sensor is provided, mounted in radiator of output cascade, and temperature sensor, mounted on power block of output cascade, central microprocessor unit controls generator in a way not to allow overheating of output cascade and exceeding of voltage or current limiting values.

EFFECT: higher precision of resulting current and higher operational reliability of generator.

1 dwg

 

The invention relates to the field of technical physics and can be used in the apparatus for creating a current in underground or underwater conductors (cables, pipelines and other isolated environments conductors) as if it were directly connected to them, and the excitation current through the induction coil.

The known signal generator (see UK patent No. 2363010, CL G 06 F 1/02, G 01 V 3/06 dated 02.03.2001), a variant of which contains the driver signals, pulse modulators, a method of forming the control signals output stage, output stage, low pass filter, the power source, the load, in parallel, which included the transducer feedback. The above known device is closest to the claimed invention and can be taken as a prototype.

The first drawback of the known device is the following. The behavior of the expected load of the generator (the cable route or pipeline, or coil magnetization) depending on the technical condition, climatic conditions and other factors is complex. In addition, strains differ in the ratio of components of the impedance. Therefore, to establish the exact value of current (power) to the load to the terminals of which is connected in parallel Converter is Britney communication not in all cases. This can lead to loss of continuity of the measurements obtained by receiving diagnostic devices, as the actual current value may differ from the set. The second disadvantage is the absence of the output of the filter, the power circuit of the load, the protection circuit surge (overvoltage). In the case of poor connection of the load with significant inductive component, the output of the generator (there is a faulty contact in the power supply circuit of the load), you may experience a surge, resulting in malfunction or even failure of the generator. The value of capacitor C3 figure 5 prototype will mitigate these emissions, but may not be sufficient for the case in question. Both cases are undesirable, because it reduces the accuracy of the established modes of operation of the generator and its reliability.

Solved technical problem is the creation of the generator, allowing to establish a more accurate value of the current in underground or underwater conductors and having greater operational reliability.

Technical result achieved - improving the accuracy of the set current and improving the reliability of the generator.

The technical result is achieved in that the signal generator contains the driver signals, the pulses of the data modulators, the outputs are connected to first and second inputs of the formation pattern of the control signals output stage, respectively, the outputs of which are connected to the inputs of the output stage, the outputs of which are connected to the inputs of filters low frequencies, the outputs of which are connected to the load, the power source is connected to the bus the output stage, the inverter feedback. What is new is that the inverter feedback contains the limit sensor voltage sensor operating current, the sensor overcurrent, bandpass filter, a microprocessor, switch the "current selection" and the first digital-to-analogue Converter (DAC), an input connected to the first output of the microprocessor, the second output of which is connected to the input set of sensor conversion factor operating current, the output of which is connected to the input of a bandpass filter, the output of which is connected to the first input of the microprocessor, a second input connected to the output of the limit sensor voltage, the input of which is connected with the load sensor input overcurrent included in the power supply circuit of the load, and the output is connected to the third input shaping circuit control signals output stage and the third input of the microprocessor, a fourth input connected to the switch "current selection", shaper signal contains the placenta is therefore United oscillator, a frequency divider, a counter-divider, a persistent storage device (ROM) and the second d / a Converter, one-shot, scheme shortening account, switch the selection of the frequency signal, the output of which is connected to a second input of a permanent mass storage device, the second input of the second digital to analog Converter connected to the output of the one-shot, an input connected to the second output of the frequency divider, the third output of which is connected to the first input of the differential shortening account, the second input of which is connected to the output of the counter-divider, the output of the circuit shortening account is connected to a second input of the counter-divider, the third input of the second digital to analogue Converter connected to the output of the first d / a Converter, inputs of the clock generator, comprising a dual switch, switch for alternately outputs the signals from the source of reference voltage and zero tires, a source of reference voltage, the first integrator and the second integrator, the inputs of which are connected to the outputs of the dual switch, respectively, the first input of the voltage reference connected to the first input of the dual switch, a second input connected to the second output of the frequency divider, the outputs of the first and second integrators connected with the second inputs of nursnig modulators, respectively, the first inputs are connected to the output of the second d / a Converter.

For surge protection introduced by the protection circuit, the inputs of which are connected to the terminals of the load and the bus power supply. To improve the reliability of the generator introduced the first temperature sensor mounted on the heat sink of the output stage, the output of which is connected to the fifth input of the microprocessor and a second temperature sensor mounted on the power output stage, the first output of which is connected to the sixth input of the microprocessor, and the second output fan; a display unit, an input connected to the fourth output of the microprocessor.

A new set of essential features improves the accuracy of the set current and the operational reliability of the signal generator.

The drawing shows a block diagram of the signal generator.

The signal generator contains the driver signals 1, pulse modulators 2, 3, the outputs of which are connected to first and second inputs of the formation pattern of the control signals output stage 4, respectively, the outputs of which are connected to the inputs of the output stage 5, the outputs of which are connected to the inputs of filters low frequencies 6, 7, the outputs of which are connected to the load 8, the power source 9 is connected to the bus output stage 5, the inverter reverse swazistreet the limit sensor voltage 10, sensor operating current 11, the sensor overcurrent 12, the bandpass filter 13, a microprocessor 14, the switch "current selection" 15 and the first DAC 16, the inlet of which is connected to the first output of the microprocessor 14, the second output of which is connected to the input set of sensor conversion factor operating current 11, the output of which is connected to the input of bandpass filter 13, the output of which is connected to the first input of microprocessor 14, a second input connected to the output of the limit sensor voltage 10, the inlet of which is connected to the load 8, the sensor input overcurrent 12 included in the supply circuit of the load 8, and the output is connected to the third input shaping circuit control signals output stage 4 and the third input of the microprocessor 14, a fourth input connected to the switch "current selection" 15, shaper signal 1 contains consistently United oscillator 17, the frequency divider 18, the counter-divider 19, a ROM 20 and the second DAC 21, shaper signals 1 additionally introduced the one-shot 22, scheme shortening bill 23, the switch selection frequency signal 24, the output of which is connected with the second input of the ROM 20, the second input of the second DAC 21 is connected to the output of one-shot 22, whose input is connected with the second output of the frequency divider 18, the third output of which is connected to the first input circuit is shortened which I account 23, the second input of which is connected to the output of the counter-divider 19, the output of the circuit shortening account 23 is connected to a second input of the counter-divider 19, the third input of the second DAC 21 is connected to the output of the first DAC 16, further introduced the clock generator 25, which includes a dual switch 26, a reference voltage source 27, the first integrator 28 and the second integrator 29, the inputs of which are connected to the outputs of the dual switch 26, respectively, the first output of the reference-voltage source 27 is connected to the first input of the dual switch 26, a second input connected to the second output of the frequency divider 18, the outputs of the first and second integrators 28, 29 are connected with the second input pulse modulators 2 and 3, respectively, the input of which is connected to the output of the second DAC 21.

To increase operational reliability introduced scheme surge protection 30, the inputs of which are connected to the terminals of the load 8, the power bus of the power source 9.

The scheme works as follows.

When power master oscillator 17 begins to produce a periodic sequence of pulses with a frequency 2,4576 MHz, which is supplied to the frequency divider 18 provides for the formation of the reference frequency and clock. From the first output of the frequency divider 18 clock frequency supplied to the first input scetchy the a-divider 19, since the output of which the signal at the second input of the differential shortening account 23, at the first input of which receives the clock frequency from the third output of the frequency divider 18. The counter-divider 19 runs in ring mode account with a shortened cycle. This is necessary to obtain the number of cycles in the period of a multiple of an integer for all the component frequencies of the signal. When the output of the counter-divider 19 specific code combination, the shortening of the accounts 23 will generate a short reset pulse, completing the cycle of the account. From the output of the counter-divider 19 code combination is supplied to the first input of the ROM 20, a memory which lays out four frequency combinations of the signal, the necessary choice is made by means of the switch 24 "selecting a frequency signal, the signal of which is fed to the second input of the ROM, the output of which code combination is supplied to the first input of the second DAC 21, which converts the code combination ROM in voltage according to the formula:

where N is the code combination,

Uop- the reference voltage formed by the first DAC 16.

As can be seen from the formula, changing Uop, change the conversion factor of the second DAC, and thus regulate the amplitude of the frequency signal. To the second input of the second DAC 21 receives a short pulse from the output of the simultaneity is of bratara 22, allow the entry of input data after the passage of clock switching, to prevent passing on the output of the second DAC 21 switching emissions, the reference voltage which forms the first DAC 16, controlled by the microprocessor 14. From the output of the second DAC 21 signal at the first input pulse modulators 2 and 3, which converts the amplitude of the input signal within the duration of the pulses with a frequency equal to the frequency of the synchronization signal received at their second inputs.

The clock generator 25 operates as follows. To the second input of the dual switch 26 receives the clock pulses from the third output of the frequency divider 18, synchronously with whom tandem switch commutes serially on the output signal from the reference-voltage source 27 and a neutral bus, the outputs switch in opposite phase. With outputs dual switch 26 meander stable frequency and amplitude is supplied to the inputs of the integrators 28 and 29, transforming it into a triangular signal synchronization for pulse modulators 2 and 3, which outputs the signal to the driver control signal output stage 4. The driver control signal output stage generates the control signals of the upper and lower shoulders of the output stage, and switching between the upper and lower arm output helmet is and introduces a pause, excluding pass-through currents in the switching moment. In addition, in this device, the converted signals are TTL level signals with levels control gates of the transistors of the output stage. The pulse signals of the modulators 2 and 3, reinforced by the power from the output stage 5 is coming to the low-pass filters 6, 7, which is the original analog signal from the pulse. Converting the analog signal into a pulse, the strengthening of its capacity and the reverse recovery in analog is necessary to achieve higher efficiency than direct analog signal gain power. Outputs of the filters 6, 7 signal is supplied to the load 8 through the sensor overcurrent 12, precision feedback resistor sensor operating current 11. The limit sensor voltage 10 is in parallel with the load and is triggered when the output signal on the top or bottom level signal is supplied to the second input of microprocessor 14, which from the fifth output to the input of the power source 9 generates a signal increasing the voltage on the bus the output stage 5. The power source 9 has five levels of output voltage: 20, 40, 60, 80 and 100 C.

The sensor overcurrent 12 is triggered by exceeding the current value is 20, while the maximum operating current depending on the position of the switch 15 can vary from 0.4 to 12 A. This situation can occur when a sharp drop in resistance in the load circuit 8, i.e. so quickly that the microprocessor 14 does not have time to work out the change (see below). When triggered, the sensor overcurrent 12 outputs a signal on the third input shaper control signal output stage 4, which translates the transistors of the output stage 5 in the closed state, and the signal at the third input of the microprocessor 14, which through the fifth output disables the power source 9 through the fourth output signal of the overcurrent on the display unit. Sensor operating current 11 is a stand-alone amplifier with a controllable gain, i.e. the input of the amplifier are galvanically isolated from the output and is galvanically isolated power supply, the boost control is also carried out through isolation. From the output of the sensor operating current 11 signal is supplied to the bandpass filter 13, emitting a low-frequency component of the signal of 4 Hz, which is supplied to the first input of the microprocessor 14, which provides advanced digital signal processing. Depending on the difference between the value of the set switch 15 "current selection" and the actual current value, the microprocessor from the first output to the input of the first DAC 16 signal increase, if the actual current is lower is installed, and to reduce, if higher. Initial state from which to begin the installation of current: voltage at the output of the first DAC is 0, the voltage of the output stage of the 20th Century, When the setting of the selected current, the microprocessor 14 begins to increase the output voltage of the first DAC 16, respectively, starts to increase the amplitude of the signal at the load 8, if the value of the specified voltage is reached and triggered the limit sensor voltage 10, the microprocessor 14 is proportional to the supply voltage reduces the output voltage of the first DAC 16 and issues a command to the power source 9 to increase the voltage (40 sets), i.e. by changing the voltage of the output stage 20 to 40 In preserved the maximum current achieved in the 20th Century, Then the microprocessor continues to increase the output voltage of the first DAC to achieve the set current. If the value of the specified voltage is reached, the sensor activates the limit voltage begins a transition to the next level of power, similar to that described. If the power output stage 100 In the sensor activates voltage limitation, this means that to achieve a given current value will fail and the microprocessor turns off the power source 9 and an output stage, and displays on the display unit signal "limitation of voltage". If the operating current is set, what about the microprocessor outputs a signal to the display unit exit normal" continuing to monitor the current value.

To protect circuit elements from surges on the load side of a circuit protection overvoltage 30, which is triggered by the ejection voltage exceeding the power output stage, commuting emissions on the power bus having a large capacitive component in the emission smoothed. To improve the reliability of the device have been added to the protection circuit from overheating. Temperature sensors installed on the heat sink transistors of the output stage and the power source housing 9, which is the most thermally loaded elements of the device. When exceeding the upper critical temperature, the microprocessor 14 disables the output stage 5 and the power source 9 and displays on the display unit signal "overheating", the generator goes into a passive mode until the temperature drops below the upper critical, then automatically restarts the generator. To increase the operation time of the generator near the upper critical temperature inside the sealed enclosure of the generator has a fan that turns on when exceeding 40°aligning the temperature field inside the body, and turned off when reduced below 30°C.

Pulse modulators 2 and 3 can be performed on the chip series AD790, the power source 9 on the module power supply MP4-1P - 1P - 1P - 1P - 1P and power module LPT45 company ASTEC, Dutch is to limit voltage 10 on the chip series AD790 and LL, sensor operating current 11 on the chip series AD210, AD261-5, AD5260 and TMA, sensor overcurrent 12, based on the current sensor CSNE151-002, the chip series AD790, LL and MM, band-pass filter 13 on the chip series AD822, the second DAC 16 on-chip series AD7243 oscillator 17 on-chip series LN, the frequency divider 18 on the chip series II and II, counter-divider 19 on-chip series 74HCT4040AN, the ROM 20 on-chip series ATS, the first DAC 21 on-chip series AD767, the one-shot 22 on the chip series IS, scheme shortening account 23 on the chip series LI, TM, dual switch 26 on-chip series ADG736, reference voltage source 27 on-chip series AD780, the integrators 28 and 29 on the chip series AD825, the protection circuit surge (overvoltage) 30 diodes SF34.

Was made laboratory model, which confirmed the operability of the claimed device.

The proposed device allows to obtain the maximum output power (300 W) in a wider range of load impedance (8 Ohms resistance), to improve the reliability and accuracy of setting current signal generator (not less than 5%). The protection circuit surge (overvoltage) allows you to maintain the efficiency of the generator in a wide range of loads with inductive component of the impedance of not more than 30 m is N.

1. A signal generator that contains the driver signals, pulse modulators, the outputs of which are connected to first and second inputs of the formation pattern of the control signals output stage, respectively, the outputs of which are connected to the inputs of the output stage, the outputs of which are connected to the inputs of filters low frequencies, the outputs of which are connected to the load, the power source is connected to the bus output stage, characterized in that the Converter feedback contains the sensor operating current, the sensor overcurrent, bandpass filter, a microprocessor, switch the "current selection" and the first d / a Converter, whose input is connected to the first output of the microprocessor, the second output of which connected to the input of the installation of the sensor conversion factor operating current, the output of which is connected to the input of a bandpass filter, the output of which is connected to the first input of the microprocessor, a second input connected to the output of the limit sensor voltage, the input of which is connected with the load sensor input overcurrent included in the supply circuit of the load, and the output is connected to the third input shaping circuit control signals output stage and the third input of the microprocessor, a fourth input connected to the switch "current selection", the driver signals the gain connected in series oscillator, a frequency divider, a counter-divider, a persistent storage device and the second d / a Converter, one-shot, scheme shortening account, switch the selection of the frequency signal, the output of which is connected to a second input of a permanent mass storage device, the second input of the second digital to analog Converter connected to the output of the one-shot, an input connected to the second output of the frequency divider, the third output of which is connected to the first input of the differential shortening account, the second input of which is connected to the output of the counter-divider, the output of the circuit shortening account is connected to a second input of the counter-divider, the third input of the second digital to analog Converter connected to the output of the first digital-analog Converter, inputs of the clock generator, comprising a dual switch, switch for alternately outputs the signals from the source of reference voltage and zero tires, a source of reference voltage, the first integrator, the inputs of which are connected to the outputs of the dual switch, respectively, the first input of the voltage reference connected to the first input of the dual switch, a second input connected to the second output of the frequency divider, the outputs of the first and second integrators are connected to the inputs of pulse modulators matched with the public, the first inputs are connected to the output of the second digital-to-analog Converter.

2. The device according to claim 1, characterized in that the input protection circuit against overvoltage, the inputs of which are connected to the terminals of the load and the bus power supply output stage.

3. The device according to claim 1, characterized in that the input of the first temperature sensor mounted on the heat sink of the output stage, the output of which is connected to the fifth input of the microprocessor, and a second temperature sensor mounted on the power source output stage, the first output of which is connected to the sixth input of the microprocessor, and the second output fan; a display unit, an input connected to the fourth input of the microprocessor.



 

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