Digital device for demodulation of discontinuous signals in multi-beam communication channel

FIELD: radio engineering.

SUBSTANCE: known digital device for demodulation of discontinuous signals in multi-beam communication channel, having block for transformation of input signal, solving circuit, shift register and demodulation block, consisting of N serially connected detection blocks and N-input adder, additionally has (M-1) demodulation blocks and M-input adder, and in each of N blocks for detecting each of M demodulation blocks, additionally inserted are power measuring device and device for forming weight coefficient.

EFFECT: higher resistance of receipt to interference and compatibility of device with multi-position signals receipt.

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The invention relates to the field of transmission of discrete information and is intended for use in KB radio channel and other channels of communication, exposed to intersymbol interference.

There are devices that use in the process of receiving information in multipath channel feedback principle for solving the problem. The closest device, which can be considered the prototype is "adaptive corrector intersymbol distortion" by A.S. 879786 the USSR, CL N 04 3/04 [1]. This concealer contains a crucial block and the shift register, each of the N taps through which one of the N correlators connected to the first input of the corresponding N multiplier products, the first of which is through the first subtraction unit is connected with the joint second inputs of the correlators, the first of which is connected to the first input of the phase detector and the second subtraction unit and the adder, and to improve the accuracy of the correction introduced N-1 additional blocks subtraction, N delay elements, N-1 additional phase detectors, N-1 weighting multiplier products and shaper of weights.

However, this device does not have sufficient immunity, as it is calculated at the sampling rate of the signal is equal to one reference on the premise that leads to a lack of use of the signal energy in Addition, the algorithm for computing the weighting coefficients takes into account the impact on the reliability of receiving only the amplitude and phase relationships between the readings of the impulse response of the channel and does not take into account the influence of additive noise.

Applied in the device of the algorithm for computing the weighting coefficients calculated only receive a single signal phase telegraphy (on-off signals) and not suitable for the reception of signals of higher multiplicity: 4-position, 8-position, etc. In this device for the evaluation of the signals of the interference components and to perform the operation "remove manipulations applied a simple multiplier products that are also suitable for on-off signals of the phase telegraphy and not suitable for the reception of signals of higher multiplicity.

The objective of the invention is the increased robustness of the admission and ensuring the applicability of the device to receive the power signals.

The solution is achieved by the digital demodulation of digital signals in multipath communication channel that contains the unit conversion of the input signal, the final circuit, the shift register and the demodulation unit, which consists of N series-connected detection units and N-Vodolaga adder, each detection unit contains a delay element signal, koger is ntny detector, the weight multiplier, myCitadel and drive, and the input detection unit connected to the input of delay element signal and the first input of the coherent detector, the output of which through the weight multiplier is connected with the respective input N-Vodolaga adder and the second input of the coherent detector is connected to the output of the drive, while the output of delay element connected to the first input of vicites whose output is the output of the detecting unit, and the input of each of the i-th detection unit is connected to the output of the (i-1)th detection unit, and the input of the first detection unit is connected with the corresponding output of the conversion unit of the input signal, the input which is the input device and the yield of N-Vodolaga adder is the output of the demodulation unit, to increase the noise immunity of the acceptance and usability of the reception power of signals introduced (M-1) additional blocks demodulation, and M-input accumulating adder, the inputs of which are connected to the outputs of the respective blocks of the demodulator, and the output of which is connected to the input of a decisive scheme, the output of which is the output device and connected to the input of the shift register, with each detection unit of each block demodulation entered modulator element calculations, shaper Vescovo what about the factor and the scheme of withdrawal manipulation, moreover, the modulator first input coupled with the output of the accumulator, a second input connected to the output of the deciding circuit, and the output is connected to a second input of myCitadel, the element of the computing power of its input and output coupled to the output vicites and the input of the shaper weighting factor, respectively, and the output of the shaper is the weighting factor is connected with the second input of the weighting multiplier, a first input of the differential removal of the manipulations connected with the corresponding output of the shift register, and the second inputs of all schemes removing manipulation of each block demodulation connected to the output of vicites last detection unit of the same block demodulation.

The drawing shows a structural diagram of the device that is used for demodulation of the phase telegraphy. The device works in digital form. Input device is the unit conversion of the input signal, the traditional devices digital signal processing. The functions of this block are the discretization in time, the quantization level, the transform at zero frequency and the splitting into quadrature components of the input signal. As a result of these transformations on the output of this block is a sequence of digital samples (samples) of the quadrature signal components, etc is dostavlyaemykh together the complex envelope of the signal. The sampling frequency of the input signal is selected from the calculation - M integrated samples per received symbol duration T. In the drawing for simplicity depicts a special case for M=2, i.e. in this case the signal is sampled at a rate of 2 samples per symbol interval T/2 between them. The minimum possible value of M is equal to 1 - one sample per symbol, as in the device prototype. With increasing values of M improves the quality of reception, but at the same time demand more resources of the computing device.

Connections between circuit elements, shown by bold lines are used for transmitting two quadrature digital samples representing in the aggregate the complex envelope signal (ReZ+jImZ). In accordance with this those schema elements that receive such a complex signal, are the processing units of the complex signal. Connections that are shown by thin lines are used for transmitting digital samples of real signals and for transmitting characters.

The device shown in the drawing, consists of a block transform of the input signal 1, two identical blocks demodulation 2, adder 14, a determining circuit 15 and the shift register 17, consisting of (N-1) elements 16. In the General case, the number of blocks demodulation is equal to M, Each block demodulation 2 contains N identical modules is s detection 12 and N-shadowy the adder 13. Each detection unit includes a coherent detector 3, the weight multiplier 4, the delay element 5, the modulator 6, myCitadel 7, element calculations 8, shaper weighting factor 9, the circuit unlocks manipulation 10 and the memory 11.

The value of N is chosen equal to the maximum expected length of the impulse response of the channel, expressed in number of clock intervals, So In this case N-th (last) detection unit is for detecting a first time of arrival of the interference component of the input signal, the (M-1)-th block for detecting the second interference component, etc. Thus, the first block is intended for detection of the N-th interference component, the latest by the time of arrival.

Coherent detector 3 is a block that performs a multiplication of a complex value Z representing the input signal to a complex conjugate value N of the reference signal according to the algorithm:

(ReX+jImX)=(ReZ·ReH+ImZ·ImH)+j(ImZ·ReH-ReZ·ImH).

The output signal X of the coherent detector is a soft decision.

The weight multiplier 4 performs the weighting function soft decisions of the coherent detector by multiplying it by a weighting factor K.

Delay element 5 stores the integrated signal long is inost clock interval T.

The modulator 6 is a device that carries a modulation reference signal. For signals of the phase - modulation is carried out by rotating the vector reference signal at a certain angle in accordance with a modulation table that establishes the correspondence between the transmitted symbol and the phase of the modulated signal. A reference signal in this case is the corresponding component of the evaluation of the impulse response of the channel.

MyCitadel 7 carries out the subtraction of complex quantities: (ReZ+jImZ)=(ReX-ReY)+j(ImX-ImY), where ReX, ImX - quadrature components of the reducing, ReY, ImY - quadrature components wichitaeagle, ReZ, ImZ - quadrature components of the desired difference.

Element calculations 8 computes the squared magnitude of a complex signal Z|2=(ReZ)2+(ImZ)2and averaging, forming the output is the average power P of the signal. The shaper is the weighting factor 9 carries out the calculation of 1/R, is inversely proportional to the average signal power P.

The scheme of removing manipulation 10 is a device that under the impact of the decision on the symbol rotation vector of the input signal at the same angle as in the modulation process, but in the opposite direction.

The drive 11 is connected to the output of the circuit is cleared the manipulation I, performs accumulation and averaging the estimates of the corresponding component of the impulse response of the channel.

Consider the work shown in the drawing the device in steady state. The purpose of ease of processing we assume that the input signal is manipulated by the method of single FT (2-position signal).

On the top of the demodulation unit of the processing block input 1 receives the even-numbered samples of the complex envelope of the input signal, and the lower block demodulation - odd sample. Therefore, each of the blocks demodulation 2 samples come with an interval equal to the duration of the symbol So

Consider the work of one (e.g., upper) block demodulation, the remaining M-1 blocks demodulation operate in the same manner.

The incoming signal passes successively through the delay element 5 and the subtraction unit 7 of each of the N detection units 12.

In the device before the input of each of the coherent detector 3, except the first, are compensated delayed interference components. To do this in blocks subtracting 7 has been consistently subtracting the generated estimates of the interference components of the input signal, since the N-th component to the first.

The formation of a specific evaluation of the interference component of the input signal OS is done using the modulator 6, to one input of which the signal evaluation, the corresponding component of the impulse response of the channel, and on the other input - decision symbol, adopted at the previous clock interval.

The input sample at the input of the l-th detection unit can be represented as a superposition of the timing signals of the interference components:

where Zk,l- sampling of the signal at the input of the l-th detection unit at k-th clock interval,

Hi- countdown complex envelope of the i-th component of the impulse response of the channel,

b is the transmitted symbol,

U is the complex envelope of the noise component of the sample,

N is the number of components of the impulse response of the channel.

At the entrance of the coherent detector 3 of the first detection unit (the left in the drawing) there is a full sample of the input signal, which is not compensated no interference component. At the entrance of the coherent detector of the second detection unit is input to the previous clock interval in which compensated the latest by the time of arrival of the interference component. This is because in the first block of the detainee in item 5 of the input signal in myCitadel 7 subtracts the most recent assessment by the time of arrival of the interference component of the signal is which is formed in the modulator 6. In the input signal of the third order of the coherent detector is compensated for two interference components, the last time coming. As can be seen from the expression (1), this process consistently results in a gradual reduction of the interference components at the inputs of the subsequent coherent detectors. And, finally, in the input signal of the N-th order of the coherent detector is present only on the first time of arrival of the interference component, and all trailing interference components are compensated.

Output vicites 7 the last of the detecting unit is formed of a residual signal, which compensated for all the interference components of the input signal. This residual signal is used for automatic estimation of the impulse response of the channel, which is carried out using a set of schemas removing manipulation 10 and drives 11.

To the second input of each of the coherent detectors from the output of the corresponding memory 11 receives the count of the corresponding component of the impulse response of the channel. Soft decision outputs of all coherent detectors 3 block demodulation through weighing 4 multiplier products arrive at N-shadowy the adder 13. The output signals of the adders 13 all blocks demodulation 2 comes on the turn of a General M-Vodolaga adder 14, the output of which is connected decisive scheme 15. Output decisive schema is the output device. Thus, the decision is made by weighted sum of the soft decisions of all coherent detectors.

The signals of the individual interference components at the outputs of the coherent detectors carry information about the same character, but adopted in different clock intervals. So we can assume that they represent a set of spaced in time signals, and, when added together, due to the delay elements 5 align the signals in time.

It is known [2]that the optimal rule of addition of the separated signals involves weighting them in proportion to the expected signal amplitude and inversely proportional to the capacity of the existing channel interference. In the proposed device, weighting in proportion to the expected amplitude of the signal provided by the fact that the modules are integrated timing reference signals of coherent detectors, the outputs of the respective drives 11, equal to the expected amplitudes of the received signals of the respective interference components.

To implement the weighting is inversely proportional to the interference power soft decision detectors are served in the N-shadowy the adder 13 through the multiplier products 4. The weights for these p is remotely each detection unit is formed by using the corresponding element calculations 8 and shaper weight ratio of 9.

From consideration of the detection unit can be seen that due to the action of the delay element 5 and the modulator 6, the signal at the output of vicites 7 constitutes a barrier having an impact on the reception signal of the coherent detector in the last clock interval. This signal contains a noise component, and the amount of interference components, delayed by the time of arrival relative to the detectable component. In calculating the power of 8 calculates the average of the square of the module of this interference, which is the estimate of the interference power P and the imaging unit 9 calculates the reciprocal, which is the weight coefficient K=1/R. Thus, we can assume that the device is a weighting addition of the spread over time of the individual interference components of the input signal, proportional to the expected signal amplitude and inversely proportional to the power current at each corresponding coherent detector noise, realizing near-optimal algorithm for addition.

Decisions taken decisive scheme 15, arrive at the output of the device and simultaneously to the input of the shift register 17.

The output of the last of vicites 7 is formed, the reference residual signal which contains the noise component and the corresponding error compensation of the interference composing the X. This residual signal is used to calculate the samples of the impulse response of the channel, which is carried out using schemas removing manipulation 10 and 11 drives in each of the detection units 2. At the first inputs of all schemes removing manipulation 10 of the same demodulation unit 2 receives the residual signal output from the last vicites 7 this block demodulation, and the second input receives the appropriate decision with the corresponding output of the shift register 17. The output drives 11 are formed corresponding timing estimate impulse response of the channel.

Introduction to the unit (M-1) additional blocks demodulation and accounting interference power when calculating weighting coefficients provides a solution to the first problem of the invention is the increased robustness of welcome and introduction to the operation of the modulators and schemes of removing manipulation instead multiplier products solved the second object of the invention is the provision applicability to receive the power signals.

Sources of information

1. A.S. 879786 the USSR, CL N 04 3/04. Adaptive corrector intersymbol distortion, Bpin and other Published 1981, bull. No. 41.

2. Andronov I., Fink L. Transmission of discrete messages on parallel channels. Publishing house "Soviet radio", Moscow, 1971, p.55.

Digital device for demodulating discre the data signals in multipath communication channel, contains the unit conversion of the input signal, the final circuit, the shift register and the demodulation unit, which consists of N series-connected detection units and N-Vodolaga adder, each detection unit contains a delay element signal, a coherent detector, the weight multiplier, myCitadel and drive, and the input detection unit connected to the input of delay element signal and the first input of the coherent detector, the output of which through the weight multiplier is connected with the respective input N-Vodolaga adder and the second input of the coherent detector is connected to the output of the drive, and the output of the delay element is connected to the first output myCitadel, exit which is the output of the detection unit, and the input of each of the i-th detection unit is connected to the output of the (i-1)th detection unit, and the input of the first detection unit is connected with the corresponding output of the conversion unit of the input signal, the input of which is the input device and the yield of N-Vodolaga adder is the output of the demodulation unit, characterized in that the device is introduced (M-1) additional blocks demodulation and M-shadowy the adder, the inputs of which are connected to the outputs of the respective blocks of the demodulator, and the output of which is connected to the input of a decisive diagram, o is d which is the output device and connected to the input of the shift register, in each detection unit of each block demodulation entered modulator element calculations, the shaper is the weighting factor and the removal of the manipulation, and the modulator first input coupled with the output of the accumulator, a second input connected to the output of the deciding circuit, and the output is connected to a second input of myCitadel, the element of the computing power of its input and output coupled to the output vicites and the input of the shaper weighting factor, respectively, and the output of the shaper is the weighting factor is connected with the second input of the weighting multiplier, a first input of the differential removal of the manipulations connected with the corresponding output of the shift register, and the second inputs of all schemes removing manipulation of each from demodulation blocks attached to the output of vicites last detection unit of the same block demodulation.



 

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