Device and method for extracting data from buffer and loading these into buffer

FIELD: technology for encoding and decoding content, in particular, extracting data from buffer and loading them into buffer.

SUBSTANCE: method includes picking data from buffer in response to execution of data access command, while buffer contains multiple data storage devices, forming additional unified address space with bit level addressing. If picked data are contained in source data storage device and in next data storage device, fragment of picked data from source data storage device is concatenated with remaining fragment of picked data from next data storage device to form picked data as continuous block, picked data are stored in assignment device for storing data. Method for loading data into buffer includes storing data into buffer, while if data size exceeds capacity of device for storing data, data are split onto fragments and stored in source storage device and next device. After saving of aforementioned data, data from storage device are moved to memorizing device.

EFFECT: higher speed of loading and data extraction.

5 cl, 26 dwg

 

The technical field

The invention relates generally to the field of encoding and decoding. In particular, the invention relates to extracting data from the buffer and load them into the buffer.

Prior art

Multimedia applications for over ten years are driving the development of microprocessors. In fact, most of the updates in computing in recent years due to multimedia applications, mainly in the consumer market segments, but also in the production segments for entertainment, advanced education and communication. However, in future multimedia applications will require more computing power. As a result, the use of personal computers (PC) tomorrow will be even more focused on audiovisual effects, and will also be facilitated and, more importantly, computing activities will be combined with the connection.

Accordingly, the display images and play audio and video are becoming increasingly popular application of modern computing devices. Unfortunately, the amount of data required for applications of this type, is constantly increasing. As a result, the growth of computing power, memory and disk capacity, as well as transport is Noah capacity networks, contributed to the creation and use of larger and higher quality images, as well as a longer and better quality audio and video. However, the content used by these applications is usually stored in a compressed format to save memory and resources of the communication channel.

As a result, applications that support content, such as audio and video data, is actually limited to playing audio and video. Content, such as audio and video data, usually takes the form of a stream, i.e. the transmitted content is reproduced as received. To ensure the streaming mode, the data is compressed before transmission, in order to overcome the bandwidth limitations of the network and to satisfy the requirements of the play. As a result, the audio and video should be decoded in real time, regardless of whether they are streamed over the network or stored on the local device. In addition, the computational requirements increase as improve the quality of the audio and the video resolution and increase the size of the frame. Thus, the process of decompressing the video data is one of the most power consuming computing resources in popular applications.

Unfortunately, at the present time an increase in computational costs, then ka is the bandwidth and quality of service remain constant. You can predict that this imbalance will determine future applications. As a result, an ever-expanding class of new algorithms and applications aimed at getting rid of computational complexity, achieving higher quality audio and video, reducing bit rates (bits), the creation of easy to use tools, etc. Accordingly, this imbalance will lead to the creation of new compression standards, new processing algorithms and the paradigm of end-to-end application in which many operations in different domains will be needed to ensure proper delivery of media from the encoding and encryption to transmit, subsequent processing and management.

Currently used compression algorithms, such as the joint group of experts on pictures (JPEG) and JPEG 2000 image compression, as well as the methods of the group of experts on the moving images (MPEG), MPEG-1, MPEG-2 and MPEG-4 video and audio compression combine the two approaches. First, the data is processed using the transform, and then quantuum. Then perform compression by moving the perceived and meaningful data. This so-called lossy because the original data is not fully restored at decompression. The results of the first stage is subjected to further compression of the statistical method to the financing. Statistical coding is that the original characters of data (in this case, the quantized transformation coefficients) replace characters, the length of which depends on the frequency of the source data symbols. The most frequent source data symbols are replaced by short symbols, statistical code, and the least frequency replace characters long statistical code. Therefore, the character length in the statistical code changes with their bit length.

The decoding steps of the image is performed in the reverse order in relation to the stages of coding. Statistical decoding precedes transformation decoding, etc. unfortunately, statistical decoding, there is little data parallelism because of data dependencies that originate from different relations of characters. Different architectural teams are usually effective for the conversion operations, but are usually not useful for statistical decoding. However, with increasing possibilities of architectural teams due to the larger registers and new instructions increases the proportion of time required for statistical decoding and playback applications multimedia. Accordingly, improvements in the statistical decoding lag behind improvements transformational decode the simulation.

Therefore, there remains a need to overcome one or more limitations in the above existence.

Brief description of drawings

Illustrative and non-restrictive description of the present invention is given with reference to the figures of the attached drawings, in which:

figure 1 - block diagram of a conventional computer system known from the prior art in which the ideas of the present invention can be implemented in one embodiment of the present invention;

figure 2 - block diagram of the decoder of content that can be used in a computer system, depicted in figure 1, according to a variant implementation of the present invention;

figa - block diagram block of the statistical decoder decoding the content shown in figure 2, according to another variant implementation of the present invention;

figv diagram of the target device (destination) data storage according to one variant of implementation of the present invention;

4 is a block diagram of the data conversion in the data storage device according to another variant implementation of the present invention;

figa-5D is a block diagram of reading data from one or more storage devices of the data buffer according to another variant implementation of the present invention;

6 is a block diagram of moderateto, which can be used in a computer system, depicted in figure 1, according to another variant implementation of the present invention;

figa and 7B is a block diagram of unit statistical coding is depicted in Fig.6, according to another variant implementation of the present invention;

Fig - block diagram of the algorithm of the method of accessing data in the data buffer according to a variant implementation of the present invention;

Fig.9 is a block diagram of the algorithm for more ways to load data into the data buffer according to another variant implementation of the present invention;

figure 10 - block diagram of the algorithm additional checks apply whether the requested data to one or more storage devices in the data buffer according to another variant implementation of the present invention;

11 is a block diagram of the algorithm for more ways to save data in the destination device, the data storage according to one variant of implementation of the present invention;

Fig - block diagram of the algorithm for more ways of combining data applicable to one or more storage devices of the data buffer according to an illustrative variant implementation of the present invention;

Fig - block diagram of the algorithm dopolnitelnoj the method of loading data into the storage device of the data buffer in the implementation of access to all data in the data buffer according to another variant implementation of the present invention;

Fig - block diagram of the algorithm for more of the way it decodes the selected data according to another variant implementation of the present invention;

Fig - block diagram of the decoding algorithm of the data in the destination data storage device according to an illustrative variant implementation of the present invention;

Fig - block diagram of the algorithm of the method of loading data into the data buffer that contains many storage devices according to a variant implementation of the present invention;

Fig - block diagram of the algorithm for encoding the data before loading it into the data buffer according to another variant implementation of the present invention;

Fig - block diagram of the algorithm additional method, implemented in response to the command load data according to another variant implementation of the present invention;

Fig - block diagram of the algorithm additional way to determine whether surpass downloadable data capacity of the finite data storage devices in the data buffer according to another variant implementation of the present invention;

Fig - block diagram of the algorithm of the method of loading data into the data buffer, which contains a register storing data and register data loading according to an illustrative variant implementation of the present invention;

Fig - the block diagram of algorithm of additional data encoding method selected from a memory device, according to another variant implementation of the present invention.

Detailed description

Below is described a method and apparatus for extracting data from the buffer and load them into the buffer. The method includes selecting data from the data buffer with the bitwise addressing in response to the command data access. The data buffer from which the selected data includes multiple data storage devices, one or more of which initially contains the selected data. Accordingly, many storage devices forms a single address space with targeting at the bit level. When selected, data flows from the source storage device to the next storage device of the data buffer, the fragment selected data from the source storage device concatenated (combined) with the remaining piece of selected data from the following storage devices for forming the selected data as a contiguous block. Finally, after the formation of the selected data, the selected data is stored in the destination device for data storage.

In the following description, for purposes of explanation, numerous specific details are set out on what I provide a comprehensive understanding of the present invention. However, experts in this field will understand that the present invention can be realized in practice without some of these specific details. In addition, in the following description, the examples, and various examples shown in the accompanying drawings are illustrative. However, these examples should not be construed in a restrictive sense since they are only meant to provide examples of the present invention, and not to provide an exhaustive list of all possible implementations of the present invention. In other instances, well-known structures and devices are shown in block diagrams in order to avoid unnecessary details of the present invention.

According to a variant implementation of the methods of the present invention are realized in the form of machine-executable commands. In accordance with the command processor of a General or special purpose programmable commands, performs the steps of the present invention. Alternatively, the steps of the present invention can be executed by specific hardware components that contain hardware-implemented logic to implement the methods, or any combination of programmed computer components and specialized hardware components. The present invention can be provided in the form of computer software etc the product, which may include a machine or computer-naschityvaetsya the media that stores commands that can be used to program a computer (or other electronic devices or systems) for the implementation process that meets the present invention. Computer-readable media may include, but are not limited to, floppy disks, optical disks, CD-ROMs, read-only (CD-ROMs), and magneto-optical disks, permanent memory (ROM), random access memory (RAM), erasable programmable permanent memory (EPROM), electrically erasable programmable permanent memory (EEPROM), magnetic or optical cards, flash memory, etc.

SYSTEM

Described below is depicted in figure 1 a block diagram showing main components of a computer system 200 in which you can implement storage format according to the invention. Computer system 200 includes a controller 220 of the display. The controller 220 of the display represents, for example, a video adapter (VGA), super VGA (SVGA) and the like, the Controller 220 generates display pixel data for a display device 290, which represents, for example, a CRT, flat-panel display and the like, the Pixel data are generated in accordance with one or Ino the refresh rate of the display 290 (for example, 60 Hz, 72 Hz, 75 Hz, and so on) and the horizontal and vertical resolution of the image formed on the display (for example, 640x480 pixels, 1024x768 pixels, 800x600 etc). The controller 220 of the display can generate a continuous stream of pixel data on the characteristic frequency of the display 290.

The controller 220 of the display is also equipped with a memory display 222, which stores the pixel data in text, graphic or video modes for output to the display 290. The main processor 210 is connected to the controller 220 of the display via bus 270 and updates the contents of the memory 222 of the display by changing the image displayed on the display 290. Bus 270 may represent, for example, the bus connection of peripheral components (PCI), etc. System memory 280 may be connected to the host processor 210 to store data.

Hardware decoder 230 content is provided for decoding video and audio data, image data and voice data ("content"), for example, video data in the format panel on the moving images (MPEG). MPEG video data received from the source MPEG video data (for example, CD-ROM etc). Alternatively, the decoder 230 content is implemented, for example, in the form of traditional software decoder 282 stored in the system memory 280. The decoded data is output in the system memory 280 or directly in memory 222 var is her.

Computer system 200 further comprises an encoder 240 content intended for encoding data content, for example, image data, audio, video and speech data generated by the computer system 200. Once the content is encoded by the encoder 240 content-encoded content can be stored in system memory 280 or transfer, including streamed by the CPU 210 to the target device (destination device), which is not shown. Alternatively, the encoder 240 content is implemented, for example, in the form of traditional software encoder 284 stored in system memory 280.

Unfortunately, the decoder 230 content, as well as the encoder 240 content of a computer system 200, to a small extent, uses or does not use parallelism when the above statistical coding and decoding, for example, an arithmetic encoding and decoding or encoding and decoding the Huffman method. In fact, in statistical coding and decoding, there is little data parallelism because of data dependencies, due to the different character lengths. Although many teams architecture with a single instruction stream and multiple data streams (SIMD) is very effective for the conversion operations (described above), these commands are of little use for statistics the definition of encoding and decoding.

In addition, with increasing possibilities of SIMD instructions due to the larger registers and new instructions increases the proportion of time required for statistical decoding and encoding applications, playing multimedia information. Accordingly, improvements in the statistical decoding lag behind improvements transformational decoding (decoding conversion). Examples of methods of statistical compression using characters from the variable length code include, but are not limited to, the Huffman coding and arithmetic coding. Therefore, the person skilled in the art it is obvious that the ideas of the present invention (described below) can be implemented both in software and in hardware decoders/encoders content.

Figure 2 shows the components of the decoder 250 of content that can be used in a computer system 200 according to the first variant implementation of the present invention. In the described embodiment, the bit stream 252 content, which represents, for example, MPEG data, JPEG data, and the like, is received from the content source, for example, the source of the MPEG data, data source, JPEG, etc. and may be subjected to decoding and decompression in the following way. Although the configuration of the decoder 250 content corresponds to the decoder MEG, presents an implementation option is meant to be illustrative and are not to be considered restrictive sense.

Accordingly, the decoder 250 content takes the bit stream 252 MPEG block 300 statistical decoding. However, unlike traditional statistical decoder block 300 statistical decoding uses the buffer addressing for bit-level to minimize the time required for decoding a received bit stream 252, which is described in more detail below with reference to figa. Accordingly, the block 300 statistical decoding determines the decoded symbol and the length of the decoded symbol to the received bit stream 252 that arrives at the block 256 decoding the run length.

Block 256 DDS receives the decoded symbol and the length of the decoded symbol from block 300 statistical decoding to generate a quantized block 258, which goes to the block of the inverse quantization block (s) 262. Block 262 OK performs inverse quantization of the quantized block 258 to generate the frequency spectrum 264 quantized block. Then block 266 inverse discrete cosine transform (ODCP) quantized block 268.

The generated decoded block 268 is supplied to the block 270 motion compensation (BKD). Motion compensation is carried is tsetse on BKD 270 to recreate data 272 MPEG. Finally, the block 274 color conversion converts the data 272 MPEG to the color space of red, green, blue (GLC) for generating image 280. However, unlike traditional decoders content, such as a hardware decoder 230 or software decoder 282 content of a computer system 200, depicted in figure 1, the decoder uses content block 300 statistical decoding, additionally described with reference to figa.

According figa unit 300 statistical decoding uses the buffer 302 data that contains multiple devices 304 (304-1,... 304-N) data storage. In one embodiment, the buffer 302 uses data registers addressing for bit-level, which may include 128-bit MMX registers. However, experts in this field it is obvious that the storage device buffer 302, the data is not limited to the registers and, in General, include any data storage device capable of storing digital data. Thus, received data 250 bitstream downloaded to multiple devices 304 store the data buffer 302 data.

Unfortunately, the encoded bit stream 250 uses the coded symbols of variable length. As described above, the statistical coding replaces the original data characters encoded symbols, the length to which that depends on the frequency of the source data symbols, the most common source symbols are replaced with short symbols statistical code, and the most rare are replaced by long symbols statistical code. Therefore, in order to capture the encoded symbol having a variable length, you need to select data from the data buffer.

Therefore, the delay in the capture of coded variable length, create difficulties in statistical coding on traditional decoders. Therefore, the block 300 statistical decoding uses the buffer addressing for bit-level, which is able to capture pieces of data that are distributed among the various storage devices of the data buffer 302 of the data used to capture the coded symbols of variable length. For this unit statistical decoding can choose the piece of data in the source device 304 storing data that is included in the buffer 302 data and store the fragment data in the target device 342 (the destination device) for storing data, depicted in FIGU, which can be placed in the register file 340 block 300 statistical decoding.

Accordingly, according to the ideas of the present invention, the processor 330, in response to the command detection data, can determine the position of the first unit in the mouth is oiste destination for data storage. Defining this position, the processor 330 may, according to one variant of implementation, use the table 360 shift (360-1,..., 360-N) in the cache memory 350 block 300 statistical decoding. At this point, the processor 330 can read the table 360 shift to get the offset value using the position of the first unit as an index (pointer). After determining the values of the shift device 342 destination for data storage, for example, expose to shift to the right in accordance with a shift value. After the shift to the right processor can read the decoded symbol from a table 352 decode (352-1,..., 352-N) of the cache memory 350 to determine the decoded symbol based on the value of the device 342 storing the shifted data.

Finally, the length of the decoded symbol is read from a table 352 decoding using the values of the target device 342 storage shifted to the right data. Accordingly, using the buffer addressing for bit-level, unit statistical decoding can identify the words or characters of the code in the data storage devices with minimal administrative overhead. In other words, unlike traditional statistical decoder block 300 statistical decoding avoids many of the tests used traditional statistical decoders to determine the position per the first unit, that often leads to significant delays in statistical decoding on the decoder content. In addition, after determining the coded symbols according to a variant implementation, use the pointer that indicates the starting position of the following coded character or code word based on the length of the code word.

Returning to figa, note that in an alternative embodiment, the cache memory 350 contains only tables 352 decoding and does not use tables 360 shift. Accordingly, in the described embodiment, the decode tables may include a value or values, the length of the series to the next non-zero values and the length of the code word. Therefore, when a fragment of the streaming video data is read from the device 304 for storing data in the data buffer 302, the selected fragment data, you can apply a mask to extract data from the search data fragment.

As such, table 352 decoding queried using search data, while in one of the tables 352 decoding is not found corresponding element. According to one variant of implementation, when the bit length of the data search is less than the length of the code word, the coding table returns unsuitable (void) response. Accordingly, data of the CIP is ka added extra bits and made a new appeal to the table 352 decoding, until it is returned to a suitable value. Therefore, the selected fragment data, after determining its position, is decoded using the level values/value length / value series and the values of the code words obtained from a table 352 decoding. In addition, after determining the coded symbols according to a variant implementation, use the pointer that indicates the starting position of the following coded character or code word based on the length of the code word.

Figure 4 presents the data conversion device 304 store the data buffer 302 data. In the example shown the data in the device 304 storing data may be initially stored in order starting with the least significant bits". The original ordering of the data, in General, is based on the methodology of the organization of the data in the corresponding computing architecture. Unfortunately, MPEG, the most common video format organizes data in order beginning with the oldest bit. As a result, the decoding of the MPEG data requires conversion from the order starting from the low-order bits" to order "from bits". Alternatively, the data can initially be stored in the order beginning with the oldest bits", thereby avoiding the conversion.

Therefore, in the device 304 storing data handling the data in response to the command data conversion. According to the described variant of implementation, the address of the byte order is carried out by one team for each size of the register. However, according to an alternative method of handling byte order is in 32-bit registers in a single command. Therefore, 32-bit word, bytes which have been rearranged in 32-bit registers are loaded into the larger registers. After downloading the appeal of the order of these 32-bit words produced by a single command.

On figa-5D shows the buffer 302 data block 300 statistical coding, using the original device 304-1 storage (R0) and the auxiliary device 304-2 storage (R1). As described, various devices 304 store the data buffer 302 provide data addressing at the bit level, which can be used to speed up the encoding and decoding of data content. Accordingly, the data bit stream are initially loaded into the device 304-1 storage R0. After filling the storage device R0, the data bit stream is stored in the device 304-2 store data R1. Thus, in the described embodiment, data storage devices R0 and R1 contain unread data bit stream.

On FIGU shows storage devices R0 and R1 and Dann is e, accessed on the borders of bits. As a result, the bits are single elements that determine the volume (size) of data, which can be accessed in the buffer 302 data. Therefore, the minimum difference between the addresses of access to storage devices is one bit. Accordingly, in the described embodiment, the buffer 302 data contains a set of registers addressing for bit-level. However, experts in this field it is obvious that as the storage device addressing bit-level can be used and other equipment, capable of storing data.

Thus the initial bit address 306 of the selected current data 314 in the device 304-1 storage R0 and on the basis of the number of bits that need to be read, you can calculate the end position 308 of the requested data. In addition, according to one variant of implementation of the data storage devices contain the flag 310 to determine whether there was access to each piece of data of the bit stream in the corresponding storage device. Regarding the device 304-1 storage R0, the device 304-1 R0 contains the read data 312, the current data 314 and unread data 316.

On figs depicts an implementation option buffer 302 data when C is protivenya data is contained in multiple data storage devices (from R0 to R1). Upon detection of such a case is the merge operation registers. Accordingly, in response to execution of the merge command registers the current data from the storage device R0 and current data from the storage device R1 is read and copied to the destination device for storing data as a contiguous block. In the described embodiment, the destination device for data storage is a register that can be contained in the register file 340 block 300 statistical coding depicted in figa. However, the destination device for data storage can be a equipment of any type capable of storing digital data.

According to alternative implementation, if the location data (multiple ledgers), unnecessary or read data in the storage device R0 can be moved to make space for the data that reside in the storage device R1. After shifting unread data outside of the data storage device R0 current data in the storage device R1 can be shifted in the storage device R0. Therefore, when the current data contained in the storage device R0, the data can be copied in the destination device for storing given the s as a continuous module (block). After copying all the data in the storage device R0 are unnecessary read data and therefore in the storage device (R0) you can download the latest data.

On fig.5D depicts an implementation option, when the buffer 302 data acts as a circular buffer. In this case, when the current data array selected from the device 304-1 storage R0 and device 304-2 store data R1, the device 304-1 storage R0 no longer contain unread data. Accordingly, as shown in fig.5D, access to all data in the device 304-1 storage R0 was produced, resulting in a flag 310. Additionally, in the described embodiment, the position of the device 304-1 storage R0 is moved to the end of the buffer 302 to load data into the storage device (R0) from the input data stream. Therefore, in the described embodiment, the data buffer operates as a circular buffer. In other words, in the present example, all the data at the next access operation is selected from the device 304-1 storage R1. in some embodiments, the implementation of parts of the data access overlap, resulting in access to some bits more than once, while in other cases, access to certain bits are not implemented at all. When et is m, in the described embodiments implement a method of specifying the address of the desired data to which you want to access in the buffer 302 data is provided by receiving the first ID register, which may consist of a number type register, in which the first bit is to be accessed. The method also includes the bit address specified bit position in the register, the number of bits that need to access, and (in most cases) the second case in which there are some data that you want to access, if the range of bits to be access, beyond the original register.

In the described embodiment, the start bit position (306) of the current data and the number of bits subjected to extraction are stored in two additional registers (not shown). However, in an alternative embodiment, the specification data to which you want to access, is provided by the reception address 306 of the first bit and the address 308 last bit instead of the address 306 of the first bits and the number of data bits that are accessed. Address 308 last bit may be associated with a register (R1304-2), which contains the last bit, and can be associated with the first register (R0304-1), in which case it is equal to the sum of the address of the first bit and the number Bito is, you want to access. In the latter case, the last address 308 may refer to a position in another register (R1304-2), if the address is 308 last bit beyond the maximum address of the first register (R0304-1). In this case, the buffer actually has a single address space.

Thus the data accessed is transferred to the destination register 342 (destination register)shown in figv. The destination register 342 or device 304 storage can be the case the same or different type with respect to the devices 304 for storing data in the buffer 302 data. According to one variant of implementation of the data accessed, loaded into the lower or Junior position in the register (see figv). In addition, when requested access to the data, requiring the merge command registers, the data tallies (concatenate) so that the final device 342 storing data is loaded contiguous block of data.

In many cases, the data accessed from the buffer 302 of the data does not fill the target device 342 (destination device) data storage. In these cases, the target device 342 storage padded with zeros, i.e. the bits in the destination register 342, which are not part of the data accessed by setting who are stated to be zero. The zero padded to the target device 342 storing data in one embodiment is carried out via data load, which loads the data from the buffer to the target device 342 data storage (see figv). In addition, when the flag is set 310 that indicates that all data in the corresponding storage device was accessed, the flag is reset when the command is executed load additional data into the data buffer. While the processor waits for data to set the flag.

However, in an alternative embodiment, determining that all the data in the register was accessed, by comparing the highest address in register (high order bit position in register with the sum of the address (location bits) of the first bits 306, to which you accessed, and the number of bits to be accessed. Then, if this amount is greater than the maximum address in register (position SB), then all data from the register was accessed. Accordingly, in the above-described embodiment, when all the data in the register was accessed, the data from the bit stream 252 is loaded into the register and the register is moved to the end of the buffer, so that access to the newly loaded data is carried out after other data already in the buffer.

Finally, the buffer 302 data bitwise addressing support software optimization, for example, functions of the loop and bypass. This cycle can take place so that you don't need to check after decoding each symbol to all the data in the register was accessed. Accordingly, the number of times the loop can be statically set aside equal to the bit length of the register x (the number of registers in the buffer minus one)divided by the maximum number of bits available in the buffer. For example, if the buffer length is 128 bits and the number of registers in the buffer is equal to two, it is guaranteed to be 128x(2-1), which is 128 bits in the buffer. Therefore, if the maximum available 17 bits, the buffer will never go beyond the data after 128 divided by 17, which is equal to 7 queries. Accordingly, the buffer will be "crawled" seven times.

Figure 6 shows the block diagram of the components of the encoder 400 of content that can be used in a computer system 100 according to another variant implementation of the present invention. The encoder 400 content initially receives the content data 402, for example, images, audio and video. Accordingly, for each data block in the stream 402 of the image encoder 400 performs five steps to obtain the encoded block. In the first stage block 404 motion estimation assesses the movement is of, to take advantage of temporal redundancies among images. Accordingly, the block 406 motion estimation generates a motion vector for each block in the macroblock data 402 of the content that goes on the block discrete cosine transform (block 408 DCT).

The block 408 DCT takes the original data block and performs discrete cosine transform on the block to find its frequency spectrum. This frequency range 410 is supplied to the block quantization 412. Block quantization 412 clears a large number of small values of the received frequency spectrum, thereby reducing the number of different frequency values in the frequency spectrum. This phase quantization stage is "lossy" encoding process, and the degree of quantization is defined using a matrix quantization and quantization coefficients.

After quantization is run-length series and statistical coding using quantized block 414, adopted from block 412 quantization. The coding block length compressed (block 416 DPT) encodes the non-zero elements and the number of zeros between them to compress data 402 content. Finally, the block 450 statistical encoding defines the code of variable length and the size of the variable length code from the received data encoded in the lengths series is th, to generate a coded bit stream 490. However, unlike traditional statistical coders, block 450 statistical coding uses the above-described buffer 480 addressing bit-level to save the encoded data characters before storing coded data characters, for example, in the memory device shown in figa and 7B.

On figa shows a block statistical coding, corresponding illustrative variant implementation of the present invention. Block 450 statistical coding contains a microprocessor 452, which reads or receives the value you want to encode. In the case of MPEG are two values, namely the level and length of the series, which can be coded. Using the obtained values, the processor applies a table 462 search (browse)button to define a code of variable length and the size of the variable length code for the received data. However when the code is variable length and the size of the variable length code is determined, block 450 statistical coding can save encoded characters in the buffer 480 data. When this encoded symbols stored in the device 482 storage (482-1,... 482-N)until the buffer 480 data is filled.

However, when using the above methods the data buffer, although it uses many of the devices storing the Oia data, contains a single address space, so after saving the data 494 in the storage device of the data buffer additional data or coded symbols are separated by the first segment 496 (stored in 482-1) and the second fragment 498 and enter the following device 482-2 data storage, as shown in figv. Accordingly, the device 482 data storage using a pointer that keeps track of the next bit position at which data can be stored. In addition, the filling device storing data symbols in the data storage device can be moved in memory and, as described above, the storage device can move to the final position in the data buffer, so it can be used to save additional coded data characters at the same time as other data stored in the memory.

According to one variant of implementation, the registers 482 buffer 480 data are named so that they have the same position in the buffer. Accordingly, when making access to the buffer data register is the destination, the data in the register 482-1 save the data buffer 480 data stored in the destination register, while the register 482-2 boot data is loaded from memory. In the case when the register storing records in the buffer 480 data, the data is saved to the register 482-1 save the data buffer 480 data at a time as the data in the register 482-2 boot data is loaded into memory. Accordingly, the physical registers alternately play the role of registers load and store, in order to ensure continuity of operations of recording or storing in a data buffer, for example, as shown in fig.5D. Now let's describe the procedural ways of implementing the ideas of the present invention.

The PRINCIPLE of OPERATION

On Fig shows a block diagram of the algorithm of the method 500 retrieve data from the buffer 302 with targeting at the bit level, for example, depicted in figa. At step 520, the processing determination is made whether the command executed data access. In response to the command data access is the choice of the data from the buffer 302 data in step 522 processing. Then at step 524, the processing determination is made, do (pass) data from a source device 304-1 store data on the following device 304-2 data storage in the buffer 302 data (see figs). If defined data distribution (location in multiple devices), then at step 538 processing. Otherwise, move to step 560 processing. At step 538, the processing section of the selected data from the source device 304-1 storage data and the piece of selected data from the next device 304-2 storage concatenate to inspire the Finance selected data in a contiguous block. Finally, at step 560 processing the selected data is stored in the device 342 destination data storage.

Figure 9 shows a block diagram of the algorithm secondary method 502 load input bit stream data in the buffer 502 data (see figa-5D). At step 504, the processing determination is made whether the command executed data downloads. In response to the command load data at step 506, the data loaded into the buffer 302 data that spans multiple storage devices in the data buffer. Accordingly, as described above, the data buffer uses a variety of data storage devices, which, according to one variant of implementation, are 128-bit registers. In addition, the above function merge registers allows the data buffer to act as a single address space, which allows the data to take one or more registers in the data buffer.

After loading the data buffer is step 508 processing. At step 508, the processing determination is made whether the command executed data conversion. Accordingly, in response to the command data conversion is the conversion of the order of the data in the devices 304 data storage data buffer 302 at step 510 processing (see figure 4). On completion is transitionto step 520 processing, listed on Fig. In the above-described embodiments, the implementation of the data conversion includes conversion of order "since the low-order bits" to order "from bits". However, the data conversion is not limited to the described example. Figure 10 shows a block diagram of the algorithm for more ways 526 definitions of data distribution (see figs). Accordingly, at step 528, the processing performed by the reception device value, a pointing device 304-1 data storage in the buffer 302 data. After taking to the stage 530 processing is receiving a bit value indicating the number of bits need to be read from the source device 304-1 data storage. Finally, at step 532 processing is welcome address 306 of the requested data in the source device 304-1 data storage. Finally, at step 534 processing, it is determined whether one or more bits of the requested data 314 in the following device 304-1 data storage in the buffer 302 data.

As described above, methods for the determination of distribution (transition) data include comparing the remaining capacity of the source device 304-1 data storage with the received bit value indicating the number of bits of the requested data 314. In this case, if the number of bits exceeds the remaining capacity is here, data is distributed on (transferred to) the following storage device. Alternatively, you can take the starting address 306 of the requested data and end address 308 of the requested data, so that, when the start address 306 and an end address 308 belong to different storage devices, registers the distribution (location in the neighboring devices) data. In case of detection of the distribution of data transition to step 538 processing indicated on Fig. Otherwise, move to step 560 processing indicated on Fig.

Figure 11 depicts the logical block diagram of an additional method 590 save the selected data (see figv). At step 592 processing the receiving address of the destination storage device. After taking step 594, the data is stored in the device 342 destination for data storage, starting at the least significant bit (MB). Finally, at step 596 is zero-fill the empty plots bits (SB) device 342 destination for data storage by specifying an empty sites is equal to zero.

On Fig shows a block diagram of the algorithm (sequence of operations) additional ways of concatenating or merging data registers that apply to one or more devices is Istv data storage (see figs). At step 542 processing selection device 304-1 retention of data from the buffer 302 data. At step 544, the processing determination is made to whether all data in the selected storage device generated data access. According to one variant of implementation of this definition is based on the flag 310 of the access specified in figa-5C. According to alternative implementation, the determination is made by ascertaining see whether the pointer 306 the beginning of the data and the pointer 308 of the end of the data in the same register. If not, then logged data dissemination. If all data in the selected storage device generated data access, at step 546 processing flag is set, access to the data. Finally, at step 548 for each storage device in the data buffer are repeated stages 542-546.

On Fig shows an additional method 550 load the data into the storage device of the data buffer, when it was accessed data in the storage device (see figa-5D). At step 552, the processing from the buffer 302 data selection device 304-1 data storage. Then at step 554 processing, it is determined whether the flag 310 of access. If the flag 310 of access is selected, then at step 556 processing in the selected storage device, the data is loaded more Dan the s input data stream. Finally, at step 558 processing for each storage device in the data buffer are repeated stages 552-556 processing.

On Fig shows a block diagram of the algorithm for more ways 562 decoding data stored in the target device 342 data storage (see figv). At step 564 processing decoded data in the device 342 destination data storage. Then at step 580 processing the decoded data is written over the data contained in the destination storage device.

On Fig shows a block diagram of the algorithm for more ways 566 decoding data in the destination device, the data storage is performed at step 568 processing shown in Fig. At step 568 processing, it is determined whether the command data discovery. In response to the command data discovery, at step 570 processing, it is determined the position 344 of the first units in the target device 342 data storage, for example, shown in figv. Then at step 572 processing, the offset value is read from the table 360 shift using the position of the first unit as an index (pointer) to determine the offset value. At step 574 processing is the shift in device 342 destination storage data according to the shift value.

Then at step 576 processing decoded the first character is read from the table 352 search on the basis of the offset value in the destination device, the data storage as an index (see figa). Finally, at step 578, the processing length of the decoded symbol is read from a table 352 search the length of the symbol using the offset value for the storage device as the index. When this command detection data avoids many of the traditional tests used traditional statistical decoders to determine the position of the first unit, which is used to detect the code word in a received bit stream. Therefore, after detecting the code word pointer is used to mark the start of the next code word in the corresponding device 304 store the data buffer 302 data.

Alternatively, as described above with reference to figa, the cache memory may be limited to tables 353 decoding, which contain the length of the code words, the value of the level value and the length value of the series. According to the described variant of implementation to the end device 342 (destination device) storing data mask is applied to define masked/search data. After determining the masked data masked data is used to access the table 352 decoding in the cache memory 350. If the requested data is contained in the table, the value of the length of the code words, the value of the level value and the length value series suleka is carried out from a single data item, read from the table. Otherwise, if data is not contained in the table, the read code word to indicate that the data in table no. When this process is repeated in other tables, the cache memory 350, until you have found the desired data.

On Fig presents the method 600 save the data in the buffer 480 data addressing at the bit level, for example, depicted in figa and 7B. At step 630, the processing determination is made whether the command to load the data. In response to the command load data at step 640, the processing determination is made whether the size 494 data 492 subject to loading, the remaining capacity of 484 device 482-1 destination to store the data in the buffer 480 data. In this case, at step 670 processing.

Otherwise, data is loaded from or saved to the target device 482 storage data buffer 480 data. At step 670, the data 494 divided into the first fragment 496 and the second fragment 498. After separation, at step 672 processing the first fragment 496 is loaded into the device 482-1 destination for data storage. Then the second piece of data 498 loaded in the following storage device of the data buffer (see figv). Finally, at step 676, the data in the device 482-1 destination to store the data is moved, for example, in the device 490 PA is ATI.

On Fig presents an additional method 602 encodes the data before storing the data in the buffer 480 data addressing at the bit level. At step 604, the processing selects data 418 from the source storage device. After the choice in step 606, the processing of the selected data is encoded. Then, at step 618 processing, the encoded data is stored in the source storage device. Finally, at step 620, the processing command load data to load the data-encoded in one or more storage devices in the data buffer. After executing the transition to stage 630, the processing indicated on Fig.

On Fig shows a block diagram of the algorithm for more ways 632 carried out in response to the command load data. At step 634 processing is the initial address of the data in the device 482 destination to store the data buffer 480 data. Then at step 636 processing receive size data indicating the number of data bits that can be stored in the device 482 destination for data storage. Finally, at step 638 processing are the addresses of the source storage device, which originally housed the data. After taking the transition to step 640 processing, specified the on Fig.

On Fig shows a block diagram of the algorithm for more ways 642 determine whether the size of data to be loaded, the remaining capacity of the device 482-1 destination buffer 480 data indicated on figv. Accordingly, at step 644 processing is determined by the remaining capacity 484 current device 482-1 destination to store the data in the buffer 480 data. Then at step 646 processing determination is made, exceeds if adopted by the size of 494 data remaining capacity 484. In this case, at step 640 processing. Otherwise, a transition is made to step 650 processing indicated on Fig.

At step 648 the size 494 data exceeds the remaining capacity of 484 device 482-1 destination for storage. Accordingly, the data must be divided by the first segment 496 and the second fragment 498 at step 640, the processing shown in Fig. The separation is accomplished by selecting the number of bits of the received data 492 equal to the remaining capacity 484 device 482-1 destination for data storage. The selected data form the first fragment 496 data 492, which is to be stored in the target device (the destination device) data storage. Then the remaining data portion 492 is used as the second fragment 498 data, so that the second fragment 498 can be saved in the following device 482-2 storage data buffer 480 Dan who's. Accordingly, the possibility of separating the data allows the data buffer to function as a single address space, so by completing the corresponding storage devices in the data buffer data can be written into memory.

On Fig presents the method, according to which the buffer 480 data, for example, depicted in figa and FIGU, uses register 482-1 store and register 482-2 load the data into as many registers in the buffer 480 data. Accordingly, in response to the data access commands to save the data in the buffer 480 data determination is made whether the current register in the buffer 480 data register 482-1 data storage. If Yes, then at step 656 processing. At step 656, it is determined whether the register 482-1 save additional data capacity. If the register 482-1 save data provides additional capacity, then at step 658 processing.

At step 658, the data from the source storage device is stored in the register 482-1 data storage. Otherwise, the register 482-1 save the data filled in and must now function as a register 482-1 load data. According to this register 482-2 load data used in the buffer 480 data as a circular buffer, so that the register 482-2 load data completely Zap LAN data and therefore requires writing data to the memory 490. On the contrary, the register data saving is the register that contains the additional capacity, and in which is loaded received data in response to the command load data.

Therefore, at step 660 processing, the register data saving after filling renamed register to load the data. Then, at step 662, the data in the register load data is stored in the device 490 memory. Then at step 664 processing, it is determined whether the register 482-2 load data. In this case, step 662 processing is repeated until the devastation of the register 482-2 load data. After the devastation of the register 482-2 download data at step 666 processing. At step 666 processing, it is determined whether there are additional data in the source storage device. If there is more data in the source storage device register 482-2 load data is renamed to register 482-1 save the data, then it is possible to load additional data. Otherwise, return to step 650 processing indicated on Fig, and the execution of the method ends here.

Finally, on Fig shows a block diagram of the algorithm additional encoding the selected data, carried out at the step 606, the processing shown in Fig. At step 610, the processing PR is taken off, reading one or more values stored data. Then at step 612, the processing reads a character code of a variable length and variable length code from the lookup tables of characters specified on figa. Professionals in this field know that the coded symbols and length are generated based on the frequency of data items in the data stream. Finally, at step 614, the processing steps 610 and 612, the processing is repeated for each value of the stored data.

ALTERNATIVE IMPLEMENTATION

The above-described several aspects of one implementation of the data buffer addressing for bit level to provide advanced statistical encoding/decoding. However, various implementations of the buffer addressing for bit-level provide numerous features including, complementing, supporting and/or replacement of the above signs. Signs may be implemented as part of the imaging system or as part of a hardware/software encoder/decoder in various implementations. In addition, in the above description, for illustrative purposes, uses a particular system of concepts to ensure a clear understanding of the invention. However, experts in this field know that for the practical implementation of the invention does not require specific details.

In addition, although described here option is sushestvennee associated with the buffer addressing for bit-level, professionals in this field know that the ideas of the present invention can be applied to other systems. In fact, systems for buffering operations, bit level correspond to the ideas of the present invention and are not beyond the scope and essence of the present invention. The above-described embodiments of were chosen and described for illustrative explanations of the principles of the invention and its practical applications. These implementation options have been selected, that other experts in this area could best use the invention and various embodiments of different versions, suitable for a specific use.

It should be understood that although in the foregoing description includes numerous characteristics and advantages of various embodiments of the present invention together with details of the structure and functions of various embodiments of the invention, this disclosure is for illustrative purpose only. In some cases, only some modules are described in detail with reference to one such variant implementation. However, it is understood and expected that such modules can be used in other embodiments of the invention. The changes are valid in the details, especially regarding the structure and management, according to stuudy the principles of the present invention, are fully consistent with the broad interpretation of the terms used in the attached claims.

The present invention provides numerous advantages over known methods. The present invention provides the ability to speed up applications that use or require access to bits and intensive manipulation of bits. The described methods provide greater efficiency and improved performance (speed) in manipulating and retrieving data from a register that is used as a buffer, thereby accelerating statistical encoding and decoding.

The characteristics of the present invention provide performance benefits for a variety of applications that use bitmap access and manipulation, such as fast operation handling of endianness, which facilitate efficient conversion "since the low-order bits" in the "starting with the bits". In addition, the data buffer supports data access and preservation of data on the limits of bits based on the amount of data that is being accessed, stored and measured in bits, not bytes. The buffer can contain multiple registers that act as a circular buffer. When accessing bits from one register data in each the m register can be loaded into memory. Therefore, while maintaining the sequence of bits in one data register in another can be stored in memory.

The sequence of bits loaded from the data buffer or stored in the data buffer, may take several registers. Finally, the team determines the position of the first data unit in the bit buffer to be accessed. The position of the first unit can be used to determine the number of bits to shift the bits in the destination register. This is done using a single command and without assistance conditional transitions, in contrast to the traditional implementation of statistical decoding. The resulting data in the destination register are used to access the lookup table. The bit buffer may also allow software optimization loop.

The above-described illustrative embodiments of and best mode, but the disclosed embodiments of permit modifications and variations, not beyond the scope of the invention described in the following claims.

1. How to retrieve data of variable bit length of the data buffer containing the stages on which selects, in response to the command data access requested data from the data buffer and the data buffer includes multiple data storage devices, in which the original is the material contains the entered data, includes the requested data, determines that the requested data resides in the source storage device and the next storage device in the data buffer in accordance with the operand with bit address and operand with bit length of the command data access so that the data buffer is addressed at the bit level, concatenates a fragment of the requested data selected from the source storage device, and the remaining fragment of the requested data from the next data storage device for the formation of the requested data as a contiguous block, and store the requested data in the target storage device.

2. The method according to claim 1, characterized in that it further comprises the steps preceding the step of selecting data in response to the command load data loaded into the data buffer input data from the input data stream, which is plenty of storage in the data buffer, and upon receipt of the command data conversion pay in response to the command conversion data the order of the input data loaded in the data buffer.

3. The method according to claim 1, characterized in that the step of concatenating further comprises the steps, after which access to each piece of input data in one or more devices is Istvan data storage data buffer, update flag data access for each storage device in which all data was accessed, select the storage device from the set of storage devices in the data buffer, if the storage device flag is set, access to the data is loaded into the selected data storage device, additional data from the input data stream, after the download completes, the storage device updates the flag data access for the selected storage device and repeating the operations of selecting, downloading, and updating for each storage device in the data buffer.

4. The method according to claim 1, characterized in that it further comprises the steps on which decode the data contained in the destination device for storing data, and writes the decoded data over the data contained in the destination device for data storage.

5. The method according to claim 4, characterized in that the step of decoding data further comprises the steps are determined in response to the command detecting the position of the first data unit to the destination device for storing data, read the table offset to determine the offset value using the position of the first unit as the index, perform a shift in the destination device for storing data on the base offset value, read the decoded symbol from a lookup table using the shifted value in the destination device for storing data as an index, and reads the length of the decoded symbol table symbol search using the shifted value in the destination device for storing data as an index.

6. The method according to claim 1, characterized in that the selection step further comprises the steps, which take the operand with the value of the device, indicating the source storage device in the data buffer, and the receiving operand with bit address indicates where in the source storage device is the first bit of the requested data, and the operand with the bit value specifies the number of bits to be read from the source storage device, and whether the data are in one or more storage devices in the data buffer is determined on the basis of the bit addresses of the source storage device and the bit values of data what if the last data bit is located in the following storage device after the source storage device, data is placed in the next storage device.

7. The method according to claim 1, characterized in that the step of saving the selected data in the destination device for data storage more the tion contains stages, which take the address of the destination device for storing data, save data, starting with the least significant position of the destination device for data storage, and complement zeros empty area of the destination device storage by setting bits in an empty part equal to zero.

8. The method according to claim 1, characterized in that the loading phase of the data buffer further comprises the steps that take the address of the data in the memory device where the data resides input data stream and access the data of the input data stream, starting with a received memory address.

9. The method according to claim 1, characterized in that it further comprises the steps are bypassed in response to the command of the sweep cycle, the data buffer a predetermined number of times based on the counting of sets of storage devices used in the data buffer, minus one, divided by the maximum number of bits in the data buffer, to which you have access, at any time.

10. The method of loading the input data with a variable bit length data buffer containing phases, which remain, in response to the command load data, the data in the above-mentioned buffer data from the source storage device and the data buffer contains multiple destination devices for storing data, determine what the size of the input data exceeds the remaining capacity of the destination device for storing data in accordance with the operand with bit address and operand with bit length of the command data load so that the data buffer is addressed at the bit level in the data buffer, divide the input data on the first fragment and the second fragment, keep the first piece of data in the destination device for data storage, keep the second piece of data in one or more of the following devices is the destination for storage of the data buffer and upon completion of storing data in the device buffer data, move the data in the data buffer in the memory device.

11. The method according to claim 10, characterized in that it further comprises the stages before saving, which selects the content data, requiring encoding, encode the selected data to generate encoded data, store the encoded data in the source storage device and executes the command load data to load the encoded data to the destination device for storing data of the data buffer.

12. The method according to claim 10, characterized in that the step of saving further comprises the steps that take the address of the source storage device, in which initially contains data, the operand with bit address specifies the start position in the destination device for storing data of the data buffer, which must be stored in the input data and the operand with bit length specifies the number of data bits.

Cab of claim 10, characterized in that the phase separation of data further comprises the steps, which determine the remaining capacity of the destination device for data storage, compare the remaining capacity of the destination device for storing data size of the received data and if the data size exceeds the remaining capacity of the selected storage device, divide data into the first fragment, the size of which is equal to the remaining capacity of the destination device for storing data, and a second fragment containing the remainder of the data.

14. The method according to claim 10, wherein the data buffer includes a register storing data and register data download as many data storage devices, and further comprises the steps are still register save data provides additional capacity, save data from the source storage device in the register save data until the data is saved in the register save data, load data from a register load the data into the memory device, upon completion of loading data into the memory device, storing data from the source storage device in the register load data and the filling of the register save data, load data from a register save the data in the memory device, in this case data loading rename the, so it functioned as a register save data to save the data from the source storage device and the register data saving rename to function as a register load data to load the data stored in the memory device.

15. The method according to claim 11, wherein the step of encoding further comprises the steps, which determine the value of the frequency data for each data item of the selected data content, choose the appropriate length of the encoded symbol for each data item on the basis of the respective values of the frequency data, choose the appropriate coded symbol for each data item in the selected data content based on the appropriate length of the symbol for each element of data to form one or more code words as coded data, and overwrite the one or more code words in the source storage device.

16. A machine readable storage medium containing data that, when making access to the machine, instruct the machine to perform the following operations: in response to the command data access, select the requested data from the data buffer, the data buffer contains a number of storage devices that initially the gain of the input data, including the requested data, determines that the requested data resides in the source storage device and the next storage device in the data buffer according to the operand with bit address and operand with bit length of the command data access so that the data buffer is addressable at the byte level, concatenates the piece of selected data from the source storage device and the remaining fragment of the requested data from the following storage devices for forming the selected data as a contiguous block, and store the requested data in the destination device for data storage.

17. A machine readable storage medium according to item 16, wherein prior to selecting data operations include loading in response to the command load data into the data buffer input data from the input stream of data that reside in multiple data storage devices in the data buffer, and upon receipt of the command data conversion treatment in response to the command conversion data about data loaded in the data buffer.

18. A machine readable storage medium according to item 16, characterized in that the concatenation additionally includes operations comprising: after accessing each piece of input data in one or more is trojstvo data storage buffer data update flag data access for each storage device, in which all data was accessed, select the storage device from the set of storage devices in the data buffer, after the establishment of the flag data access to the storage device loaded in the selected data storage device additional data from the input data stream, upon completion of the boot storage device, the update flag of the data access for the selected storage device and retry the selection, downloading, and updating for each storage device in the data buffer.

19. A machine readable storage medium according to item 16, wherein the operations also include decoding the data contained in the destination device for storing data, and writes the decoded data over the data contained in the destination device for data storage.

20. A machine readable storage medium according to claim 19, characterized in that the decoding of the additional data includes a transaction that contains the definition in response to the command detection data positions of the first unit in the destination device for storing the data, reading the table offset to determine the offset value using the position of the first unit as an index shift in the destination device for storing data on the basis meant for the I-shift, reading the decoded symbol from a lookup table using out the values in the destination device for storing data as an index and read the length of the decoded symbol table symbol search using out the values in the destination device for storing data as an index.

21. A machine readable storage medium according to item 16, characterized in that the selection additionally includes entries containing the receiving operand with the value of the device, indicating the source storage device in the data buffer, when this operand with bit address indicates where in the source storage device is the first bit of the requested data, and the operand with the bit value specifies the number of bits to be read from the source storage device, and when this determination are whether the data in one or more storage devices in the data buffer is performed based on the bit addresses of the source storage device and the bit the data values so that, if the last data bit is located in the following storage device after the source storage device, the data contains the following data storage device.

22. A machine readable storage medium according to clause 16, otlichayushiesya, what save the selected data in the destination device for storing data additionally includes entries containing the receiving address of the destination device for storing data, save data, starting with the LSB of the destination device for storing data, and the zero padded to an empty part of the destination device for storing by setting bits in the empty part equal to zero.

23. A machine readable storage medium according to item 16, wherein the loading buffer data additionally includes entries containing the reception of the address data in the memory device where the data resides input data stream, and data access input data stream, starting with a received memory address.

24. A machine readable storage medium according to item 16, wherein the operations also include bypass in response to the command scan cycle data buffer a certain number of times based on the number in the set of storage devices used in the data buffer, minus one, divided by the maximum number of bits in the data buffer, to which you have access at any time.

25. A machine readable storage medium containing software commands in the implementation of access to the machine, instruct the machine to perform operations with the storage in response to the command load data input buffer data from the source storage device, moreover, the data buffer contains a number of data storage devices, determining that the data size exceeds the remaining capacity of the destination device for storing data in the data buffer in accordance with the operand with bit address and operand with bit length of the command load data so that the data buffer is addressed at the bit level, the separation of data on the first fragment and the second fragment, the preservation of the first piece of data in the destination device for storing data, keeping the second piece of data in one or more of the following storage devices of the data buffer and upon completion of storing the data into the data buffer for transferring data from the destination device to data storage in the device memory.

26. A machine readable storage medium for p. 25, characterized in that before the save operation also include selecting the data content that requires coding, encoding the selected data for forming coded data, the preservation of the coded data in the source storage device and the command load data to load the encoded data to the destination device for storing data of the data buffer.

27. A machine readable storage medium for p. 25, characterized in that the retaining additionally includes entries containing the PR shall eat the addresses of the source storage device, in which initially contains data, the operand with bit address specifies the start position in the destination device for storing data of the data buffer, which must be stored, and the operand with bit length specifies the number of data bits.

28. A machine readable storage medium for p. 25, characterized in that the separation of data additionally includes operations that define the values of the frequency data of each data item of the selected data content, the choice of an appropriate length encoded symbols for each data item on the basis of the respective values of the frequency data, the choice of the corresponding encoded symbols for each data item of the selected data content based on the respective lengths of the symbol of each data element for the formation of one or more code words as coded data, and overwriting one or more code words in the source storage device.

29. A machine readable storage medium for p. 25, wherein the data buffer includes a register storing data and register data download as many data storage devices, and operations also include: while the register save data provides additional capacity, storing data and the output data storage devices in the register save data while the data is saved in the register save data, download data from a register load the data into the memory device, upon completion of loading data into the memory device storing the data from the source storage device to the register data loading and filling of the register save data load data from a register storing data in the memory device renaming register load data, so that it functioned as a register save data to save the data from the source storage device, and renaming register save data so that it functioned as a case of downloading data to download data stored in the memory device.

30. A machine readable storage medium for p, wherein the encoding further includes operations that define the values of the frequency data of each data item of the selected data content, the choice of an appropriate length encoded symbols for each data item on the basis of the respective values of the frequency data, the choice of the corresponding encoded symbols for each data item of the selected data content based on the respective lengths of the symbol of each data element for the formation of one or more code words as coded data and heresies one or more code words in the source storage device.

31. The extraction device data of variable bit length of the data buffer that contains a processor having circuitry for executing commands, the data buffer that contains many storage devices so that multiple storage devices data source form address space addressable at the byte level, and a storage device connected to the processor that stores a sequence of commands that, when executed by the processor, instruct the processor to select in response to the command data access the data from the source storage device of the data buffer, to detect that the requested data resides in the source storage device and the next storage device in the data buffer in accordance with the operand with bit address and operand with bit length of the data-access commands to concatenate the piece of selected data from the source storage device and the remaining fragment of the requested data from the next data storage device for the formation of the requested data as a contiguous block, and save the selected data in the destination device for data storage.

32. The device according to p, wherein the processor is additionally prescribed in response to the command data download to save the input data is in the destination device for data storage buffer of data from the source storage device, when the data size exceeds the remaining capacity of the destination device for storing data in the data buffer, to share data on the first fragment and the second fragment, save the first piece of data in the destination device for storing the data, store the second piece of data in the next data storage device, and upon completion of storing data in the device data buffer to move data from the destination device for storing data in the memory device.

33. The device according to p, characterized in that the command concatenation additionally instructs the processor after accessing each piece of data in one or more storage devices of the data buffer to set the flag data access for each storage device in which all data was accessed, select the storage device from the set of storage devices in the data buffer after the establishment of the flag data access to the storage device, to download the selected data storage device, additional data from the input data stream after the download completes, the storage device, to reset the flag data access for the selected storage device data and repeat the select, load and reset for each storage device in the data buffer.

34. The device according to p, wherein the data buffer includes a register storing data and register data download as many data storage devices, and the processor is additionally prescribed until the register save data provides additional capacity to store data from the source storage device in the register save data until the data is saved in the register save data, download the data from the register load data into the memory device, upon completion of loading data into a memory device to store data from the source storage device in the register load data and the filling of the register save data to load data from a register to store data in memory renaming register load data, so that it functioned as a register save data to save the data from the source storage device, and renaming register save data so that it functioned as a case of downloading data to download data stored in the memory device.

35. The device according to p, wherein the data buffer includes the possibility of addressing the bit level, resulting in many of the source data storage device forms a single address space addressing bit-level.



 

Same patents:

FIELD: electric communication, namely systems for data transmitting by means of digital communication lines.

SUBSTANCE: method comprises steps of preliminarily, at reception and transmission forming R matrices of allowed vectors, each matrix has dimension m2 x m1 of unit and zero elements; then from unidimensional analog speech signal forming initial matrix of N x N elements; converting received matrix to digital one; forming rectangular matrices with dimensions N x m and m x N being digital representation of initial matrix from elements of lines of permitted vectors; transmitting elements of those rectangular matrices through digital communication circuit; correcting errors at transmission side on base of testing matching of element groups of received rectangular matrices to line elements of preliminarily formed matrices of permitted vectors; then performing inverse operations for decompacting speech messages. Method is especially suitable for telephone calls by means of digital communication systems at rate 6 - 16 k bit/s.

EFFECT: possibility for correcting errors occurred in transmitted digital trains by action of unstable parameters of communication systems and realizing telephone calls by means of low-speed digital communication lines.

5 cl, 20 dwg

The invention relates to animate three-dimensional graphical models

The invention relates to radio engineering and is intended for the discharge of compressed clock signal to a device for separating signal and the clock signal, essentially agreed with a synchronizing signal encoding device

The invention relates to the field of radio engineering, in particular to the coding information to enhance the format of the encoded signals

The invention relates to techniques for transmitting data in automated information-measuring systems, control and detection of radiation situation

The invention relates to encoding and decoding of speech

The invention relates to encoding and decoding of audio signals, particularly to a scalable encoding and decoding of audio signals for multi-streams of bits by representing data of different levels of expansion based on the basic level within the stream of bits

The invention relates to telecommunications, and in particular to the field associated with the reduction of the redundancy of transmitted information

The invention relates to methods compressor, and in particular to methods compressor for digital camcorders or other digital tape recording and reproducing device, when required editing

Converter form code // 2190928
The invention relates to the field of computer engineering and can be used in flexible computing systems with tunable information structure

The invention relates to computing and can be used for designing arithmetic devices high performance

The invention relates to computing and can be used for designing arithmetic devices high performance

FIELD: technology for encoding and decoding content, in particular, extracting data from buffer and loading them into buffer.

SUBSTANCE: method includes picking data from buffer in response to execution of data access command, while buffer contains multiple data storage devices, forming additional unified address space with bit level addressing. If picked data are contained in source data storage device and in next data storage device, fragment of picked data from source data storage device is concatenated with remaining fragment of picked data from next data storage device to form picked data as continuous block, picked data are stored in assignment device for storing data. Method for loading data into buffer includes storing data into buffer, while if data size exceeds capacity of device for storing data, data are split onto fragments and stored in source storage device and next device. After saving of aforementioned data, data from storage device are moved to memorizing device.

EFFECT: higher speed of loading and data extraction.

5 cl, 26 dwg

FIELD: information technology.

SUBSTANCE: device includes a unit for determining the maximum exponent, which consists of an m-input XOR element and m cells, each having AND elements, an XOR element, flip-flops, and a subtracting unit consisting of m cells, each having AND elements, XOR elements, an OR element, a NOT element and flip-flops.

EFFECT: faster operation due to parallel-pipeline determination of the maximum exponent through analysis of bit sections of operands, and then calculating differences between the maximum exponent and the rest of exponents of m binary numbers.

5 dwg

FIELD: information technology.

SUBSTANCE: apparatus includes a shift register, a deserialiser, a start symbol register, comparator units, a shift value register, a multiplexer, an OR logic element and a data processing unit.

EFFECT: low power consumption and high efficiency.

2 cl, 2 dwg

Shifter // 2613533

FIELD: information technology.

SUBSTANCE: shifter comprises a bidirectional shift matrix of dimension NxM, where M=log2N, from M elements cascade 2AND-2AND-2AND-3OR and 2AND-2AND-2OR, block for shifts number modification comprising a group of (M-2) OR elements, the first group of (M-1) AND elements and a group of (M-1) EXCLUSIVE OR elements, shift direction control unit comprising the second group of the (M-1) AND elements, a group of (M-1) AND elements with prohibition input, a group of (M-1) NO elements and the third group of (M-1) AND elements, zero result flag forming comprisng the first, the second and the third AND elements with prohibition input, the first and the second OR element and AND-NO element, four control inputs of direction set and the shift type.

EFFECT: increased speed, possibility to set the amount of logical shift in the bits range between 0 and N or more than N.

1 dwg, 3 tbl

FIELD: electric communication, namely systems for data transmitting by means of digital communication lines.

SUBSTANCE: method comprises steps of preliminarily, at reception and transmission forming R matrices of allowed vectors, each matrix has dimension m2 x m1 of unit and zero elements; then from unidimensional analog speech signal forming initial matrix of N x N elements; converting received matrix to digital one; forming rectangular matrices with dimensions N x m and m x N being digital representation of initial matrix from elements of lines of permitted vectors; transmitting elements of those rectangular matrices through digital communication circuit; correcting errors at transmission side on base of testing matching of element groups of received rectangular matrices to line elements of preliminarily formed matrices of permitted vectors; then performing inverse operations for decompacting speech messages. Method is especially suitable for telephone calls by means of digital communication systems at rate 6 - 16 k bit/s.

EFFECT: possibility for correcting errors occurred in transmitted digital trains by action of unstable parameters of communication systems and realizing telephone calls by means of low-speed digital communication lines.

5 cl, 20 dwg

FIELD: technology for encoding and decoding content, in particular, extracting data from buffer and loading them into buffer.

SUBSTANCE: method includes picking data from buffer in response to execution of data access command, while buffer contains multiple data storage devices, forming additional unified address space with bit level addressing. If picked data are contained in source data storage device and in next data storage device, fragment of picked data from source data storage device is concatenated with remaining fragment of picked data from next data storage device to form picked data as continuous block, picked data are stored in assignment device for storing data. Method for loading data into buffer includes storing data into buffer, while if data size exceeds capacity of device for storing data, data are split onto fragments and stored in source storage device and next device. After saving of aforementioned data, data from storage device are moved to memorizing device.

EFFECT: higher speed of loading and data extraction.

5 cl, 26 dwg

FIELD: technology for encoding multimedia objects.

SUBSTANCE: method for encoding a multimedia object includes following stages: multimedia object is encoded for producing a bit stream and information about quality is added to bit stream, while information about quality denotes quality of multimedia object relatively to given position or relatively to given part of bit stream, while information about quality is provided in quality tags, aforementioned quality tag provides a values of quality tag, and value of quality tag characterizes distortion in encoded multimedia object being reproduced, when bit stream is truncated in point, related to quality tag.

EFFECT: development of improved and efficient method/system for encoding multimedia objects.

13 cl, 2 dwg

FIELD: technology for encoding and decoding, used for storing and transferring descriptive elements of document of XML-like structure.

SUBSTANCE: method includes using at least one table, received from XML structure, while table contains identification information for unambiguous identification of each descriptive element on hierarchic tree and structural information, browsing of hierarchic image of sample stored in memory from parent descriptive element to children descriptive elements for reaching encoded descriptive element, and extraction of identification information of each browsed descriptive element, encoding of aforementioned descriptive element in form of fragment, containing aforementioned information content and series of extracted identification information.

EFFECT: provision of efficient sample encoding plan and possible expansion of binary format for further plans, determined within limits of MPEG-7.

7 cl, 6 dwg, 2 tbl

FIELD: radio engineering and television, possible use during generation, transmission and receipt of video-frames.

SUBSTANCE: in accordance to invention introduced additionally to encoder are video frames memory block, first function memory block, video frame transmission block, block for storing video frame being reproduced, while input of encoder serially, through block for forming video frames, video frames memory block, block for forming difference video frame, first frame memory block, video frame transmission block and block for memorizing video frame being reproduced is connected to second input of block for forming difference video frame, third input of which is connected to output of first function memory block, output of which is connected to second input of video frame transmission block, output of which is the output of device encoder. Introduced additionally to decoder are video frames receipt block, comparator and second function memory block, while input of decoder is serially, through video frame receipt block, second frame memory block and comparator, is connected to second video frame restoration block, third input of which is connected to output of second function memory device, and output is the output of decoder of device. Device realizes generation, transmission and receipt of code of function of distribution of screen point brightness in a series of frames, making it possible to increase the code compression coefficient.

EFFECT: increased coefficient of code compression of video frame information.

1 tbl, 1 dwg, 7 app

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