Start-stop communication system

FIELD: electrical and radio communications; underwater, radio, radio-relaying, and meteorological communication lines.

SUBSTANCE: start-stop communication system that has on sending end signal shaping and transfer unit 1 and on receiving end, receiver 2, amplitude detector 3, low-pass filter 4, first comparator 6, memory device 7, shift register 8, first decoder 9, switch 10, synchronizing unit 11, pulse shaper 12, pulse burst shaper 13, binary counters 14, 17, signal retrieval and storage device 19, and threshold device 5 is provided in addition with newly introduced second comparator 15, RS flip-flop 16, and second decoder 18.

EFFECT: reduced malfunction probability of proposed communication system.

1 cl, 3 dwg

 

The invention relates to electro - and radio and can be used in wired, radio, radio-relay and meteor scatter communication lines.

Known communication system with a transmitting side encodes the block synchronizer, temporary manipulator, the transmitter and synchroblog, and at the receiving side, the receiver agreed to a filter, a comparator, first and second storage devices, the decoder, the storage device and the sampling signal, synchroblog, shaper pulses, a binary counter and a line of communication [1]. Here the binary symbols coming from To sources of information, can be viewed as a message from binary symbols in parallel as a single source.

However, such a communication system may not be used in start-stop mode.

The closest in technical essence to the present invention is start-stop communication system described in [2], the second option, p.10 adopted for the prototype.

Scheme communication system prototype is shown in figure 1, where indicated:

on the transmission side

1 - sensor;

2 - the first threshold unit (PU);

3 - the first mass storage device (memory);

(4-I)÷(4-K) - multiplexers;

5 is a binary adder;

6 - subtractive counter (SC);

7 transmitter;

8 - trigger;

9 - the first binary counter (DS);

10 - element "NOT";

11 - scheme "OR";

12 - gene is ATOR nets pulses (sit);

at the receiving side

13 receiver;

14 - amplitude detector (BP);

15 is a lowpass filter (LPF);

16 comparator;

17 - the second storage device (memory);

18 - shift register;

19 - decoder;

20 - key;

21 - synchroblog;

22 - shaper pulse (PHI);

23 - shaper burst (DRF);

24, 25 - the second and third binary counters (DC);

the 26 - drive;

27 - second threshold device (PU);

28 - unit sample and hold signal (water economy Department);

29 - line.

The system prototype contains on the transmission side block creation and transmission of a signal, consisting of series-connected sensor 1, the first PU 2 and the first memory, 3k outputs (tire) through which the corresponding multiplexer (4-I)÷(4) is connected to the inputs of the binary adder 5, respectively. The outputs of binary adder 5 bus connected to information inputs SU 6, the output of which is connected to the input of the transmitter 7, the output of which is the output of the shaping unit and signal transmission. In addition, connected in series trigger 8, the first DS 9, the element "NOT" 10 and the scheme "OR" 11, the output of which is connected to the enable input write code SU 6. And GSE 12, the first output of which is connected to a counter input SU 6, the second output from the second input circuit "OR" 11 and a counter input of the first DC 9. At this output the PU 2 is connected to the input of the CVT 12 and the first input of the trigger 8, the second input is connected to the output of the first DC 9. The trigger output 8 is connected with the second input element "NOT" 10.

At the receiving side is connected in series receiver 13 AD 14, low-pass filter 15, a comparator 16 and the second memory 7, the output of which bus through WED 8 is connected with km inputs of the decoder 19, km outputs which are the outputs of the device. In addition, connected in series key 20, synchroblog 21, PHI 12 and FPC 23, the output of which is connected to a clock input of SR 8, connected in series, the third DC 25, a memory 26 and the second PU 27, the output of which is connected with the second input of the decoder 19. And water economy Department 28 and the second DC 24 installation inputs are interconnected with the first output PHI 22, a counter input of the third DC 25 and the gate inputs of SR 8 and the drive 26. Thus the output low-pass filter 15 is connected with the input key 20, the control input of which is connected to the third output PHI 22, the second output of which is connected to a clock input of the comparator 16 and the counting input of the second DC 24 whose outputs bus connected to information inputs of the second memory 17. Exit the water economy Department 28 is connected with the second input of the comparator 16 and the signal input of the drive 26. The output of comparator 16 is connected with the control input of the water economy Department 28, a signal input connected to the output of the LPF 15.

Start-stop communication system prototype works as follows. On the transmitting party is in the initial time (t=0) at the output of the trigger 8 applies a signal of logical "0", and the output sun 6 is a logical "1" and the transmitter does not work. At a random point in time at the output of the sensor 1 (seismic, acoustic, etc.) generates a signal of a certain level. At excess of a certain threshold in block 2 at time t1formed a short pulse (figa), which writes km-bit binary numbers (k≥1, m≥1, for example, non sensor) in the memory 3, the generator grids pulses GSE 12, the first output of which form short pulses with a repetition period τ (figb), and on the second output with a delay of 3τ - with a period of T=(2K+2)τ (pigv), and translates the trigger 8 in the state "1". The latter leads to the counter 9, which results in the S outputs of its digits (where S is the number per unit value log2(m+1)) signals are logic "0" on the buses arrive at the control inputs of multiplexers (4-1)÷(4) with (m+1) informational inputs, the first of which (not shown in figure 1) always outputs the signal of logic "0". The total number of km outputs the memory 3, which are the symbols of the message is divided into k groups of m symbols in each group (bus), so that the second inputs of all of the multiplexers 4 connect one (1)-Tye outputs ZU 3, third - (K+1)+2K-tide outputs, ... k(m+1)-K inputs - {[(m-1)k+1]÷km}-ended outputs. Thus, at time t1 output all the blocks 4 are signals of logical "0" (coming from their first inputs). Binary adder 5 has two groups of k inputs. On k inputs of the second group (figure 1 they are not shown) always outputs a binary number equal to the decimal form two, so at the same time on one of its (K+1) outputs corresponding to the second low order binary numbers, a signal of logical "1", the differential output voltage circuit OR 11 if t-t1this number is written in VS 6, its output will remain level "1" and opens the counting input that receives the pulses from the first output GSI 12 (figb). The second of them the cutting edge will reset the counter 6 and its output will be a logic level "0" until receipt of the third pulse (figure 2 g). This will open the transmitter and its output will be generated signal is a radar pulse duration τ with a certain carrier frequency. In the moment of action of the trailing edge of the first pulse at the second output GSI 12 (pigv) least significant bit of the counter 9 is set in one state and the outputs of block 4 will be the logical signals acting on their second inputs, arriving by bus from the output unit 3. In the adder 5 is a binary number in parallel will increase by two and then recorded the output pulse unit 11 in the counter 6. The time of occurrence of the zero signal at the output of the last (and the output signal p is of redakcija) depends on the value of the binary number, acting on the second inputs of the blocks 4. If it is in decimal form is q (0≤q≤(2K-1)), it will appear after a period of time τ(2+q) relative to the first pulse figv (figure 2 g - 3τ; k=2).

Similarly transfer the remaining k-bit binary numbers. When entering the last (m+1)-th pulse from the second output of the CVT 12 at the counting input of block 9 at its output, a signal is generated that returns the trigger 6 to the initial state and the output sun 6 will operate signal of logical "1". The following signal at the output of the sensor 1 can appear only after a period of time greater than or equal to 2m(2+2K)τ.

At the receiver side the received signal after filtering in the receiver 13, the amplitude detection unit 14 and filtering in low-pass filter 15 is fed to the input of the comparator 16 via the open in the initial state, the key 20 to the input of synchroblog 21 and the signal input of the water economy Department 28. In synchroblog 21, which represents an optimal meter temporary position signal (RES, [3]), in the absence of interference is formed by a short pulse corresponding to the time of the maximum of the received filtered clock (figd). In PHI 22 it creates two grid pulse on the first output period T (as figv), the second - period τ (five), and the third outputs them to the pulse duration m(2 K+2)τ, NC at this time, the key 20. In block 23 are formed of bundles of short pulses (figs). The output pulse synchroblog 21 produces counter 25 and a memory 26, and the first pulse from the first output PHI 22 (rear front) - blocks 24 and 28. At the time of actions leading edge of the first pulse at the second output PHI 22 input of the comparator compares the level signal to the second signal input from the water economy Department of 28 (in this case zero). If it is more recent, then the output of comparator 16 is formed by a voltage drop, which opens the entrance of the water economy Department 28 and allows him to memorize the output level of the LPF 15. This procedure is repeated 2Ktime. As a result, by the time of arrival of the second pulse from the first output PHI 22 in the water economy Department 28 is recorded the highest level of the output signals of the LPF 15 during the time T-2τ. Binary k-bit counter 24 is designed to count the number of pulses entering from the second output PHI 22. Whenever the output of comparator 16 appears a voltage drop readings discharges it is read in the memory 17. This allows you to fix the number of temporary positions most of the output signals of the LPF 15 on the time interval T-2τ.

At the time of actions leading edge of the second pulse (pigv) the net is on, recorded in the memory 17, is written on WED 18, and then is shifted by k bits of the output pulses PHI 23 (figs). Similarly processed output signal of the LPF 15 at other time intervals of duration T-2τ. As a result, the arrival time of the last (m+1)-th pulse from the first output PHI 22 on WED 18 is information about temporary provisions the maximum level of the output signal of the LPF 15.

The decoder 19 explicitly converts the input binary number, resulting in a binary number in parallel form on its outputs in the absence of noise in the communication line coincides with the output symbols of the memory 3. The block 26 is designed to sum the output signals of the water economy Department 28 in moments of action of the front wavefronts figv, and the counter 25 for counting.

The last (m+1)St pulse produces a zero.

At this point in time the output signal of the drive is read on input PU 27 with a threshold, and if it exceeds the threshold, the output unit 27 is formed impulse, which reads the information of the decoder 19 on its outputs.

All the blocks included in this device are known. Shapers of packets of pulses, for example, can be obtained by using schemes with the contours of the shock excitation (see the book Limportance "Pulse and digital devices), Communication, 1973, s). Blo and 16, 17, 24 and 28 were used in [1].

The lack of a prototype system is a high probability of false positives.

To eliminate this drawback in start-stop communication system with a transmitting-side block forming and signal transmission, and reception is connected in series receiver, the amplitude detector and low pass filter, connected in series to the first comparator and a storage device whose outputs bus through a shift register connected to km inputs of the first decoder, km outputs which are output devices, connected in series key, synchroblog, the pulse shaper and shaper burst, the output of which is connected to a clock input of the shift register, and the first and second binary counters, the device of the sample and hold signal and a threshold device while the output of the lowpass filter connected to the input key, the control input of which is connected to the third output of the pulse shaper, the second output of which is connected to a clock input of the first comparator and a counter input of the first binary counter, set input connected to the first output of the pulse shaper, the gate input shift register and setup the input of the sample and hold signal, the signal input to the th is connected to the signal input of the first comparator, a second input connected to the output of sample and hold signal, the control input of which is connected to the output of the first comparator, in addition, the outputs of the first binary counter bus connected to information inputs of the storage device, and the output synchroblog connected with installation input of the second binary counter, the output of the shaping unit and the signal transmission through the communication line connected to the input of the receiver, according to the invention, at the receiving side entered sequentially connected to the second comparator and RS-flip-flop, and a second decoder, and the output of the lowpass filter connected to the inputs of the first and second Comparators, the clock input of the last connected with the second output of the pulse shaper, the first output of which is connected with the second input of the RS-flip-flop, the output of which is connected to the counting input of the second binary counter whose output through the second decoder is connected with the control input of the first decoder.

The invention is directed to reducing the likelihood of false positives.

Functional diagram of the proposed start-stop communication system is presented in figure 3, where indicated:

on the transmission side

1 - forming unit and signal transmission;

at the receiving side

2 - receiver;

3 - amplitude detector (BP);

4 - low pass filter (LPF);

5 - threshold unit (PU);

6, 15, the first and second Comparators;

7 - storage device;

8 - shift register;

9, 18, the first and second decoders;

10 - key;

11 - synchroblog;

12 - pulse shaper;

13 - shaper burst;

14 to 17, the first and second binary counters;

16 - RS - trigger;

19 - device sample and hold signal (water economy Department);

the 20 line.

We offer start-stop communication system includes a transmitting-side block creation and transmission of a signal 1, and at the receiving side is connected in series receiver 2, AD 3, LPF 4, PD 5, the first comparator 6 and the memory 7, the outputs of which bus through the shift register 8 is connected with km inputs of the first decoder 9, km outputs which are the outputs of the device. In addition, connected in series 10 key, synchroblog 11, PHI 12 and DRF 13, the output of which is connected to a clock input of the shift register 8, connected in series, the second comparator 15, the RS-flip-flop 16, the second DC 17 and the second decoder 18, the output of which is connected with the control input of the first decoder 9, and the water economy Department of the 19th and the first DC 14, setting the inputs of which are connected with the second input of the RS flip-flop 16, the gate input shift register 8 and the first output PHI 12, the second output of which is connected to clock the inputs of the first 6 and 15 second comparator and a counter input of the first DC 14, the outputs of which the bus is connected to information inputs of the memory 7. The yield of PU 5 is connected to signal inputs of the second comparator 15 and the water economy Department 19, a control input connected to the output of the first comparator, the second input is connected to the output of the water economy Department 19. The output of the LPF 4 is connected with the input key 10, the control input of which is connected to the third output PHI 12. The output of synchroblog 11 is connected to the adjusting input of the second DC 17. Moreover, the transmission and reception side are connected through the communication line 20.

Start-stop communication system operates as follows.

On the transmission side block creation and transmission of a signal 1 is exactly the same as a similar block of a prototype system. At the receiver side the received signal after filtering in the receiver 2, the amplitude detection in HELL 3, filtering in low-pass filter 4 and passing through PU 5 with a threshold V is fed to the input of the comparator 6, through the open in the initial state, the key 10 to the input of synchroblog 11 and the signal input of the water economy Department 19. In synchroblog 11, representing the optimal meter temporary position signal, in the absence of interference is formed by a short pulse corresponding to the time of the maximum of the filtered clock (figd). In FI 2 it creates two grid pulse on the first output period T (as figv), W is rum - period τ (five), and the third outputs the pulse duration m·(2K+2)·τ, NC at this time, the key 10. In block 13 are formed of bundles of short pulses (figs). The output pulse synchroblog produces zero DC 17, and the first pulse from the first output PHI 12 (rear front) - blocks 14, 16, 18 and 19. At the time of actions leading edge of the first pulse at the second output PHI 12 the output signal of the comparator 6 compares the level signal to the second signal input from the water economy Department 19 (in this case zero). If he is more recent, then the output of comparator 6 is formed by a voltage drop, which opens the entrance of the water economy Department 19 and allows it to remember the level of the output signal PU 5. This procedure is repeated 2totime. As a result, by the time of arrival of the second pulse from the first output of the FM 12 in the water economy Department 19 is recorded the highest level of the output signals PU 5 during the time T-2τ. Binary k-bit counter 14 is designed to count the number of pulses entering from the second output PHI 12. Whenever the output of comparator 6 appears a voltage drop readings k digits it is read in the memory 7. This allows you to fix the number of temporary positions most of the output signals PU 5 in the time interval T-2τ./p>

At the time of actions leading edge of the second pulse (pigv) the number recorded in the memory 7, is written in CF 8 and then is shifted by k bits of the output pulses DRF 13 (figs). Similarly processed output signal PU 5 in other time intervals of duration T-2τ. As a result, the arrival time of the last (m+1)-th pulse from the first output PHI 12 WED 8 is recorded information about temporary provisions the maximum level of the output signal PU 5. The decoder 9 explicitly converts the input binary number, resulting in a binary number in parallel form on its outputs in the absence of noise in the communication line coincides with information message, formulated on the transmission side.

In the second comparator 15 in moments of action pulses from the second output PHI 12, compares the levels of the output signal of block 5 with a zero level. When exceeding last at least one RS - trigger 16 moves in one state. When it is reset by the second pulse from the first output PHI 12 at the output of block 16 generates a negative voltage, which increases the number recorded in the counter 17, per unit. If after the last output pulse unit 12 number count in decimal form is equal to m, the decoder 18 is armywide pulse which reads the information of the decoder 9 at its output. Measuring a second threshold v threshold device, you can retrieve the value of probability of false detection 10-13-10-20.

Thus, the application of the proposed start-stop communication system can reduce the chance of false positives.

All the blocks included in this device are known. Shapers of packets of pulses, for example, can be obtained by using schemes with the contours of the shock excitation (see, for example, the book Limportance "Pulse and digital devices), Communication, 1973, s). Blocks 7, 6, 14, 19 was used in [1].

Sources of information

1. RF patent №2103827, H 04 J 11/00, H 04 J 11/00.

2. Veeneklaas, Gbolahan, Viedensky. "On noise m-ary signals with start-stop sending messages", telecommunications, No. 1, 2001, ñ.38-41. (LLC "Science and technology", Moscow, 2001).

3. Justin. "Introduction to theory and technique of radio systems". - M.: Radio and communication, 1986.

Start-stop communication system with a transmitting-side block creation and transmission of a signal, and at the receiving side is connected in series receiver, the amplitude detector and low pass filter, connected in series to the first comparator and a storage device whose outputs bus through a shift register connected to miles who moves first decoder, km outputs which are output devices, connected in series key, synchroblog, the pulse shaper and shaper burst, the output of which is connected to a clock input of the shift register, and the first and second binary counters, the device of the sample and hold signal and a threshold device, and the output of the lowpass filter connected to the input key, the control input of which is connected to the third output of the pulse shaper, the second output of which is connected to a clock input of the first comparator and a counter input of the first binary counter, set input connected to the first output of the pulse shaper, the gate input shift register and the installation log devices sample and hold signal, a signal input connected to the signal input of the first comparator, a second input connected to the output of sample and hold signal, the control input of which is connected to the output of the first comparator, in addition, the outputs of the first binary counter bus connected to information inputs of the storage device, and the output synchroblog connected with installation input of the second binary counter, the output of the shaping unit and the signal transmission through the communication line connected to the input of the receiver to distinguish who I am, on the receiving side entered sequentially connected to the second comparator and RS-flip-flop, and a second decoder, and the output of the lowpass filter is connected to the input of the threshold device, the output of which is connected to the inputs of the first and second Comparators, the clock input of the latter is connected with the second output of the pulse shaper, the first output of which is connected with the second input of the RS-flip-flop, the output of which is connected to the counting input of the second binary counter whose output through the second decoder is connected with the control input of the first decoder.



 

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