Device for receipt of encoded information in communication line

FIELD: electric engineering.

SUBSTANCE: device has frequency filter, voltage amplitude limiter and two comparators, each of which includes differential cascade, two power sources, emitter repeater and voltage divider.

EFFECT: simplified construction, higher precision, higher reliability.

2 dwg

 

The invention relates to techniques for electrical connection, in particular to systems of information transmission on two-wire lines and can also be used in computing in information exchange channels of a computer to subscribers.

A device for receiving and transmitting information (see the description of the author's SV-vu of the USSR №1510095, publ. 23.09.89,, IPC H 03 M 7/00, N 03 3/00)containing the block of threshold detectors, injectors currents amplifiers. The complexity of the structural embodiment of this device does not allow to implement it in the form of a chip Assembly.

Known transceiver designed for multiplex channel of communication and is implemented in the form of a microassembly WE PIGM. Known transceiver is in the form of a microassembly using caseless radioelements. However, a variant of implementation of the transceiver on the basis of active elements such as operational amplifier, a frequency filter and integrated Comparators, is difficult to manufacture and unreliable in operation.

The closest known analogues (prototype) (see figure 1) is a device for receiving information from the communication line, containing a frequency filter with two inputs and two outputs connected to corresponding inputs of the limiter voltage amplitude of the input signal is La, two outputs of which are connected with the first inputs of two Comparators, differential cascade of two transistors with the emitter repeaters located on the first and second differential inputs of the cascades to both Comparators, the resistive divider and the output stage made of a single transistor located at the output of each comparator (see world VA A PIGM).

The known device is quite difficult to perform and has a low accuracy of response because of the small gain of the differential stages of Comparators and dependence of threshold voltage on the second inputs of the Comparators offset from positive and negative power sources.

The aim of the invention is to simplify the design of the device, improving the accuracy and reliability of his work.

In addition, the proposed device for receiving encrypted information communication expands the Arsenal of well-known technical means of the same purpose.

This objective is achieved in that the device receiving the encrypted information communication containing a frequency filter with two inputs, which are inputs of the device, and two filter output connected to respective inputs of the limiter voltage amplitude, the two outputs of which are connected with the responsibly with the first inputs of two Comparators, the outputs are the outputs of the device, with each comparator includes a first transistor, the base of which is the input of the comparator, a first resistor, one output connected to the negative pole of the first power source, a differential cascade performed on the second and third transistors, the second and third resistors and the base of the second transistor is connected to the emitter of the first transistor and the common connection point of the emitters of both transistors are cascade connected to one of the conclusions of the second resistor, the other output of which is connected to the negative pole of the first power source, and a third resistor connected between the collector of the third transistor and the positive pole of the second power source, the output stage on the fourth transistor, the base of which is connected to the collector of the third transistor, the emitter grounded and the collector is connected to one of the conclusions of the fourth resistor, the second output of the fourth transistor, the collectors of the first and second transistors connected to a positive pole of the second power source and a common connection point of the collector of the fourth transistor and the output of the fourth resistor is the output of the comparator, a second input which is the base of the third transistor in each of the comparator inputs of the fifth resist is R, connected between the emitter of the first transistor and the second output of the first resistor, a common connection point of the first and fifth resistors of the first comparator is connected to the base of the third transistor of the second comparator, and a common connection point of the first and fifth resistors of the second comparator is connected to the base of the third transistor of the first comparator.

The introduction of distinctive features, namely the fifth resistor in the emitter follower to the first input of each comparator, as well as communication common connection point of the fifth and first resistors of one of the comparator with the base of the third transistor of the other comparator is enabled as an emitter follower, which is placed on the second input of the differential cascade one comparator to use an emitter follower, which is located on the first input of another comparator, and structurally organize the voltage dividers, powered from a single power supply, while controlling each voltage comparator has almost doubled, and the threshold voltage generated by the divisors of both Comparators, began to have the same value that, in turn, helped improve the accuracy of the device is significantly simplified design and increased reliability.

According to the authors, this collection of characteristics allow aemula invention is new, as in the prior art unknown causal relationship between the features and achievable technical result (goal).

The invention is illustrated by drawings, where:

- figure 1 shows a functional diagram of the device and a schematic diagram of Comparators prototype

- figure 2 shows a functional diagram of the device and circuit diagrams of the Comparators of the claimed device.

Device for receiving coded information in the communication line includes a frequency filter 1 with two inputs, which are inputs of the device. Two outputs of the filter 1 is connected to the corresponding inputs of the limiter voltage amplitude of 2, the two outputs of which are connected respectively to the first inputs of two Comparators 3 and 4, the outputs of which are the outputs of the device. Each comparator 3, 4 contains the first transistor 5, the base of which is the input of the comparator, the first (which is simultaneously load and takasedani resistor 6, one output connected to the negative pole of the first power source 7, a differential cascade performed on the second and third transistors 8, 9, the second and third (respectively tacosode and load) the resistors 10, 11. The common connection point of the emitters of both transistors 8, 9 cascade connected to one of the conclusions of the second resistor 10, the other in the water which is connected to the negative pole of the first power source 7, and the third resistor 11 connected between the collector of the third transistor 9 and the positive pole of the second power source 12. The output stage of the Comparators 3, 4 is performed on the fourth transistor 13, the base of which is connected to the collector of the third transistor 10, the emitter is grounded, and the collector is connected to one of the conclusions of the fourth (load) resistor 14, the second terminal of which is connected to the positive pole of the second power source 12. To the same pole of the second power source 12 is connected to the collectors of the first 5 and second 8 transistors. In the circuit between the emitter of the first transistor 5 and the second output of the first resistor 6 introduced the fifth (tacosode and at the same time the load resistor 15. The common connection point of the first 6 and 15 fifth resistors of the comparator 3 is connected to the base of the third transistor 9 of the comparator 4, and a common connection point of the first 6 and 15 fifth resistors of the comparator 4 is connected to the base of the third transistor 9 of the comparator 3. The base of the second transistor 8 is connected to the emitter of the first transistor 5. The second input of each of Comparators 3, 4 is the base of the third transistor 9, and the output is the common connection point of the collector of the fourth transistor 13 and the output of the fourth resistor 14 of each of the comparator 3, 4.

The inventive device operates as follows. In the absence of a signal on a line with the ides - the input of the differential cascade each comparator 3, 4 is in the switched state, namely the second transistor 8 is in a conducting state, and the third transistor 9 is in de-energized, so that the entire current of the third resistor 11 is fed into the base of the fourth transistor 13, which is in the saturation state and generating at its output a voltage close to zero (logical zero). In this mode, the potentials of the bases 8 and the second 9 third transistors are unequal in magnitude and differ on the magnitude of the voltage drop across the fifth resistor 15, i.e. the value of a threshold voltage sufficient to switch the differential stage. It should be noted that the threshold voltage in both the Comparators 3, 4 have almost the same value for the following reasons: the identity parameters of the first transistor 5, using for the formation of the threshold voltages of the same power source 7. When the input signal exceeds the value of the threshold voltage is the switching differential of the cascades. In this case, a conducting (open) state for the duration of the negative half of the signal turns the third transistor 9, and a non-conductive (closed) state - the second transistor 8. The parameters for the third (load) resistor 11, the third Tran who iStore 9 is selected from the conditions to the potential of its collector was "slightly" negative, i.e. in the range (-0,5 - of-0.8 In), which is sufficient for locking the fourth transistor and education at its output high state (logical units). And since the input signal is an alternating negative and positive levels, the voltage logic levels at the outputs of the Comparators will alternate.

It should again be noted that in the inventive device, in contrast to the prototype of each comparator works with almost twice the value of the input signal, receiving in addition to his own signal opposite in sign to the signal on the second input of the first transistor of the adjacent comparator. This leads to the improvement of the comparator (the reduction in the duration of the fronts of its output pulses to increase the reserve to ensure reliability of the switch in conditions different from normal climatic conditions, as well as during aging of the elements of the device, and so on).

In addition, in the inventive device, the reduced number of transistors (due to the exclusion of the emitter followers on the second input of the comparator), which also increases the reliability of the device and reduces its power consumption.

The inventive device can be technically implemented by known rules of the standard element is in, produced by the industry, which allows to make a conclusion about its industrial applicability.

Device for receiving coded information in a line containing a frequency filter with two inputs, which are inputs of the device, and two filter output connected to respective inputs of the limiter voltage amplitude, the two outputs of which are connected respectively to the first inputs of two Comparators, the outputs of which are the outputs of the device, with each comparator includes a first transistor, the base of which is the input of the comparator, a first resistor, one output connected to the negative pole of the first power source, a differential cascade performed on the second and third transistors, the second and third resistors and the base of the second transistor is connected to the emitter of the first transistor and the common connection point of the emitters of both transistors are cascade connected to one of the conclusions of the second resistor, the other output of which is connected to the negative pole of the first power source, and a third resistor connected between the collector of the third transistor and the positive pole of the second power source output stage on the fourth transistor, the base of which is connected to the collector of the third transistor, the emitter grounded and the collector is connected to onethe conclusions of the fourth resistor, the second output of the fourth transistor, the collectors of the first and second transistors connected to a positive pole of the second power source and a common connection point of the collector of the fourth transistor and the output of the fourth resistor is the output of the comparator, a second input which is the base of the third transistor, wherein each comparator is additionally introduced a fifth resistor connected between the emitter of the first transistor and the second output of the first resistor, a common connection point of the first and fifth resistors of the first comparator is connected to the base of the third transistor of the second comparator, and a common connection point of the first and fifth resistors of the second comparator is connected to the base of the third transistor of the first comparator.



 

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