Controlled pulse shaper

FIELD: digital pulse engineering.

SUBSTANCE: proposed device designed for shaping output pulses of desired length for each of three events, that is, signal front across first control input, signal zero level from closing button incorporating provision for chatter suppression, and detection of pulse skipping across signal pulse input has seven resistors 1 - 7, two capacitors 11, 18, button 10, first and second control inputs 12, 13, pulse input 14, AND gate 17, NOT gate 8, two NAND gates 9 - 16, NOT gate with open collector output 15, and pulse signal envelope detector 19. This pulse shaper can be used, for instance, as system reset pulse shaper of numeric control device.

EFFECT: enlarged functional capabilities.

1 cl, 1 dwg

 

The invention relates to pulsed digital technology, is intended for generating output pulses of the desired duration for each of the three events (on the front of the signal at the first control input, a zero level signal from the trailing buttons with suppression of chattering when a single signal at the first control input is detected, the missing pulse or “freezing” (suspension of amendments) of the signal at the pulse input when resolving individual signals in the first and second control inputs), and can be used, for example, as a shaper pulse system reset (RST)) device management software (UPA) with non-volatile random access memory device (RAM) served or unserved microcontroller or microprocessor system (M-system) information processing and management with support for hardware watchdog timer to restart the UPA during the “hang” of the application M-system, designed in accordance with the following principles [1]: software management, main information exchange, modular construction, and capacity of computing power.

Modern standard M-system module contains the UPA-based microcontroller or microprocessor (MP), the modules are functionally oriented pin is ollero and modems for I / o information in the process of interaction of M-system with external objects (operator the sensor event control object, devices, related systems and so on), the power supply unit and the system bus formed by the tire management (SHU), address (SHA) and data (SM), to exchange information between modules (functionally complete parts M-system) during the operation of the M-system [2, p.14, figure 1.1].

In the General case, the module UPA contains a stand-alone memory, for example, combined (RAM+ROM+BSU), a calculator, for example, containing MK, quartz resonator and two capacitor to provide the internal clock generator MK [2, p.63, Risa], the inner rail, and the inputs and outputs of SHU, the outputs SA and bi-directional SM highway system, the transceivers and the mains adapter for functionally oriented mates MK with internal and systemic arteries, and the shaper pulse system reset (in [2] it is not shown) to control the transmitter upon the occurrence of certain events, for example, switching on and switching off of the power supply circuit on the body of the button system reset.

When the voltage is switched on EP power pulse shaper generates a reset pulse RST, after which an integral part of the M-system are in working condition (reset, initialized and tested under the control of the UPA), and then M-systems is in General performs the separation in time several management functions. These functions are typically implemented cyclically as interacting quasi parallel processes [2, p.18-34] on the time grid M-system with some elementary time interval, formed in MK the corresponding timer/counter mode account internal impulses.

During the operation of the M-system as a complex digital machine with rapid and constant memory are prone to failure, which leads, in particular, to “freeze” the application program of the UPA. In this regard, the watchdog timer (Watchdog) is becoming increasingly popular among manufacturers MK. For example, in MK AT89S8252 firm “Atmel”, created on the basis of popular architecture of the MCS-51, the watchdog timer when enabled, the hardware is initialized by writing to register WMCON code PS[2:0] timer period and WDTRST bit on/reset and is designed to generate a reset MK on hardware level (WDTRST=1), if the application program performs uncontrolled actions, such as “stuck” [2, s, 108].

However, built-in MK hardware-software watchdog timer, although useful, but in General does not completely eliminate the “freeze” M-systems because failure is reset in MK bits WDTRST watchdog timer is disabled and does not prevent “hanging” MK other failures. Faults occur as a result of internal and/or external noise, p is avodat to functional disturbances of the IC, which are fully removed when you restart MC to reset signal RST. In addition, if the failed installation in the PCON register bits PD (or IDL) control mode microparasite (or idling) MK “hangs” at all (or in the absence of the interrupt) [2, s, 95], and the exit microparasite can only be done by applying to the input of the active RST pulse of duration tRSTdefined by the constraint

In those applications the M-system, where energy consumption is one of the main indicators of the quality of the product it is advisable to use MK-mode microparasite [3, s].

In addition, when nemksovanyj failure of power unit M-system keeping the contents of the internal RAM MK can be achieved by using a low power source (battery or battery) backup power supply EP by interrupt inverted signal NAIP accident source primary voltage EP power. For this MK signal NAIP=0 interrupt should restart in the internal RAM in all the main parameters of the interrupted process operation and the final command set in the register PCON bits PD mode microparasite (Power down) [3, s]. Therefore, when the introduction of the M-system redundant power EP is relatively easy in place of the th UPA with internal non-volatile RAM modern MK type AT89S8252. In this case, MK is fed from a source of switching voltage EC, functioning according to the voltages EP and EP and implemented, for example, according to the technical solution [4, p.87, RIS]. Upon shutdown or failure of power supply, this event in the M-system is detected by the signal change NAIP from “1” to “0”, triggering the interrupt routine translation MK mode microparasite when the supply voltage of the microcontroller EC≥4 In preserving the contents of the internal RAM when a subsequent reduction in supply voltage MK up to EC≥2 C. each time the power supply is OK M-system MK is derived from mode microparasite with full preservation of the contents of the internal RAM, if the reset pulse RST=1 is formed not earlier than the EC reaches the level of the EC≥4 [5,p.75].

Based on the above we can say that when building a model of the modern M-system data processing, accepted with online access to the RESET button (RESET), and especially unattended reset only at power-up and access to the RESET button only during the debugging process - urgent task is a reliable automatic detection of “freezing” of the application UPA and its restarting and displaying the URA mode microparasite in M-system with reduced energy consumption and/or to protect itself if the CSOs RAM UPA drop of the main power supply when nemksovanyj failure of the power supply.

Thus, the creation of a simple controlled pulse shaper system reset with reliable hardware detection as permissions o UPA mode microparasite and “freezing” of the application UPA (for example, due to the discovery of the missing pulse or “hang” on the pulse signal generated by the UPA programmatically as a function of time grid operation M-system time) and generation at each detection of a reset pulse to the required length (i.e. taking into account the constraints of type (1)) is an actual technical problem.

To the formers, as an integral part of modern electronic systems typically include devices designed to convert the input and/or internal signals - event with the appropriate parameters in the normalized amplitude and steepness of the fronts of the digital output pulse signals of the required duration to control the subsequent parts of the system [6, s-265].

It should be noted that on modern element base shapers as pulsed digital device, it is preferable to develop using logic elements CMOS technology, compared to the TTL are more suitable for operation in pulsed devices with high input resistance, good temperature the ow stability, as well as the transfer characteristic close to the ideal [6, s]. From the point of view of the digital circuitry the proposed device belongs to “support” elements of digital components and devices [7, pp.24-37], famous for pulse shaping are the following four groups of devices.

The first group includes the pulse shapers button with the elimination of contact bounce:

diagram eliminate contact bounce based flip-flop with asynchronous (or synchronous) and reset inputs installation and SPST switch to the two positions [7, pp.118, is: b (or)];

- shaper pulses [8], containing the RS trigger, two JK trigger element And the input clock and the control, output, two resistors and a single-pole switch two position, the contacts of which are connected to the inputs of the RS trigger connected through resistors bus bias voltage. Shaper pulses [8] operates so that when the logical signal “1” or “0” at the control input for each switch of the switch output generates one clock pulse or a series of clock pulses, respectively;

device to eliminate the effect of contact bounce [9], containing the switch, bus logic signals “0” and “1”, RS trigger, direct connected to the inverted reset input of the trigger and the th direct, and inverted output connected to the switching contact of the switch, an inverse input set trigger and its inverted output;

device suppress the bounce [10], which contains a closing button, three two resistor-capacitor D trigger and output, which is the direct output of the trigger;

diagram suppress the bounce button with one pair of contacts [11, p.55, 100 [] that contains the button with one pair of contacts, two combinational element CMOS technology, two resistors, a capacitor and direct and inverted outputs;

diagram suppress contact bounce by using a Schmitt trigger [12, p.85, RES]that contains the button with one pair of contacts, two resistors, a capacitor, output and Schmitt trigger whose output is the output;

diagram, use the one-shot to suppress contact bounce [12, 119, RES]that contains the button with one pair of contacts, the resistor, the output and the one-shot whose output is the output device.

The second group includes the pulse shapers initial setup power-on:

diagram of the initial installation MC [3, p.27, RES], performs the function of multiplexer signals power-on and off the button and containing a button with one pair of contacts, two resistors, a capacitor and an output connected to the first terminals of the resistors and conden atora, the second output of which is connected to common bus driver connected to the first button contact, a second contact which is connected to the second output of the first resistor, the second terminal of the second resistor is connected to the bus power supply shaper;

the pulse shaper initial installation on power [12, s, RES]containing a resistor, a capacitor, a Schmitt trigger and an output connected through a Schmitt trigger with the first terminals of the resistor and capacitor, the second terminal of which is connected to common bus driver, the bus supply voltage which is connected to the second output resistor.

The third group includes the pulse shapers, eg a series of pulses, each of which is designed to generate at the output a digital signal “1” (or 0) in the presence (or absence) of an input sequence of pulses:

device for controlling the sequence of pulses [13], containing the triggers control and memory, the three elements, three inputs of the three clock pulses, the input of the controlled sequence of pulses and the output, which is the inverted output of the trigger memory;

the pulse shaper, the envelopes of the series of pulses [14], which contains a reference frequency generator, two keys, two trigger, reversible counter, a pulse shaper, the input pulse train and the output, t is audica the output of the first trigger;

- driver signal envelope of the input pulses [12, p.116, the first (or second) version of the launch of the one-shot AG on is explaining is g pp.118], containing the one-shot with a restart, the input sequence of pulses connected to the direct (or inverse) input start the one-shot, and one output, which is the direct output of one-shot;

- driver signal envelope of the input signal triggers [12, s, RES]containing the element is NOT, two triggers, the input sequence of pulses, which is connected through the element is NOT inverted asynchronous inputs of both triggers, the information input of the first of which is connected to the bus logic “1” shaper and inverse asynchronous inputs the settings of the two triggers, a clock input connected to the state clock inputs of both triggers, and output, which is the inverted output of the second trigger, an information input connected to the output of the first trigger.

The fourth group related device for detecting loss of momentum [15], designed for generation of output pulses when the loss of the input pulses.

Based on the above auxiliary devices of the first, second and third (or fourth) groups can build a device with the features offered. However, such a device will repeat week is the action of its parts, which are narrow specialization or limitations on their functionality and hardware complexity when using them to build a managed shaper pulse system reset of the modern M-system.

It is known device [10] suppress the bounce, containing a closing button, the trigger CMOS technology, a direct output which is the output of the device, three resistors, two capacitor bus supply voltage connected through the first resistor to the first output of the first capacitor and the first button contact, a second contact which is connected to the first output of the second resistor and synchronator trigger inverted output of which is connected through a third resistor with the information input trigger and the first output of the second capacitor, the second terminal of which is connected to the second pins of the first capacitor and the second resistor and a shared bus device.

In the initial state, the button is open, the trigger is in the state X=0 (or 1), the first capacitor is charged up to a voltage EC1=EP, engraved trigger is in the state of logical “0” (engraved through the second resistor is connected with a common bus), and the information input trigger is in the state (NX where NX is the inverse of X) and the second capacitor is charged up to a voltage EC2≈EP (or 0) when X=0 (or 1). By pressing the button is on synchroscope trigger generates multiple pulses of contact bounce during the time of bounce t drop=(1-10) MS [7, s]. On the first edge of the first pulse bounce the trigger enters the opposite state, after the bounce, the first capacitor is discharged until the voltage EC1≈0 B, and the second capacitor is charged to a voltage EC2≈0 In (or EP) at X=1 (or X=0). When the button is released it bounce does not affect the state of the trigger, because the first capacitor is discharged to “0”and at the end of the bounce of the first capacitor through the first resistance is charged to the source voltage EC1=EN. Thus, this device operates so that each button is pressed, the trigger enters the opposite state.

The main drawback of the device [10] is that it is relative hardware complexity performs only the function of the one-bit counter presses a button and it does not provide the function of forming a single pulse at power-up. This limits the use of such technical solutions as even the simplest of devices forming pulses reset when creating the modern M-system.

Known devices [15], which contains two elements, And the delay element, the element is NOT, the regenerator pulse sequence (formed by series-connected element OR that element of the delay and the driver, in the Suppl function of the shortening of the input signal duration), element OR a counter, a decoder, the inputs of which are connected to the outputs of the counter, the reset input of which is connected to the output of the first element And the inputs of which are connected to the outputs of the delay elements and element OR the input pulse sequence, which is connected with the first inputs of the regenerator and the OR element and is connected through the element is NOT, with the first input of the second element And a second input connected to the input of the delay element and the output of the regenerator, the first pulse output connected to the output of the second element And the second input of the regenerator and counter input counter and the second pulse output which is the output of the decoder, which is connected to the second input of the OR element.

In the initial state, the counter is reset each input pulse with delay and shortening takes place at the exit of the regenerator and through the element does NOT prevent the second element And, in the event of a loss of momentum in the input sequence, the second element And passes the pulse from the output of the regenerator, i.e. generates a first output, the pulse output corresponding to the lost. These pulses are counted by the counter and, if the number of skipped pulses reaches a threshold, then the decoder on the second output device generates a pulse through the OR element and the first element And resets the counter to the zero state.

Main is not the com device [15], what is it with significant hardware complexity has limited capabilities when performing its functions, as it does not detect the loss of pulses during the “hang” of a single input device, as in this case, the output element OR the regenerator is formed of a permanent individual signal blocking regeneration.

Known technical solutions closest to the proposed principle of pulse shaping and composition is shaper [16], containing a common bus, the bus power supply, the pulse signal output, two resistor elements and NOT AND NOT CMOS technology, button closing, first contact which is connected with the common bus driver, and the second contact button connected to the first input element AND-NOT and the first conclusions of the first and second resistors, the second terminal of the first of which is connected to the power bus, and a capacitor, the first output of which is connected with which is the inverted output of the shaper and the output element, an input connected with the output element AND IS NOT, a second input connected to the second terminals of the capacitor and the second resistor.

Formally, the operation of the shaper [16] in General logically can be described by the formula

NOX=NIX1 & NI2,

where NOX is the inverse of the digital signal generated at the output of the shaper (i.e. at the output ele is enta);

NIX1 and NIX2 - inverted digital signals respectively to first and second inputs of the element AND IS NOT;

& operator the logical operation “And” in the language of ABEL;

N is the synonym operator “!” is the logical NOT operation on the ABEL language.

In operation, the driver on the first input element AND NOT the signal NI1 repeats the position of the button (i.e. when not pressed the button NI1=1, and when pressed NI1=0), and the second input element AND NOT the signal NI2 when NI1=1 is determined depending on the voltage ENIX2=EC+ENOX (where EU - capacitor voltage measured at the second output relative to its first output; ENOX - voltage at the output of the shaper), according to the relations

NI2=0 when ENIX2<E(+) or NI2=1 when ENIX2>E(-),

where E(+) E(-) - thresholds shaper as the Schmitt trigger and the switching signal of NOX from “0” to “1” and from “1” to “0”, respectively.

With that said detail the Builder [16] can be described as follows.

When not pressed the button shaper [16] is zero in steady state (NUS)

NUS={NI2≈Tu, EU≈0, ENOX≈Tu, NI1=1, NI2=1, NOX=1}.

When you click on first touch on the body of her second contact on the first slice signal NI1 output element does NOT occur as in Schmitt trigger switching of the output signal of NOX from “1” to “0” by setting the second input element INE voltage ENIX2< U(+), and during the bounce button a capacitor and connected in series to the first and second resistors form an integrating circuit, the input and the output of which is connected to the bus supply voltage EP and the second input element. The time constant R·C (where C is the capacitance of the capacitor, R=R1+R2, where R1 and R2 are resistances of the first and second resistors, respectively) this circuit is selected such that the formation of the output signal of the NOX=0 chattering when the button has no effect, because during the bounce ENIX2<U(+). After the bounce button is pressed shaper [16] is set in a stable state of the pressed button (USNC)

USNC={NI2≈0, EU≈0, ENOX≈0 B, NI1=0, NI2=0, NOX=0}.

When the button is released the voltage ENIX2≈EC begins to increase as the capacitor begins to charge from the voltage EP across the resistance R when the open button. Since the time constant C(R1+R2) of the integrating circuit is selected sufficiently large, then increasing the voltage ENIX2 reaches the threshold E(+) switch from “0” to “1” output signal NOX shaper as Schmitt trigger only after the bounce button. Thus, when the unlocking button after its bounce when NI1=1 at some time t the voltage ENIX2(t) becomes equal to E(+)≈EP/2, and the driver is in the area of the us is of a positive increment dENIX2(t)=ENIX2(t)-E(+) on the second input element. So that appears positive increment dENIX2(t) causes increased voltage increase ENOX, which, through the capacitor in the loop positive feedback causes, as in the Schmitt trigger, the abrupt change in the voltage ENOX from ENOX≈0 B to ENOX≈EP with the transition of the former [16], in accordance with the first law of commutation under this act [17, 20] for any finite current, charging or discharge the capacitor, the voltage across it leap may not change), in the zero transition state (PS) HHC={ENIX2≈Tu/2+EP, EU≈+EP/2, ENOX≈Tu, NI1=1, NI2=1, NOX=1}, and then approximately time T=3·C·[IR(+)+OR] NUS unpressed button, where IK(+) - input internal protective resistance element AND NOT the second input from the input positive voltage ENIX2>Tu, OR - output the internal resistance of the item.

Thus, in the process, shaper [16] with the elimination of chattering repeats the position of the button so that at its output when the button is formed of a digital inverse impulse NOX=0, the duration of which corresponds to the time of contact closure button, and the front (switch from “0” to “1”) delayed relative to the opening of the contacts button on the time that is not less than the duration of the bounce button when open.

The main disadvantage of the former [16] when it is used, for example, on which I build the UPA modern M-system information processing and management based on MK or MP is limited functionality, for example, it does not generate an output pulse when the power is turned on, and performs only the function of forming inverted output digital pulse NOX, which simulates the position of the button with the elimination of chattering.

The invention solves the problem of complex functionality of the driver due to the generation of the output pulse with a desired length as the edge signal at the first control input (generated at power-up or as a team o the URA mode microparasite), and when the shaper mode hardware watchdog timer (permitted individual signals on the first and second control inputs) as generator output pulse skipping pulse or “hang” on the pulse signal, which is formed UPA programmatically as a function of time grid operation M-system in time.

To achieve this, the technical result in the controlled pulse shaper containing a common bus, the bus power supply, the pulse signal output, two resistor elements and NOT AND NOT CMOS technology, button closing, first contact which is connected with the common bus driver, and the second contact button is connected with the first pins of the first and second resistors, and a capacitor, added the resistors on the third, seventh, the first and second control inputs, pulse input, the output element is NOT open collector output, which is connected to the first output of the third resistor and is the direct output of the pulse signal shaper, the additional element AND-NOT element And the first input connected to the output element AND-NOT and the first output capacitor, the second terminal of which is connected to the second output of the first resistor and the first output of the fourth resistor, the second terminal through which the element is NOT associated with the first input element AND IS NOT, an additional capacitor, a first output which is connected to the output element And the input of the output element and the first input element AND IS NOT, a second input connected to the second pins of the second and third resistors, a second input element AND-NOT and the first Manager of the input shaper, the second control input of which is connected through a fifth resistor with a power bus and is the third input element AND-NOT, and the envelope detector pulse signal supplied installation input connected to the output of the additional element AND-NOT-pulse input, which is the pulse input of the shaper, and an output which is connected to the first output of the sixth resistor, the second terminal of which is connected to the second o additional condenser base is a and the first output of the seventh resistor, the second output of which is connected to the second input element And, moreover, all added to the driver logic elements, except possibly for the output element is NOT, are elements of the CMOS technology.

Author unknown solutions containing characteristics equivalent to distinguishing characteristics, the introduction of the resistors on the third, seventh, first and second control inputs, pulse inputs, the output element is NOT open collector output, an additional element AND-NOT element And CMOS technology, the additional capacitor and the envelope detector pulse signal), which (compared with the prototype [16]) comprehensively extend the functionality of the driver due to the generation of the output pulse with a desired length as the edge signal at the first control input (generated at power-up or as a team translation MK or MP from mode microparasite in the active mode), and when the shaper function hardware watchdog timer (permitted individual signals on the first and second control inputs) as the generator output pulse skipping pulse or “hang” on the pulse input signal, which in time is formed MK or MP software as a function of time grid operation M-C theme.

The drawing shows a functional diagram of the controlled pulse shaping, containing a common bus, the bus power supply, the output pulse signal, the resistors from the first 1 in the seventh 7, item 8, item 9 AND NOT shorting button 10, the first contact which is connected with the common bus driver, and the second contact button 10 is connected with the first findings of the first 1 and second 2 resistors, a capacitor 11, the first 12 and second 13 control inputs, pulse input 14, the output element 15 is NOT open collector output, which is connected to the first output of the third resistor 3 and is the direct output of the pulse signal shaper, an additional element 16 AND-NOT element 17 And the first input connected to the output element 9 and the first output capacitor 11, the second terminal of which is connected to the second output of the first resistor 1 and the first output of the fourth resistor 4, the second terminal through which the element 8 is NOT associated with the first input element 9 AND IS NOT, an additional capacitor 18, the first output of which is connected with the output element 17 And the input of the output element 15 and the first input element 16 AND the second an input connected to the second pins of the second 2 and third 3 resistors, a second input element 9 and the first Manager of the input shaper 12, the second control input 13 which is azan through the fifth resistor 5 with the power bus and is the third input element 16 AND IS NOT, and the detector 19 of the envelope of the pulse signal supplied installation input connected to the output of an additional element 16 AND IS NOT, a pulse input, which is a pulse input 14 of the shaper, and an output, which is connected to the first output of the sixth resistor 6, the second terminal of which is connected to the second terminal of the additional capacitor 18 and the first output of the seventh resistor 7, the second terminal of which is connected to the second input of the element 17 And, with all the logical elements of the former (possibly with the exception of the output element 15, are elements of the CMOS technology.

The logical elements of the controlled pulse shaper is made on CMOS integrated circuits series 1554 (items 8, 9, 16 and 17 are made on three of the four elements 2I-NOT chip LA and two of the four elements 2I chip LI1)operating in the temperature range from -45°to +85°voltage EP power from +2 to +6 V At a constant current at each output up to 24 mA input current for each input from -1 to -11 ICA [18, p.15 and on p.21 table. 3.1]. Also [18, p.18], chip series 1554 able to work with an output current of 75 mA and the output voltage is not less of 3.85 V At EP=5.5 V on the bus with an impedance of Zo=50 Ohm.

The detector 19 of the envelope of the pulse signal can be implemented based on any of the above is anee devices of the third group (i.e. shaper pulses, the envelope of the series of pulses), and one possible detector 19 (see drawing) contains resistors 20, 21 and 22, capacitors 23 and 24, the diodes 25, 26 and 27, the input set, which is connected through a resistor 20 to the anode of diode 25, a pulse input connected to the first output capacitor 23, the second terminal of which is connected through a resistor 21 to the anode of diode 26 and the cathode of the diode 27, and the output connected to the cathodes of the diodes 25 and 26 and the first terminals of resistor 22 and capacitor 24, the second set of conclusions which are connected with the anode of diode 27 and a common bus.

As diodes 25÷27 detector 19 can be used, for example, diodes type DB or three of the eight diodes diode matrix DA.

In the General case, the digital signal X12 on the control input 12 is used as the inverse of the signal NAIP accident voltage source EP power (i.e., the signal transfer X12=NAIP from “0” to “1” is generated at an operating voltage EP=(4,5÷5,5) in the process of integrating power supply M-system), and as a team for the UPA (i.e. transition signal X12 from “1” to “0” the UPA executes a subroutine of mode microparasite to save power), and the front signal X12 (the transition from “0” to “1”) proposed shaper generates a reset pulse RST, after which the UPA performs routine exit microparasite.

SL is blowing also be noted, currently in the simplest case, the source signal X12=NAIP you can use the shaper signal NAIP accident voltage source EP power on the chip type DS1233D-10 firm DALLAS Semicodactor, which is the driver of the inverse signal NAIP when the voltage deviation from nominal at +5 C. This deviation is in the range from 4.25 per to 4.49 In, and the chip includes a voltage divider with stable parameters in the operating temperature range (Vcc TOLERANCE AND BIAS), reference voltage (..REFERENCE), the comparator delay element (350 ms DELAY), resistor, MOS transistor, the input voltage connected to the first output resistor and is connected through a voltage divider with reinvestiruet input comparator inverting input connected to the output of the reference voltage, the input bus connected to the drain of the transistor, and the inverted output pulse is connected to the second output resistor and a source of the transistor, the gate through which the delay element is connected with the comparator output.

Chip DS1233D-10 operates in the temperature range from -40°to +85°so that when the voltage is switched on Tu<7 In power produces at the output the inverse signal NAIP=0 duration (250÷450) MS, and then switches to “1” and continuously monitors the voltage level of the EP: a comparator to compare the AET output voltage divider with the reference voltage of the reference voltage and through a delay element controls the state of the key - The MOS transistor. When injected voltage EP to the corresponding point of the range (from 4.25 per to 4.49 In) signal NAIP at the output of the chip switches from “1” to “0” for a time not greater than 100 NS, at the time, the duration of which is not less than (250÷450) MS.

Further description of the operation of the driver is using the terms, designations and settlement ratios defined in the following paragraphs.

1. Modified the description language of logic functions ABEL, in which the operators “AND”, “OR” and “NOT” are designated as “&”, “#” and “!” (or “N”), respectively, and !NX=X, where X is a logical variable equal to “0” or “1”.

2. The digital signals at the inputs 12, 13 and 14 of the shaper denote as X12, X13 and x14, respectively, and generated at the outputs of logic elements 8, 9, 15, 16, 17 and the second contact button 10, which is connected with the first terminals of the resistors 1 and 2, we denote as X8, NX9, X15, X16, NX17 and NX10, respectively, and direct the signal Xj (or inverse signal NXj) when Xj=0 (or NXj=0) is modeled by a voltage Ej≈0 B, and if Xj=1 (or NXj=1) - voltage Ej≈EP.

3. Analog voltage on the resistors 1, 2, 6 and the capacitors 11, 18, 23 and 24 respectively denote as E1 is measured at the second terminal of resistor 1 with respect to its first output E2 is measured at the first output resistor 2 with respect to its second output, E6 is measured on the second of vivaleresistance 6 relative to its first output and E11 is measured at the second terminal of the capacitor 11 with respect to its first output, E 18 is measured on the second terminal of the capacitor 18 with respect to its first output, a is measured at the second terminal of the capacitor 23 with respect to its first output and a measured on the ground lead of the capacitor 24 with respect to its second output connected to the common bus.

Digital and analog signals at the connection point between the resistors 1 and 4 and the capacitor 11 (or resistors 6 and 7 and the condenser 18) let us denote as NX4 and E4 (or NX7 and E7), respectively, and taking into account the thresholds E(+) E(-) of the actuation element 8 (or element 17 to the second input when NX9=1) variables (NX4 and E4) and variables (NX7 and E7) are related by ratios

in which analog voltage E4 and E7 are determined by the formula

4. We denote the resistors 1-7, 20-22 and capacitance of the capacitors 11, 18, 23 and 24, respectively, by R1-R7, R20-R22, and C11, C18, C23 and C24.

The resistor 4 (or 7) is designed to limit the discharge current of the capacitor 11 (or 18)flowing through the protective diode input element 8 is NOT (or protective diode of the second input element 17 And the resistor 4 (or 7) at the beginning or end of the pulse NX9=0 (or NX17=0). The resistance of these resistors are chosen to be equal to R4=R7=300 Ω taking into account the protection schemes of electric discharge [18, 20, RES] with the aid of the d scheme of the organization of the input and output circuits CR with a protective pair of diodes on each input and output [18, s, RIS].

Input 13 is a technology and is used only when debugging the UPA M-system from the stand, and in normal mode the input 13 is open and is able X13=1 by connecting this input to the voltage EP across the resistor 5, the resistance of which is chosen equal P5=2 kω.

Resistors 20 and 21 are designed to limit the pulse current at the output of the element 16 and the pulse input 14, respectively. The resistance of these resistors is chosen equal to R20=R21=51 Ohms.

5. The capacitor 23 and diodes 26 and 27 are used only when the shaper mode watchdog timer with tracking behavior in time of the input pulses X14. When X12=1 and NX 10=1 (i.e. at E12≈Tu≈+5 V and unpressed button 10) this mode is performed when X13=1 and the input 14 of the sequence of pulses X14 with the period T14=T+T, so x14=0 (or x14=1) for T (or T).

6. Using approved symbols, all the logical elements of the shaper is described by the following logical functions

key arguments NX4 and NX7 fully determined by relations (2) and (3) respectively.

7. The formation of the digital signal NX9 (or NX 17) produced the usual using an integrating or decrease the RC circuit, connected to the output through a current limiting resistor 4 (or 7) to the input element 8 (or to the second input item 17) and the associated chain of positive feedback through the capacitor 11 (or 18) with the output element 9 (or 17).

In this case, there is the problem of estimating time delay TC logic element 8 (or 17) when the signal change at the input of the corresponding integrating or shorten the chain when changing the input circuit from “0” to a voltage EP or Vice versa from the EP to “0”. This time TC is determined by the time constant T=R· (C circuit and the threshold logic element, for which a CMOS element is close to half of the voltage EP power [11, p.58].

We denote the input element 8 (or the second input element 17 NX9=1 on first login) thresholds trigger to enable or disable E(+) E ( -), respectively, and

where dEy is the interval from E(+) to S(-), in which the element 8 (or 17 NX9=1 at the first input is an inverting (or reinvestiruet) amplifier input voltage changes with gain, many large units.

The response time Those according to [17, 67, 68] and account [11, p.58] proximity threshold (11) or (12) to the value of EP/2 is estimated by the formula

decisive for integrating (or decrease) circuit modification time of the output signal of the circuit from the source level to the level of half of a step change of the input signal (or the active duration of the output pulse shorten the chain, measured at the level of half the amplitude).

8. Under the front or cut any digital signal (direct or inverse) is the change of the logical state of the signal from “0” to “1” or from “1” to “0”, respectively.

Based on the above describe sequentially the operation of the imaging unit when the occurrence of each of the following three events: edge signal X12 on the first control input 12 when powering on the unit M-system, the signal NX10 with the closure and opening button 10 with the suppression of chattering when the signal X12=1 at the first control input 12, upon detection of pass or “freezing” (suspension of amendments) pulse input 14 signal x14 when NX10=1 and resolution signals X12=1 X13=1 on the control inputs 12 and 13, respectively.

When powering on the unit M-system voltage EP starts monotonically increase and when the EP>2 and X12=0 shaper is in the initial steady state (NUS)

and when EP≈4.5V signal X12 is changed from “0” to “1” and what about the single signals X8=!NX4 and X12=1 element 9 produces a signal NX9=0, through the elements 17 and 15 is the output of the shaper as the pulse X15=1 reset RST. By the formula (14)subject to constraints (1), the duration T9 and T17, the generated pulses NX9 and NX17, determine expressions

The process of forming a digital signal NX9 (or NX17) occurs by changing the voltage E11 (or E18) on the capacitor 11 (or 18), and in the initial moment of time “t=0” after each switching signal NX9 (or NX17) from “1” to “0” or from “0” to “1” voltage E11(t=0) (or E18(t=0))according to the first law of commutation [17, 20], is equal to the voltage E11 (or E18) to the switching signal NX9 (or NX17). Given this situation will further describe each switching signal NX9 and signal NX17.

During the T9 can distinguish a rapid phase (duration approximately (3·R4·C11)) discharge of the capacitor C11 from strain E11(t=0)≈-EP about to “0” through the output element 9, the first protective diode input element 8 and the resistor 4, and then over the remaining part of the duration T9 slow phase monotonous charge of the capacitor 11 from the voltage E12≈EP via a resistor (R2+R1) and the output element 9 when I≈0 so that at the end of T9, the voltage E4≈E11 reaches the threshold E(+), the element 8 is in the area of dEy (13), in which serial sidentielle 8 and 9 is reinvestiruet amplifier positive increment of the input voltage E4 to gain a lot of great units. This, as in Schmitt trigger, leads to closing a positive feedback of the output signal of the element 9 to the input element 8 through the capacitor 11 and the resistor 4 and causes an avalanche switching signal NX9=NX4 from “0” to “1” and the voltage E4 E4≈E(+) to E4≈E(+)+EP, but then, about time (3·R4·C11), the discharge of the condenser 11 from the voltage E11≈E(+) to approximately “0” through the resistor 4 and the second protective diode input element 8, the bus voltage EP.

During T17>T9 is monotonous charge of the capacitor 18 from the voltage e≈e≈EP through the resistor 6 and the output element 17 at E17≈0 so that at the end of kzt17 voltage E7≈E18 reaches the threshold E(+) when NX9=1, closed loop positive feedback of the output element 17 at its second input through a capacitor 18 and the resistor 7. This causes an avalanche switching signal NX17 from “0” to “1” and the voltage E7 from E7≈E(+) to E7≈E(+)+EP, but then, about a period of time (3 R7·C18), the discharge of the capacitor 18 from the voltage E18≈F(+)≈EP/2 is about to “0” via the resistor 7, the second protective diode of the second input element 17, the bus voltage EP.

Thus, after power up and the end of the output pulse X15=!NX17 shaper is (X12=1 X13=0 or if X13=1 and detected by the pulse input 14 signal x14, slavianovedeniia which will be defined below) in steady state CONDITION)

If the driver when X12=1 is in CONDITION (18), each closure and opening button 10 he works as follows.

The position of the button 10 when R1>>R2 is displayed NX10 digital signal so that the button 10 when NX10=1 is not selected and when NX10=0 is pressed. When pressing or releasing the button 10 NX10 digital signal Jingles for time tdropbounce button 10, the duration of which, according to [7, s] taking into account expressions (16) and (17), is determined by the ratio

When the button 10, the capacitor 11 and the resistor 1 is formed shorten the circuit (input circuit connected to the output element 9 when I≈Tu, and the output through a resistor 4 to the input item 8), and the voltage E4 begins to decrease as the capacitor 11 begins to charge from the voltage e≈EP through resistor 1 and the closed button 10. On the basis of the relations (19) the time constant (R1·C11) is selected such that a decreasing voltage E4 reaches the threshold E(-) switching repeater (formed when X12=1 serial input and output elements 8 and 9, respectively) after the termination of the bounce button 10 when pressed. At time t when E4(t)=E(-)≈EP/2 repeater (items 8 and 9) is in the area of amplification negative increment dE4(t)=E4(t)-E(-). So that appears negative is riadenie dE4(t) causes increased tension e, which, through the capacitor 11 and the resistor 4 by the chain of positive feedback causes as in Schmitt trigger voltage change e from E9≈EP up e≈0 and In the formation of the output pulse X15=(!NX17)=1 with the switching of the driver (after discharge of the condenser 11 from the voltage E11≈-EP/2 to about “0” and the charge of the capacitor 18 to about E24≈EP) in the steady state of the pressed button (USNC).

When the button is released 10 serial connection of resistors 1 and 2 (i.e. a resistor with a resistance (R1+R2)and the capacitor 11 to form an integrating circuit (the input of this circuit is connected to the voltage E12≈Tu, and the output through a resistor 4 to the input of a repeater (of the elements 8 and 9), the voltage E4 begins to increase as the capacitor 11 begins to charge from the voltage E12≈EP through a resistance (R1+R2). Monotonically increasing voltage E4≈E11 reaches the threshold E(+) switching repeater from “0” to “1” after the termination of the bounce button 10 when open. At time t when E4(t)=E(+)≈EP/2 repeater (items 8 and 9) is in the area of strengthening positive increment dE4(t)=E4(t)-E(+) voltage E4. So that appears positive increment dE4(t) causes increased voltage increase e that through the capacitor 11 and the resistor 4 by the chain of positive feedback causes the et as in Schmitt trigger abrupt switching of the voltage e from e≈ 0V to e≈Tu and formation signals NX17=NX9=1 and X15=(!NX17)=0 with switching of the driver (after discharge of each of the capacitors 11 and 18 to approximately “0”) in CONDITION (18).

If the shaper is in CONDITION (18), when NX9=1, X12=1 X13=1 it works as a watchdog timer monitoring time behavior of the voltage pulses E14 signal X14 defined period T14=T+T so that during T voltage E14≈0, and for T voltage E14≈EP. Therefore, from the beginning of each front signal X14 voltage E14≈EP over time

is the charge of the capacitors 23 and 24 via a resistor (R21+Rd) respectively to voltages e and e defined by the expression

where Rd≈(10-1000)Ohm differential resistance diode 26;

E24(t=0) - voltage e at the time of the pulse X14;

ED26≈0,2 B - voltage outdoor diode 26 in the end of TK (21).

With the beginning of each recession signal X14 input 14 (i.e. at E14≈0 and e≈0) over time T there is a discharge of the capacitor 23 to approximately “0”, and over time (T14-TK) be a discharge of the capacitor 24 from the voltage (23) and changing (dynamic increase and decrease) the voltage E7 through resistance R6 depending on the difference of voltage [E24(t)-E17]≈[E2(t)-EP] trend tracking voltage E7(t) (5) for changing the voltage E24(t), which in each period T14 for the first time TK (21) is increasing, then for (T14-TK) is reduced. Voltage E7(t) is detected on the input 14 of the pulse signal X14 is always greater than the threshold E(-), and at E7(t)=E(-) driver detects the failure of one pulse in the input sequence X14 (or “hang”), marked by the formation of one pulse h=!NX17 (or transfer shaper mode oscillator) with the formation of the element 16 to the signal NX17=0 single signal X16=1 (i.e. voltage e≈EP) the detector 19 through a current limiting resistor 20 and the diode 25 to its original state e≈EP detection pulse signals x14.

Using expressions NX7 (3), E7 (5), E(+) (11), E(-) (12) and TK (21) determine the condition of the detection pulses X14 ratio

but the condition of the detection of a failure or a freezing pulse X14 ratio

where TM is the duration of the detection time is a complex function of Tmax=F[R6, R22, C18, C24, E(-)] of many variables and is estimated by the ratio

From expressions T17 (17), e (22), e (23) and Tmax (26) it follows that the stable operation of the shaper mode watchdog timer with a tracking pulse signal X14 may be with a stock provided with a choice of values (T14-TK) and C3 on the basis of ratios

Considering the above, when NX9=X12=X13=1, the Builder at the time the watchdog timer, starting from some point in time “t” a dynamic state of the detection pulses (DSO)

at E17≈Tu, can be described as follows.

With the beginning of each front signal X14 during the time TK (21) voltage E14≈EP is the charge of the capacitors 23 and 24 to stress a (22) and e (23), respectively. Then with the beginning of each recession signal X14 over time T at E14≈0 occurs In the discharge of the capacitor 23 to approximately “0”, and the discharge of the capacitor 24, from the initial voltage (22), occurs within time (T14-TK), i.e. during most of the period T14, the pulse repetition rate X14. The change in voltage E7(t) is continuous with the tracking voltage e>E(-) for TK, and (T14-TK). In this regard, in this mode, the current value of the voltage E7(t), depending on the duration (T14-TK), is perceived by the element 17 to the second input when the condition in (24) detect pulses X14 as digital signal NX7=1 (i.e. E7(t)>E(-))and if the condition (25) discovery pass (or “freezing”) of pulses X14, then at some point in time, the voltage E7(t) decreases on the threshold voltage E(-) and through the condenser 18 and the resistor 7 is closed loop positive feedback the signal NX17 avalanche switches from “1” to “0”, and the driver goes to the time T17 (17) at E17≈, 0V in one state generation (UGSS)

During the time T17 (17) shaper produces a single signal X15=!NX17=1 reset, voltage E7(t)≈18(t) continuously increases due to the charge of the capacitor 18 from the voltage (e-E17)≈EP through the resistor 6, and at t=T17 voltage E7(t) becomes equal to E(+). Further increase in the voltage E7(t) by the chain of positive feedback through the capacitor 18 and the resistor 7 causes the switching signal NX17 from “0” to “1” and return the device to DSO (29). The continued operation of the driver is determined by the behavior of the signal X14 as a function of time, and when the “freeze” signal X14 (i.e. at a constant time signal X14=0 or X14=1), the driver switches the oscillator. Mode oscillator is implemented as a rotation around the ring described processes of formation NX17=0 for T17 (17) and NX17=1 for TM (26), and TM>T17.

M-system output signal X15=1 perceives as the reset pulse RST=1, after which it is initialized, tested, and starts to perform its functions. After or during the initialization of the UPA should start to programmatically generate a pulse signal X14 according to the constraint (27) for TF is Riki functioning of the device in DSO (29) when NX9=X12=X13=1. When the correct functioning of the UPA period T14 frequency following pulses X14 must satisfy the conditions (24) and (27) reliable detection of the pulse shaper x14.

If X13=0 mode the watchdog timer is disabled. This allows the debugging process to function M-system from the emulator MK or MP in step mode.

Directly from the description of the prototype [16] and this managed shaper pulses, it follows that compared to the prototype, the proposed driver, thanks to its essential features, has significantly enhanced due to the generation of output pulse X15 with the required duration T17 (17) as the front signal X12 on the first control input (formed when powering on the unit M-system or as a team o the URA mode microparasite), and when the shaper mode hardware watchdog timer (permitted individual signals X12 and X13 on the first 12 and second 13 control inputs) as the generator output pulse X15 when skipping pulse or “hang” on the pulse input 14 signal X14 formed the UPA programmatically in time as a function of time grid operation M-system.

Literature

1. Oscar mathematical SCIENCES. Microprocessor devices in electronic equipment, Ed. Bravisimo): Happy is about and a link, 1988. - 128.: “The principles of microprocessors”, C.(5-12).

2. Brodin V.B. have been, Kalinin A.V. Systems on microcontrollers and BIS programmable logic - M.: Publishing house ECOM, 2002 - 400 C., Il.

3. Stalin CENTURIES and other Design digital devices in odnokristalnye microcontrollers/Tin, Avenoso, Oppologize. - M.: Energoatomizdat, 1990. - 224 S.

4. “Structural scheme NVRAM” on RIS and redundant power supply with decoupling transistor” on RIS: pp.86 and 87 in the book: the Use of integrated circuit memory: Directory/Dry, Wry, Wetrosky and others; Ed. by Aeuginosa, Ayn. - M.: Radio and communication, 1994 - 232 C., Il.

5. Frunze AV Microcontrollers? It's as simple as that! Vol.2 - M.: OOO “ID LEOPARD”, 2002. - 392 C., Il.

6. Zeldin E.A. Digital integrated circuits in information-measuring technique. HP: Energoatomizdat. Leningrad. separa-tion. 1986. - 280 C., Il. “Impulse devices on a chip” - s-276.

7. Ugryumov, H.E. Digital circuitry. - SPb.: BHV-Petersburg, 2001. - 528 S., Il.

8. A.S. 725209, N 03 3/78, USSR. The pulse shaper/Wastediv. - Publ. 1980. Bull. No. 12.

9. A.S. 731562, N 03 3/286, USSR. Device to eliminate the effect of contact bounce/Whakatutuki. - Publ. 1980. Bull. No. 16.

10. A.S. 1132353, N 03 5/01, USSR. The device suppress the bounce/Ubcohii. - Publ. 1984. Bull. No. 48.

11. Biryukov S.A. Digital devices in MOS integrated circuits. - M.: Radio and communication, 1990. - 128 C., Il.

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Managed shaper pulses containing a common bus, the bus power supply, the pulse signal output, two resistor elements and NOT AND NOT CMOS technology, button closing, PE is the first contact which is connected with the common bus driver, and the second button contact is connected with the first pins of the first and second resistors, and a capacitor, characterized in that it additionally contains resistors on the third, seventh, first and second control inputs, pulse input, the output element is NOT open collector output, which is connected to the first output of the third resistor and is the direct output of the pulse signal shaper, the additional element AND-NOT element And the first input connected to the output element AND-NOT and the first output capacitor, the second terminal of which is connected to the second output of the first resistor and the first output of the fourth resistor, the second conclusion which through the element is NOT associated with the first input element AND IS NOT, an additional capacitor, a first output which is connected to the output element And the input of the output element and the first input element AND IS NOT, a second input connected to the second pins of the second and third resistors, a second input element AND-NOT and the first Manager of the input shaper, the second control input of which is connected through a fifth resistor to the bus power supply and is the third input element AND-NOT, and the envelope detector pulse signal supplied installation input connected to the output of the additional element AND-NOT, pulse input is m, which is the pulse input of the shaper, and an output which is connected to the first output of the sixth resistor, the second terminal of which is connected to the second terminal of the additional capacitor and the first output of the seventh resistor, the second terminal of which is connected to the second input element And, moreover, all added to the driver logic elements, except possibly for the output element is NOT, are elements of the CMOS technology.



 

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