Broadband signal search device

FIELD: radio engineering; construction of radio communication, radio navigation, and control systems using broadband signals.

SUBSTANCE: proposed device depends for its operation on comparison of read-out signal with two thresholds, probability of exceeding these thresholds being enhanced during search interval with the result that search is continued. This broadband signal search device has linear part 1, matched filter 2, clock generator 19, channel selection control unit 13, inverter 12, fourth adder 15, two detectors 8, 17, two threshold comparison units 9, 18, NOT gates 16, as well as AND gate 14. Matched filter has pre-filter 3, delay line 4, n attenuators, n phase shifters, and three adders 7, 10, 11.

EFFECT: enhanced noise immunity under structural noise impact.

1 cl, 3 dwg

 

The proposed device relates to the field of radio engineering and can be used when building communications systems, navigation, control, use wideband signals.

The known device search wideband signals (see A.S. No. 1003372, H 04 L 7/02, 1981; No. 809619, H 04 L 7/02, 1979), which have a common disadvantage in the low immunity of the search wideband signals (PSS) for the delay, namely the high probability of synchronization devices search for structural interference.

The closest in technical essence to the present invention is the device described in the book "Pseudonoise signals in communication systems", edited by Pestryakova V.B. have been, Moscow, Sov. Radio", 1973, p.66-70, 195-199, 234-240, adopted for the prototype.

Figure 1 shows the block diagram of the prototype, where the following notation:

1 - linear part;

2 - consistent filter;

3 - pre-filter;

4 - delay line;

51-5n- first,..., n-th attenuators;

61-6n- first,..., n-th phasers;

7 - adder;

8 detector;

9 is a block comparison with the threshold.

The device prototype contains serially connected linear part 1, the entrance of which is an input device, and a consistent filter 2, consisting of series-connected tentative the aqueous filter 3 and the delay line 4, the outputs of which are connected to the inputs of the second through n-th attenuator 52-5naccordingly, the outputs of which are connected respectively to the inputs of the second through n-th phase shifter 62-6nthe outputs are connected to (n-1) inputs of the adder 7, respectively; the input of the delay line 4 through the first attenuator 51and the first phase shifter 61connected to the first input of the adder 7, the output of which, which is also the output of the matched filter 2 through the detector 8 is connected to the power comparison threshold 9 whose output is the output device.

The device prototype works as follows.

The signal from the input device through the unit 1 is fed to the input of block 2, where through the block 3 is fed to the input unit 4. Input unit 4 and outputs the signal through the respective serially connected blocks 51-5nand the blocks 61-6nsupplied to the respective n input unit 7. The parameters of block 4, block 51-5nand blocks 61-6nare selected so that the output of block 7, the signal elements are added in phase and give the value of the autocorrelation function of the useful signal, and the output unit 8 is the value of the envelope of the autocorrelation function of the useful signal. As the input unit 1 of the device can come and structural interference, the output of the unit 8 in this case is the value of the envelope function cross-correlation for structural interference.

Thus, if the input unit 1 unit only comes useful signal, then the threshold is exceeded in block 9 leads to the correct decision about the presence of the useful signal and the search stops. If the input unit 1 of the device is a structural hindrance, then the threshold is exceeded in block 9 will lead to an erroneous decision on the termination of the search signal.

The disadvantage of this device prototype is a low immunity when exposed to structural interference.

To eliminate this drawback in the device search broadband signals sequentially connected to the first detector and the first block of comparison with a threshold, connected in series linear part, the first signal input which is the input device, and a consistent filter, which is connected in series pre-filter and the delay line, and n attenuators, n phasers and the first adder whose output is the first output of the matched filter, and the input of the delay line connected in series through the first attenuator and the first phase shifter connected to the first input of the first adder, the outputs of the delay line through (n-1) attenuators are connected with the inputs of the (n-1) phase, respectively, and the outputs of the phasers from the second n/2 connected with the WTO is haunted by n/2 inputs of the first adder, respectively, entered serially connected clock and the control unit switches the channel, the output of which is connected with the second, managing the input of the linear part; inverter connected in series, the fourth adder, a second detector, the second block of comparison with a threshold, the element and NOT the element, And the output of which is connected to the first, the controlling unit controls the switching of channels is output; if the output of the first block of comparison with the threshold connected with the second input element And; consistent filter introduced the second and third adders, the outputs of which are respectively the second and third outputs of the matched filter, this outputs phasers with (n/2+1)-th to n-th connected with the first n/2 inputs of the second adder, respectively, the output of which is connected to the first input of the fourth adder and to the second input of the third adder, a first input connected to the output of the first adder and the input of the inverter.

Figure 2 shows the block diagram of the proposed device, where the following notation:

1 - linear part;

2 - consistent filter;

3 - pre-filter;

4 - delay line;

51-5n- first,..., n-th attenuators;

61-6n- first,..., n-th phasers;

7, 10, 11, 15 - first, second, Proc. of the enterprises and fourth adders;

8, 17, the first and second detectors;

9 and 18, the first and second blocks comparison with a threshold;

12 - inverter;

13 is a control block zapping;

19 - clock.

The proposed device comprises a serially connected linear part 1, the first signal input which is the input device, and a consistent filter 2; connected in series generator clock pulses 19 and the control unit switches the channel 13, the output of which is connected with the second, managing the input of the linear part 1; connected in series to the inverter 12, the fourth adder 15, the second detector 17, the second block of comparison with a threshold 18, NO element 16 and the element And 14 whose output, which is the output device, connected to the first, managing the input of the control unit switches the channel 13; connected in series, the first detector 8 and the first block of comparison with the threshold 9, the output of which is connected with the second input element And 14.

Consistent filter 2 contains connected in series pre-filter 3, the input of which is also the input of the matched filter 2, and the delay line 4, and n attenuators 51-5nand n phasers 61-6nthe first 7, the second 10 and 11 third adders, the outputs of which are respectively the first, second and third outputs from Lavandula filter 2. When the input of the delay line 4 connected in series through the first attenuator 51and the first phase shifter 61connected to the first input of the first adder 7, and the outputs of the delay line 4 is connected with the inputs of the second through n-th attenuator 52-5naccordingly, the outputs of which are connected with the inputs of the second through n-th phase 62-6naccordingly, the outputs of which are connected to the second n/2 inputs of the first adder 7, respectively, and first to n/2 inputs of the second adder 10, respectively. In addition, the output of the first adder 7 is connected to the first input of the third adder 11 and the input of the inverter 12; the output of the second adder 10 soedinenie with the second input of the third adder 11 and the first input of the fourth adder 15; the output of the third adder 11 is connected to the input of the first detector 8.

The proposed device operates as follows. The input device may receive a signal, a structural hindrance or their mixture.

Consider the case where the first signal input unit 1, which is the input device receives only the useful signal. With unit output 1 signal to the input of block 2, where through the block 3 is supplied to the input unit 4. Input unit 4 and n/2-1 outputs signals through the respective units 51-5n/2and then through the blocks 61-6n/2come on in the odes of block 7, respectively. With the remaining n/2 outputs of the block 4 signal through the respective units 5n/2+1-5nand then through the blocks 6n/2+1-6narrive at the inputs of the block 10, respectively. The signals from the outputs of blocks 7 and 10 are received respectively in the first and second inputs of the block 11. The parameters of the block 4, block 51-5nand blocks 61-6nare selected so that the output of block 11, the signal elements are added in phase and give the value of the autocorrelation function of the useful signal, which is output from the unit 11 is input to the block 8. From the output of the block 8 is the envelope of the autocorrelation function of the useful signal is input to the block 9, where it is compared with a threshold value. The threshold is exceeded in block 9 causes the output unit 9 to the second input unit 14 receives a logical unit.

Simultaneously, the output of block 10, the signal at the first input unit 15, and the output unit 7 through the block 12, the signal at the second input unit 15. This leads to the fact that at the time when the block 11 all elements with outputs of blocks 7 and 10 are added in-phase, in block 15 elements from the output of block 10 are formed with opposite phase elements coming from unit 7 through the block 12, i.e., the value of the autocorrelation function of the signal at the output of block 15 will be close to zero. From the output unit 15 is the autocorrelation function of the useful signal is Ala is applied to the input unit 17. From the output of the block 17 is the envelope of the autocorrelation function of the useful signal is input to block 18, where it is compared with a threshold value. In this case, the threshold in block 18 will not be exceeded, and with its output to the input unit 16 will be a logical zero, the output unit 16 to the first input unit 14 will be a logical unit. Therefore, the output of block 14 will be a logical unit and received at the first control input unit 13, which will lead to fixation of the channel, so that the output of the logic unit output unit 14 indicates that the signal is found and the search is over.

If the first signal input unit 1 receives a mixture of the useful signal and the powerful structural interference, as in the case of only the useful signal, the threshold is exceeded by the sum of the envelope of the autocorrelation functions of the signal and function cross-correlation interference in the block 9 will flow to the second input unit 14 logical units. The probability that at the same time the value of the mutual correlation does not exceed the threshold in block 18, is small enough. That is, the output unit 16 to the first input unit 14 receives a logical zero.

Therefore, the output unit 14 to the first control input unit 13 will be a logical zero, indicating that the signal is not found, and the search of the useful signal will be continued on other channels.

If the lane is th, signal input unit 1 will be powerful structural hindrance, then the probability that the reference time is exceeded the threshold in block 9 and block 18, is large enough. This means that the first input unit 14 will be a logical zero, and the second input unit 14 will be a logical unit. From the output unit 14 to the first control input unit 13 will be a logical zero and signal search will be continued on other channels.

Structural block circuit 13 shown in figure 3, where the following notation:

131 binary counter;

132 - meter fixed numbers;

133 - shaper;

134 - channel switch;

135 - tunable oscillator,

136 - key.

The block 13 has connected in series key 136, the counter fixed numbers 132, the imaging unit 133, a channel switch 134 and tunable generator 135, the output of which is the output of block 13; and also includes a binary counter 131, the input of which is also the first managing unit 13, and the output of the binary counter 131 is connected to the first input of the key 136, the second input of which is also the second clock input unit 13.

Unit 13 operates as follows.

The output signal of the block 19 is received on the second input unit 136, which is also the second, synchronized by the input unit 13. Output unit 136 signals the post is forced to the input unit 132, which is designed for a certain number of clock pulses. This number is determined by the time during which the device will detect the useful signal in this channel. If the signal is within a certain time has not been detected, the output unit 132 to the input unit 133 receives a signal. Under the influence of this signal output unit 133 will be the pulse, which is fed to the input of block 134. Output unit 134 to the input unit 135 receives a signal that transitions on the selected channel. Output unit 135, which is also the output unit 13, the signal at the second control input of block 1.

If the device search found useful signal, the output unit 14 to the input unit 131 will be a logical unit and transfer it to another state. Output unit 131 to the first input unit 136 receives a signal, which will result in closure of the block 136. This will provide reception on this channel. Before you begin the unit 13 is set to zero.

The structural scheme of the blocks 134 and 135 and a description of their operation is given in the application form UK No. 1473608.

Blocks 14, 18, 12 and 19 have broad application. Description of the structure and principles of such block diagrams can be found, for example, in the book of M. Mandla "200 favorite electronics circuits", Per. s angl. edited by Itzhaki AS, Moscow: Mir, 1980:

block 12 - pages 32-34, Fig. 1.13;

blocks 14, 18 - page 176 - 81, Fig. 8.3 (b), 8.6 (b).

The block 19 may be made on the basis of various types of generators, for example on the basis of the crystal oscillator (Mandl M. "200 favorite electronics circuits", M.: Mir, 1980, pp. 86-87, RIS), or on the basis of the blocking-oscillator (ibid, pp. 94-96, Fig. 4.9).

In the prototype the impact of structural interference leads to a high probability of exceeding the threshold envelope function cross-correlation interference. This will lead to what will happen to the false synchronization to the interference.

In the inventive device, the impact of structural interference can be significantly reduced due to the large probability of exceeding thresholds in blocks 9 and 18 at the time of reference, which leads to the continuation of the search signal. That is, the introduction of additional blocks in the claimed device reduces the probability of false synchronization in comparison with the prototype.

The device search broadband signals sequentially connected to the first detector and the first block of comparison with a threshold, connected in series linear part, the first signal input which is the input device, and a consistent filter, which is connected in series pre-filter and the delay line, and n attenuators, n phasers and the first adder whose output is the first output according to the data filter, when the input of the delay line connected in series through the first attenuator and the first phase shifter connected to the first input of the first adder, the outputs of the delay line through (n-1) attenuators are connected with the inputs of the (n-1) phase, respectively, and the outputs of the phasers from the second n/2 is connected to the second n/2 inputs of the first adder, respectively, characterized in that the input connected in series generator of clock pulses and the control unit switches the channel, the output of which is connected with the second, managing the input of the linear part, connected in series inverter, the fourth adder, a second detector, the second block of comparison with a threshold, the element and NOT the element, And the output of which is connected to the first, the controlling unit controls the switching of channels is output, and the output of the first block of comparison with the threshold connected with the second input element And; consistent filter introduced the second and third adders, the outputs of which are respectively the second and third outputs of the matched filter, and the outputs of phase with (n/2+1)-th to n-th connected with the first n/2 inputs of the second adder, respectively, the output of which is connected with the first input of the fourth adder and to the second input of the third adder, a first input of which is coupled to the output of the first adder and the input of the inverter.



 

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