The device transmit and receive phase-shift keyed code signals

 

The invention relates to communication systems, orthogonal pseudonoise codes with photomanipulating modulation of the carrier frequency. Achievable technical result is the formation in the asynchronous transfer mode signals multiple transceivers operating in the same channel, long enough fazokodirovannymi signals and their effective treatment with a significant shift of the carrier frequencies of the transceivers for transmitting and receiving points. For this purpose, the device comprises a block 1 of the inverse permutation, multi-channel incoherent correlator 2, multi-drive 3, block 4 decision block 5 input / output unit 6 non-coherent demodulators generator 7 reference signals, binary quantizer 8, incoherent coherent filter 9 is logically converted code, incoherent coherent filter 10 balanced code, the adder 11, a differentiating unit 12, the threshold block 13, block 14 of the agreement, the generator 15 balanced code, block 16 permutations, block 17 logical conversion unit 18 commutation, phase modulator 19, the amplifier 20, the generator 21 pulses, the phase shifter 22, the imaging unit 23 of the control signals, the block 24 random delay. 7 Opponentname codes with photomanipulating modulation of the carrier frequency and can be used to transmit and receive data through the channels of electric power networks, as well as wired and radio communication.

A device receiving and transmitting information along the lines of force of the electric grid, containing the pseudo-random sequence generator, wideband modulator and demodulator, amplifiers and device matching with the electric network, the synchronization unit of a pseudorandom sequence generator from signals of electrical power network (see U.S. patent No. 4864589, CL H 04 L 27/30). However, such a device has a low precision synchronization and becomes unhealthy when the loss of signal is an alternating voltage electric power network.

The known method and apparatus for parallel incoherent correlation processing complex wideband signals, containing two channels of synchronous and quadrature processing, each of which is connected in series includes a multiplier, a filter, a coherent filter on two codes, the outputs of the matched filter in-phase channel are summed with the corresponding outputs of the matched filter quadrature channel by using adders, which outputs through a non-linear elements connected through a separate adder to the input of the Normalizer (see U.S. patent No. 5963586, CL N 04 1/707). However, the first lobe of the correlation function, which reduces the precision of the estimate of the delay clock. When receiving the information modulated signal a method and apparatus are characterized by low data transmission rate and is not protected from collisions in the asynchronous transfer mode signals multiple transceivers operating in the same channel.

The prototype of the invention is a device to transmit and receive phase-shift keyed code signals containing serially connected phase modulator, amplifier, block matching, binary quantizer block noncoherent demodulators connected in series pulse generator, phase shifter, synchronous and quadrature outputs of which are connected to respective inputs of the block noncoherent demodulators synchronous output of the phase shifter connected to the input of the phase modulator, the second output of the pulse generator is connected to the multichannel inputs of a non-coherent correlator via a generator of reference signals, the second output of which is connected to the input of the decision, the outputs of which are connected to the inputs of the block I / o, which has input and output input and output data, and block matching is connected to the distribution channel to photomanipulate long enough fazokodirovannymi signals with high reliability when the shift of the carrier frequencies of the transceivers for transmitting and receiving points, exceeding the value defined by the coherence interval of the synchronizing sequence and block code. The prototype is not protected from collisions (overlapping in time of the signals transmitted by different transceivers) in asynchronous transfer mode signals multiple transceivers operating in the same channel.

The basis of the invention is to create a simple device receiving and transmitting, to form in the asynchronous transfer mode signals multiple transceivers operating in the same channel, long enough fazokodirovannymi signals and effectively process with a significant shift of the carrier frequencies of the transceivers for transmitting and receiving points.

The device transmit and receive phase-shift keyed code signals containing serially connected phase modulator, amplifier, block matching, binary quantizer block noncoherent demodulators connected in series pulse generator, phase shifter, synchronous and quadrature outputs of which are connected to respective inputs of the block noncoherent demodulators synchronous output of the phase shifter connected to the input of the phase modulator, vtoro the reference signals, the second output of which is connected to the input of the decision, the outputs of which are connected to the inputs of the block I / o, which has input and output input and output data, and block matching is connected to the distribution channel photomanipulating signal through a separate input-output, according to the invention additionally connected in series generator balanced code block permutation, the logical unit conversion, switching unit, the output of which is connected to the second input of the phase modulator, the output of the generator is balanced code is connected to second inputs, respectively, of the logical block conversion and the switching unit, the third input of which is connected to the output of the block permutation, the second generator output balanced code is connected to the second input of block permutation to the input of block random delay and the input of the shaper control signals, one output of which is connected to the third input of the block I / o, the second output driver control signals connected to the fourth input of the switching unit and the third input of the block permutation, the fourth input of which is connected to a separate output block I / o, additional output of which is connected to Alenia, in-phase and quadrature outputs of the block noncoherent demodulators connected to in-phase and quadrature inputs of the block of the inverse permutation and through incoherent coherent filter is logically converted code to synchronous and quadrature inputs incoherent matched filter balanced code, the output of which through the adder connected to the input of a differentiating unit, separate entrance incoherent matched filter is logically converted code is connected to the second input of the adder, the second output of the pulse generator is connected to the clock inputs, respectively, of a non-coherent matched filter is logically converted code, incoherent matched filter balanced code, differentiating unit and a threshold unit, the output of which is connected to the fourth input of the block I / o and through a differentiating unit to the generator input reference signal synchronizes the input multi-channel incoherent correlator combined with clock inputs, respectively, of the block of the inverse permutation generator balanced code block permutation block decision and connected to the second output of the pulse generator, the output sledovatelno United multichannel incoherent correlator and a multi-line drive to the second input of block a decision, the second output of which is connected to a separate input of a multichannel tape drive, an additional input connected to additional inputs of the block of the inverse permutation, multi-channel incoherent correlator and connected to the second generator output reference signals, and a third output driver control signals connected to the third input of the phase modulator.

New blocks and ties allow asynchronous transfer mode signals multiple transceivers operating in the same channel, to form a segment-balanced synchronous block-coded photomanipulating signal, and the reception mode to maintain accurate block synchronization by estimating delays the received clock filter, consistent with the amount of modules segment and multi-segment-module correlation decoding a block code with a significant shift of carrier frequencies for transmitting and receiving party, as well as reduce the impact on the transceiver collision of his signals with signals from other transceivers operating in the same channel.

In Fig.1 shows a block diagram of a device receiving and transmitting photomanip the permutation logical transformations, the switching unit and the imaging unit control signals.

In Fig.3 depicts a schematic explaining the operation unit I / o.

In Fig.4 shows diagrams illustrating the operation of block random delay.

In Fig.5 depicts a schematic explaining the operation of incoherent agreed filters balanced code and logically converted code, and adder.

In Fig.6 depicts a schematic explaining the operation of multi-channel incoherent correlator and multi-drive.

In Fig.7 depicts a diagram illustrating the effect of using a segment of a coherent, modular processing complex composite segmental balanced signal when the detuning of the carrier frequencies.

The device transmit and receive phase-shift keyed code signals includes sequentially connected phase modulator 19, the amplifier 20, block 14 matching, binary quantizer 8, block 6 non-coherent demodulators connected in series generator 21 pulses, the phase shifter 22, synchronous and quadrature outputs of which are connected to respective inputs of the block of a non-coherent demodulator 6. Simultaneous output of the phase shifter 22 is connected to the input of the phase modulator 19, the second in the 7 reference signals, the second output of which is connected to the input unit 4 decision, the outputs of which are connected to the inputs of block 5 I / o, which has input and output input and output data. The coordination unit 14 is connected to the distribution channel photomanipulating signal through a separate entrance-exit. Are connected to the generator 15 balanced code, block 16 permutations, block 17 logical conversion unit 18 of the switching, the output of which is connected to the second input of the phase modulator 19. The output of the generator 15 balanced code is connected to second inputs, respectively, of block 17 of the logical conversion unit 18 of the switching, the third input of which is connected to the output of block 16 permutations. The second output of the generator 15 balanced code is connected to the second input unit 16 changes the input unit 24 random delay and the input of the shaper 23 control signals, one output of which is connected to the third input of the block 5 input / output. The second output of the imaging unit 23 of the control signals connected to the fourth input of the switching block 18 and the third input unit 16 changes the fourth input of which is connected to a separate output block 5 input / output, additional output of which is connected to the second input unit 24 and quadrature outputs of a block of a non-coherent demodulator 6 is connected to the in-phase and quadrature inputs of block 1 of the inverse permutation and through incoherent coherent filter 9 is logically converted code to synchronous and quadrature inputs incoherent matched filter 10 balanced code, the output of which through the adder 11 is connected to the input of the differentiating unit 12, a separate exit incoherent matched filter 9 is logically converted code is connected to the second input of the adder 11. The second output of the pulse generator 21 is connected to the clock inputs, respectively, of a non-coherent matched filter 9 is logically converted code, incoherent matched filter 11 balanced code, differentiating unit 12 and the threshold unit 13, the output of which is connected to the fourth input unit 5 I / o and through a differentiating unit 12 to the input of the generator 7 reference signals. Clock input multi-channel incoherent correlator 3 combined with clock inputs, respectively, of block 1 of the inverse permutation generator 15 balanced code, block 16 permutation unit 4 decision-making and is connected to the second output of the generator 21 pulses. The output of the adder 11 is connected to the second input of the threshold unit 13. The outputs of block 1 of the inverse permutation is connected through serially connected multi-channel incoherent correlator 2 and multi-drive 3 to the second input unit 4 decision, the second output of which is connected to the CTD is block 1 of the inverse permutation, multi-channel incoherent correlator 2 and connected to the second output of the generator 7 reference signals. The third output of the imaging unit 23 of the control signals is connected to the third input of the phase modulator 19.

The generator 15 balanced code contains the generator 25 pseudo-random code, forming a balanced (containing the same number of logical 1 and logical 0) pseudo-random sequence and the decoder 26, the output of which appears a pulse repetition period equal to the repetition period of the pseudorandom sequence.

Unit 16 performs permutation permutation characters balanced code generated by the generator 15, and contains the block 27 of RAM, the switch 28, the generator 29 signals read and write.

Unit 17 logical conversion converts characters from the outputs of the generator 15 balanced code and unit 16 permutations according to the rules of the algebra of logic. As such a conversion is selected, for example, the operation of summing modulo two, performed by the adder 30 modulo two.

The imaging unit 23 generates control signals control codes for block 18 switching and generator 29 signals read and write, spaced intervals of the clock, shaper 34 time intervals of the frame, logic And 33 and 37, block 35 decoders, the trigger 36.

Unit 5 I / o contains a differentiator 44, serially connected registers 38, 39, 40 and connected in series registers 41, 42, 43 of the shift performing a write operation, shift and storage of bits transmitted and received data. Part of the input information includes bit transfer mode at the input of the differentiator 44 and installation inputs of the registers 41, 42, 43 shift.

Block 24 random delay comprises a generator 45 random number, a counter 46, the decoder 47, RS-flip-flop, D-flip-flop, the differentiator 50. Unit 24 carries out the delay random variable pulse with the respective unit output 5 I / o.

Non-coherent multichannel correlator 2 performs multichannel correlation processing segments of the in-phase and quadrature components of the demodulated words block code with unknown initial phase of the carrier wave. Non-coherent multichannel correlator 2 contains a multiplier products 73, 77, 80, 84, 87, 91, adders 74, 78, 81, 85, 88, 92, blocks 75, 79, 82, 86, 89, 93 the modulus of the sum adders 76, 83, 90. Installation inputs of the adders 74, 78, 81, 85, 88, 92 United and connected through the to the output of the generator 7. One of the inputs of multiplier products 73, 77, 80, 84, 87, 91 connected to the outputs of the generator 7 of the reference signals and the other input of multiplier products 73, 80, 87 to the output of the synchronous components of the block 6 non-coherent demodulators. Other inputs of the multiplier products 77, 84, 91 connected to the output of the quadrature components of the block 6 non-coherent demodulators.

Incoherent agreed filters 9 and 10 have the same structure, but are different forms of code sequences and perform quadrature matched filtration segments received singaporelovelinks.com unknown initial phase of the carrier wave. Each of incoherent agreed filters 9 and 10 contains the registers 51, 62, 59, 70 of the shift registers 53, 57, 64, 68 storage, the blocks 52, 58, 63, 69 adders modulo two adders 54, 60, 65, 71, blocks 55, 61, 66, 72 modulus sum adders 56 and 67. The input of the register 51 of the shift is connected to the output common-mode components of block 6 of a non-coherent demodulator and the input of the register 59 to the output of the quadrature components of the block 6 non-coherent demodulators. The clock inputs of the registers 51, 62, 59, 70 connected to the output of generator 21 pulses.

Multi-drive 3 contains drives, each of which contains the serial is Loka 4 decision-making.

The device operates as follows. There are two mode: transmission mode and the reception mode information.

Transition in a particular mode depends on the value of the bit transfer mode at the input of block 5 input / output. If the bit transfer mode is 1, the device writes data in block 5 of the I / o registers 41, 42, 43), their coding and transmission channel using photomanipulating code signal. If the bit transfer mode is equal to zero, that is, the demodulation and decoding received from the channel information.

In transmission mode through the block 14 reconciliation in the transmitted frame phase-shift keyed code. When this generator 21 generates pulses of the reference harmonic oscillation of the form Agcos(t+), where ag,andaccordingly, the amplitude, angular frequency and initial phase. The phase shifter 22 generates two harmonic oscillations f1(t) and f2(t), shifted relative to each other on 90

F1(t)=Acos(it+i);

F2(t)=Asin(it+Manipulation carrier oscillation causes the phase modulator 19, to one input of which is applied the code from the output of the switching block 18 and the other input is a harmonic oscillation of the carrier frequency generated by the generator 21 pulses and supplied to the input of the phase modulator 19 from the output of the phase shifter 22. Zero-phase carrier wave corresponds to a logical zero code and phase equal to 180- a logical unit of code sequence. Photomanipulating the output signal of the phase modulator 19 flows into the distribution channel, after the pre-processing amplifier 20 and the block 14 of the agreement. The frame structure of the transmitted information consists of a preamble in the form of a clock signal and sequentially adjacent information modulated orthogonal (or quasiorthogonal) code sequences. All a lot of information-modulated sequences forms an orthogonal block/quasiorthogonal code.

The synchronization sequence consists of two segments S1and S2, each of which has good correlation properties (small values of side lobes of the auto - and mutually of correlation the first segment synchronizing sequence S1is the generator 15 balanced code with generator 25 pseudo-random code. As such a generator can be used as a shift register with feedback, form an extended one character to the M-sequence. So, balanced code of length N=16, formed on the basis of the polynomial f(x)=x4+x+1 and extended by adding one zero symbol has the form S1=[s1,0,s1,1,... ,s1,N-1]=0000100110101111.

From the output of the generator 15 balanced code S1received at the input unit 16 permutations, where in block 27 of RAM is a permutation of the form Pfcharacters without disrupting properties balancesthe. The law of permutations of the form should not significantly change for the worse correlation properties of the signal. So, if the permutation characters to act according to rule

you will get another sequence of the form S3=[s3,0,s3,1,... ,s3,N-1]=0010001111010110 belonging to the class of pseudo-random, balanced with good correlation properties. In block 16, the rearrangement is carried out continuously, for this block 27 memory device includes two memory Ostia, and read the law of permutations of the form. Accordingly, the switch 28 connects to the output of block 16 permutations of the outputs of those operational storage devices that operate in the read mode. Addresses of read and write forms generator 29 signals read and write, controlled by signals from the outputs of the imaging unit 23 of the control signals, block 5 I / o, clock pulses fed to the input of generator 29 from the output of the generator 21 pulses. In the generation mode clock output unit 5 I / o goes to zero code, from the output of the shaper 32 time intervals of the clock logic unit, with the output of the circuit 33 alternately first logical zero, then the logical unit from the output of the shaper 34 time intervals of the frame is a logical zero. The beginning of the formation clock set pulse at the input of the trigger 36 from the output of block 24 random delay.

Codes from the output of the generator 15 balanced code and unit 16 permutations act on the input unit 17 logical conversion, the output of which is formed a second segment of S2a clock signal. For the considered example, as a logical operation selected summation modulo the tp://img.russianpatents.com/chr/8853.gif">S3=0010101001111001.

This code is well balanced and has good correlation properties.

The clock signal Scis formed by concatenating (joining) of the signals from the outputs of the generator 15 balanced code and unit 17 logical conversion

Sc=S1|S2=00001001101011110010101001111001.

Correlation properties of the received code sequence are illustrated in Fig.7a.

The join operation is performed by block 18 of the switching control signals received at its inputs from the outputs of the imaging unit 23 of the control signals. When the input unit 18 from the output of the shaper 32 time intervals of the clock logic unit, and from the output of the shaper 34 time intervals of the frame and from the output of the logical circuit 33 And a logical zero to the output of the switching block 18 is connected to the output of the generator 15 balanced code. When the input unit 18 from the output of the shaper 32 time intervals of the clock and the output of the circuit 33 And logical units, and from the output of the shaper 34 time intervals of the frame is a logical zero to the output of the switching block 18 is connected to the output unit 17 of the logical transformation. When entering the inlet 18 of the block 16 permutation is formirovala 34 time intervals of the frame - logical unit ends the formative phase of the synchronization signal, and the device enters the mode of encoding and transmitting the input data. In this mode, the switching block 18 connects to your output signal from the output of block 16 permutations, and the output of the circuit 37 And appears and is supplied to the clock inputs of the registers 41, 42, 43 signal with a repetition period equal to twice the repetition period balanced code. This clock signal is the serial overwriting of data blocks bylog2N bits from one register 41-43 in the other. Outputs of the last register 43 block of data is fed to the input of the generator 29 signals read and write, which is located in block 16 permutations. In accordance with the code data block in block 16 of the permutation operation is performed quasicycles shift code S3=[s3,0,s3,1,... ,s3,N-1]. When this symbol S3,0located at the zero position remains unchanged, and the characters in the positions from first to (N-1), cyclically shifted. The shift value is set by the code data. The code reading data from block 5 of the I / o occurs with a period two times longer than the repetition period of the ha balanced sequence from the output of block 16 permutations. For example, for K=0010 at the output of the switching block 18 is formed integral segmental balanced code

S3(K)|S3(K)=0000111101011001/0000111101011001.

The number of information blocks in the frame is governed by the capacity of the shaper 34 time intervals of the frame. Coding blocks of data is terminated when the output of the shaper 34 time intervals of the frame Builder 32 - time clock, set logical zero potentials. The output unit 35 decoders throws the trigger 36, the potential output which suspends operation of the phase modulator 19.

Thus, in transmission mode i-e device generates photomanipulating code signal is of the form

where Ci=[ci,0,.withi,1...withi,2N(m+1)-1}=

=S1|S2|S3(K1)|S3(K1)|S3(K2)|S3(K2)|... |S3(Km)|S3(Km) -

segmental balanced code sequence of charactersi,l{0,1}, each segment S is composed of an equal number of zero and unit symbols and belongs to the class of orthogonal (quasiorthogonal) codes; K1the shift value is edit signal at random intervals. This is done using block 15 random delays, delays for a random time interval, the signal is received, the corresponding bit transfer mode on the input of the shaper 23 control signals. The generator 45 random numbers continuously generates random numbers h. If set to zero, bit transfer mode, the counter 46 is set to the zero state. When the signal corresponding to a single bit value of the transmission mode, the output of block 5 I / o is formed impulse, throwing the RS-flip-flop 48 and sets the bits of the counter 46 in the position defined by the random code generator output 45 of random numbers. The counter 46 has a capacity of M bits and counts the pulses from the output of the decoder 26. The decoder 47 is configured to zero-code output of the counter 46 and the pulse at its output appears after the counting by counter 46 random number (2mh) of the pulses from the output of the decoder 26. The output of the decoder 47 is connected to the clock input of a D flip-flop 49, the other input of which is fed the output signal of the trigger 48. After the appearance of the pulse at the output of the decoder 47 at the output of D flip-flop 49 is formed with the potential output of the trigger 48, the time of occurrence of which is different is La unknown initial phase of the carrier wave. The received signal through the block 14 of the agreement, the binary quantizer 8, is fed to the input of block 6 of a non-coherent demodulators, which calculates in-phase and quadrature components on videocassette. When receiving a signal from the j-th transmitter outputs a non-coherent demodulator of the i-th device of acceptance are highlighted common mode

and quadrature

components=(i-j)-=(i-j- detuning, respectively, frequencies and initial phases of carrier oscillations received and reference signals.

The in-phase component is formed as a result of filtering in-band signal of the multiplying binary quantized received signal to the common mode harmonic copy of the reference frequency carrier wave. The quadrature component is formed as a result of filtering in-band signal of the multiplying binary quantized received signal to a quadrature harmonic copy of the reference frequency carrier oscillation, sdin is abania.

Frame received binary photomanipulating code signal is processed in two stages. The first step is to synchronize the operation of the generator 7 of the reference signals on the evaluation delay of the received singaporelovelinks.com. The evaluation delay is calculated differentiating unit 12 according to the maximum output signal of the adder 11, which calculates the sum of the incoherent responses agreed filters 9 and 10 that are configured on the segments of S2and S1synchronizing sequence of the received signal. Incoherent agreed filters 9 and 10 calculate the sum of the modules of folds in-phase and quadrature components from the outputs of the block 6 non-coherent demodulators with copies of segments of signals recorded in the storage registers 53, 57 (copy 82) and the storage registers 64, 68 (copy 82). The responses of the filters 9 and 10 are summed and fed to the inputs of the differentiating unit 12 and the threshold unit 13. The area is a strong correlation threshold is determined by the block 13, the excess signal from the output of the adder 11 a predetermined threshold. At the output of the threshold unit 13, a signal is generated that allows: recording of information in the registers 38, 39, 40 block 5 I / o; the formation of a code corresponding to the evaluation zaderzkoy the second stage decoding words block code. At this stage, the in-phase and quadrature components from the output of block 6 of a non-coherent demodulators are inverse permutation block 1 inverse permutation; correlation processing on the analysis interval Ta=Nsegments S3(K) in a multi-channel incoherent correlator 2; accumulation in the interval Tn=2nresults of correlation processing of repeating segments, and the calculation unit 4 decision-making code of the received data block number channel multi-drive 3 with the maximum correlation. Here- the duration of the elementary value of the reference code sequence.

Unit 1 the inverse permutation permutes the in-phase samples and the quadrature component by law to convert many shifts of a sequence S3in many shifts balanced code S1. For the considered example, the permutation

applied to the columns of the matrix quasicycles shifts the sequence S3

leads to the matrix quasicycles shifts balanced code1

Each canyonscope shift S3(K) generated by the generator 7 of the reference signals with in-phase and quadrature components arriving at the inputs of multiplier products 73, 77, 80, 84, 87, 91 from the outputs of the block 6. In the interval of the accumulation unit 4 decision calculates the number of channel of the multichannel drive 3 with a maximum value and recalculates the number in the code data block that is written to the registers 38, 39, 40 block 5 input / output. Then detained in the element 101 pulse occurs nulling accumulation in registers 95, 97, 99 multi-drive 3. At the end of the analysis interval on the installation inputs of the adders 74, 78, 81, 85, 88, 92 multi-channel incoherent correlator 2 receives the delayed element 100 pulse, leading to the nullification of the results of the summation.

The use of the invention enables modular segment correlation processing and a consistent filtering of complex signals with a significant shift carrier oscillations received and reference signals. Conventional correlation processing of complex signals on the interval [0,T] without the use of tracking systems synchronization is possible if shift

The invention due to segmental balanced page is receiving allows you to synchronize and decode the signal at higher shiftof carrier frequencies received and reference signals. In Fig.7a shows the response of the conventional matched filter when processing a synchronization sequence with a zero shift in frequency and phase of carrier oscillations. With increasing detuning to the value ofwith zero mismatches initial phases of conventional coherent filter can be suppressed region a strong correlation (Fig.7b), which makes it impossible for synchronization and decoding of the complex signal. The combination of adder 11, decoherence agreed filters 9 and 10 implement segment-modular consistent processing of complex signals. The use of segment-modular coherent processing allows you to restore the contrast region a strong correlation (Fig.7b) and to evaluate the delay of the synchronization signal and decoding a block code. The minimum value of the maximum peak in the region of strong correlation does not fall below the value of theN, where N is the length of the segment. The formation of a transmitted frame in random moments of time reduces the probability of collision of signals transmitted by different transceivers operating in the same kanalirovannykh code signals, containing serially connected phase modulator, amplifier, block matching, binary quantizer block noncoherent demodulators connected in series pulse generator, phase shifter, synchronous and quadrature outputs of which are connected to respective inputs of the block noncoherent demodulators synchronous output of the phase shifter connected to the input of the phase modulator, the second output of the pulse generator is connected to the multichannel inputs of a non-coherent correlator via a generator of reference signals, the second output of which is connected to the input of the decision, the outputs of which are connected to the inputs of the block I / o, which has input and output input and output data, moreover, the block matching is connected to the distribution channel photomanipulating signal through a separate input-output, characterized in that additionally connected in series generator balanced code block permutation, the logical unit conversion, switching unit, the output of which is connected to the second input of the phase modulator, the output of the generator is balanced code is connected to second inputs, respectively, of the logical block conversion and the switching unit, Trethorne input block permutation, the input block is a random delay and the input of the shaper control signals, one output of which is connected to the third input of the block I / o, the second output driver control signals connected to the fourth input of the switching unit and the third input of the block permutation, the fourth input of which is connected to a separate output block I / o, additional output of which is connected to the second input of the random delay, the output of which is connected to the second input of the shaper control signals, in-phase and quadrature outputs of the block noncoherent demodulators connected to in-phase and quadrature inputs of the block of the inverse permutation and through incoherent coherent filter is logically converted code to synchronous and quadrature inputs incoherent matched filter balanced code, the output of which through the adder connected to the input of the differentiating unit, separate entrance incoherent matched filter is logically converted code is connected to the second input of the adder, the second output of the pulse generator is connected to the clock inputs respectively incoherent matched filter is logically converted code, recoveredge to the fourth input of the block I / o and through a differentiating unit to the generator input reference signals, clock input multi-channel incoherent correlator combined with clock inputs, respectively, of the block of the inverse permutation generator balanced code block permutation block decision and connected to the second output of the pulse generator, the output of the adder is connected to the second input of the threshold unit, the outputs of the block of the inverse permutation is connected through serially connected multi-channel incoherent correlator and a multi-line drive to the second input of block a decision, the second output of which is connected to a separate input of a multichannel tape drive, an additional input connected to additional inputs of the block of the inverse permutation, multi-channel incoherent correlator and connected to the second generator output reference signals, with the third output driver control signals connected to the third input of the phase modulator.

 

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16 cl, 8 dwg

FIELD: communication system transceivers.

SUBSTANCE: transceiver 80 has digital circuit 86 for converting modulating signals into intermediate-frequency ones. Signal source 114 transmits first periodic reference signal 112 at first frequency. Direct digital synthesizer 84 receives second periodic signal 102 at second frequency from first periodic reference signal. Converter circuit affording frequency increase in digital form functions to convert and raise frequency of modulating signals into intermediate-frequency digital signals using second periodic signal 102. Digital-to-analog converter 82 converts intermediate-frequency digital signals into intermediate-frequency analog signals using first periodic reference signal 112.

EFFECT: reduced power requirement at low noise characteristics.

45 cl, 3 dwg

FIELD: radio engineering; portable composite phase-keyed signal receivers.

SUBSTANCE: proposed receiver has multiplier 4, band filter 6, demodulator 8, weighting coefficient unit 5, adding unit 7, analyzing and control unit 10, synchronizing unit 3, n pseudorandom sequence generators 21 through 2n, decoder 1, and switch unit 9. Receiver also has narrow-band noise suppression unit made in the form of transversal filter. Novelty is that this unit is transferred to correlator reference signal channel, reference signal being stationary periodic signal acting in absence of noise and having unmodulated harmonic components that can be rejected by filters of simpler design than those used for rejecting frequency band of input signal and noise mixture. Group of synchronized pseudorandom sequence generators used instead of delay line does not need in-service tuning.

EFFECT: facilitated realization of narrow-band noise suppression unit; simplified design of rejection filters.

1 cl, 8 dwg

FIELD: mobile radio communication systems.

SUBSTANCE: proposed method and device are intended to control transmission power levels for plurality of various data streams transferred from at least one base station to mobile one in mobile radio communication system. First and second data streams are transmitted from base station and received by mobile station. Power-control instruction stream is generated in mobile station in compliance with first or second data stream received. Power control signal is shaped in mobile station from first power control instruction stream and transferred to base station. Received power control instruction stream is produced from power control signal received by base station; power transmission levels of first and second data streams coming from base station are controlled in compliance with power control instruction stream received. In this way control is effected of transmission power levels of first data stream transferred from each base station out of first active set to mobile station and of transmission power levels of second data stream which is transferred from each base station out of second active set to mobile station.

EFFECT: enlarged functional capabilities.

80 cl, 21 dwg

FIELD: radio engineering.

SUBSTANCE: proposed method and device designed for fast synchronization of signal in wade-band code-division multiple access (WCDMA) system involve use of accumulations of variable-length samples, testing of decoder estimates for reliability, and concurrent decoding of plurality of sync signals in PERCH channel. Receiver accumulates samples required for reliable estimation of time interval synchronization. As long as time interval synchronization estimates have not passed reliability tests, samples are accumulated for frame synchronization estimates. As long as frame synchronization estimates have not passed reliability tests, samples are analyzed to determine channel pilot signal shift.

EFFECT: reduced time for pulling into synchronism.

13 cl, 9 dwg

FIELD: satellite navigation systems and may be used at construction of imitators of signals of satellite navigational system GLONASS and pseudo-satellites.

SUBSTANCE: for this purpose two oscillators of a lettered frequency and of a fixed frequency are used. Mode includes successive fulfillment of the following operations - generation of a stabilized lettered frequency, its multiplication with an oscillator's fixed frequency and filtration of lateral multipliers with means of filters of L1 and L2 ranges and corresponding option of a fixed and a lettered frequencies.

EFFECT: reduces phase noise and ensures synthesizing of lettered frequencies of L1 and L2 ranges of satellite navigational system from one supporting generator at minimum number of analogous super high frequency units.

3 cl, 1 dwg

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