The pulse generator


H03K3/26 - PULSE TECHNIQUE (measuring pulse characteristics G01R; mechanical counters having an electrical input G06M; information storage devices in general G11; sample-and-hold arrangements in electric analogue stores G11C0027020000; construction of switches involving contact making and breaking for generation of pulses, e.g. by using a moving magnet, H01H; static conversion of electric power H02M; generation of oscillations by circuits employing active elements which operate in a non-switching manner H03B; modulating sinusoidal oscillations with pulses H03C, H04L; discriminator circuits involving pulse counting H03D; automatic control of generators H03L; starting, synchronisation, or stabilisation of generators where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
H03K3/027 - PULSE TECHNIQUE (measuring pulse characteristics G01R; mechanical counters having an electrical input G06M; information storage devices in general G11; sample-and-hold arrangements in electric analogue stores G11C0027020000; construction of switches involving contact making and breaking for generation of pulses, e.g. by using a moving magnet, H01H; static conversion of electric power H02M; generation of oscillations by circuits employing active elements which operate in a non-switching manner H03B; modulating sinusoidal oscillations with pulses H03C, H04L; discriminator circuits involving pulse counting H03D; automatic control of generators H03L; starting, synchronisation, or stabilisation of generators where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

 

The invention relates to a pulse technique. The technical result is to increase functionality by generating a sequence of pulses. The pulse generator (GI) contains the majority element (DOE) 1, item ILI-NOT (e) 2, a condenser 3, the first, second diodes (D) 4, 5, the first - fourth resistors (R) 6-9, the output and the input bus (W) 10, 11. Exit DOE 1 is connected with its first input with the first input of the e 2 W 10 and through To the 3 to the anode of D 4 and the cathode D 5. The anode of D-5 through R 6 is connected to the output e 2, the second input is connected to W 11. Cathode D 4 through R 7 is connected to the output e 2 and through R 9 - with a second entrance DOE 1, the third input of which is connected through R 8 to the anode D 5. 1 Il.

The invention relates to a pulse technique and can be used in computer equipment and control systems.

Known pulse generator (see the book Yakovlev, C. N., Resurrection centuries, Miroshnichenko, S. I. and other Reference microelectronic pulse technique. Kyiv: Kyiv, 1983, S. 216, Fig. 9.3 g), containing two elements ILI, two resistors, two condensers, two diodes and a voltage source. The output of the first element ILI IS NOT connected directly to the first input W the capacitor, the anode of the first diode and the first of its entrance. The output of the second element ILI IS NOT connected directly to the second input of the first element ILI and the second output of the second capacitor and via a second resistor to the second output of the first capacitor, the anode of the second diode and the first of its entrance. The cathodes of the diodes are combined and connected to the positive pole of the voltage source, the negative output of which is connected to a common bus. The outputs of the first and second elements ILI are NOT outputs of the pulse generator.

The disadvantages of the pulse generator are outliers voltage at the inputs of the elements ILI and overload output current switching due to overcharging of the capacitor.

Closest to the claimed invention, the essential features is the one-shot (see and.with. The USSR №1279056 from 06.01.82, MKI: N 03 To 5/01, 5/153, the protection Device of bounce, authors C. L. Worm, M. A. Guernica and A. C. Ryvkina, publ. 23.12.86, bull. No. 47), containing the majority element, an inverter and a delay element. The first input of the majority element is connected to the input bus. Second input of the majority element is connected with its output, the output bus and the input of the inverter. The output of the inverter cetsa the inability to construct a sequence of pulses due to the absence of the negative feedback circuit.

The problem solved by the invention is the creation of a pulse generator with enhanced functionality, namely the ability to generate a sequence of pulses.

The technical result is achieved in that in the pulse generator containing the input bus, a majority element, the output of which is connected to the output bus, it is new that added element ILI, the first, second, third and fourth resistors, the first and second diodes and a capacitor, a first output which is connected to the second anode and cathode of the first diode, respectively, the anode of the first diode is connected with the second output of the first resistor and the cathode of the second diode with the first output of the second resistor and a fourth resistor to the first input of the majority element, the second input is through the third resistor is connected with the second output of the first resistor, the first output of which is connected with the second output of the second resistor and the output element ILI, the first input connected to the third input and output of a majority element, with the second output capacitor, the second input element ILI IS NOT connected to the output bus.

The mentioned set of features pozvolyaet pulses by changing the duration of the control input.

The drawing shows a schematic diagram of the pulse generator.

The pulse generator contains a majority element 1, element ILI-NO 2, condenser 3, the first and second diodes 4 and 5, respectively, the first, second, third and fourth resistors 6, 7, 8, 9, respectively, the output and the input bus 10 and 11, respectively. The output of the majority element 1 is connected with its first input with the first input element ILI-NO 2, with output bus 10 and the first output capacitor 3. The second output capacitor 3 is connected to the anode of the diode 4 and the cathode of the diode 5, the anode of which is connected through a resistor 6 with the output element ILI IS NOT 2, the second input is connected to the input bus 11. The cathode of the diode 4 through the resistor 7 is connected with the output element ILI-NO 2 and through a resistor 9 to the second input of the majority element 1, the third input of which is connected through a resistor 8 to the anode of the diode 5.

The pulse generator operates as follows.

Consider the case when the supply voltage on the input bus 11 is a logic level “1”. The output element ILI-2 level is set to a logical “0” which is supplied to the second and third inputs of the majority element 1, the output of which sets the level of the log is ensator 3 is in a discharged state. The pulse generator is in a stable state and does not produce output pulses.

When applying to the input bus 11 trigger signal in the form of logical level “0” at the output of the element ILI-2 level is set to a logical “1” which is supplied to the second input of majority element 1 through the resistors 7 and 9. Starts the charge of the capacitor 3 from the output element ILI-2 through the resistor 6 and the diode 5, which leads to the establishment of the third input majority element 1 voltage level close to the level of logical “0”. As the charge of the capacitor 3, the voltage at the third input of the majority element 1 reaches the switching threshold that will result at the output of logic level “1” as the second of its input already has a logic level “1”. At the first sign of a majority element 1 also appears logical level “1”, and the output element ILI-2 level is set to a logical “0”, which through the resistors 6 and 8 is supplied to the third input of the majority element 1. The condenser 3, a negatively charged plate of which is connected to the output of the majority element 1 begins to recharge through resistor 7 as output Eloy “1”. The resistors 8 and 9 to protect the diode protection circuits input majority element 1 (Zeldin E. A. Digital integrated circuits in information-measuring equipment. - L.: Energoatomizdat, 1986, S. 65, Fig. 6-4). Upon reaching the voltage across the capacitor 3 level switching threshold majority element 1 at its output appears logical level “0”. The process of generating output pulses of the pulse generator will be repeated. The number of output pulses will be determined by the duration of the control pulse received on the input bus 11, since the emergence of the logical level “1” at the output of the element ILI-2 level is set to a logical “0” and the pulse generator stops producing output pulses.

Thus, the inventive pulse generator has a wider compared to the prototype functionality, and it provides the formation of a sequence of pulses.

The majority element 1 can be performed on the chip LP, the logical element ILI-NO 2 - on-a-chip LA. As the capacitor 3 can be used capacitor type To 10-17, as the diodes 4, 5 can be used diodes type D and cacheable performance of the proposed device and its practical value.

Claims

The pulse generator containing the input bus, a majority element, the output of which is connected to the output bus, wherein the added element ILI, the first, second, third and fourth resistors, the first and second diodes and a capacitor, a first output which is connected to the second anode and cathode of the first diode, respectively, the anode of the first diode is connected with the second output of the first resistor and the cathode of the second diode with the first output of the second resistor and through a fourth resistor to the first input of the majority element, the second input is through the third resistor is connected with the second output of the first resistor, the first output of which is connected with the second output of the second resistor and the output element ILI, the first input connected to the third input and output of a majority element, with the second output capacitor, the second input element ILI IS NOT connected to the output bus.

 

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