Device for separating transmission signals in full duplex communication systems

 

The invention relates to systems duplex transmission of signals via the communication channels. The technical result is to increase the noise immunity of the received messages. The technical result is achieved in that the device includes sequentially connected generator, the input unit, the switch, the first DAC, ADC, and a set of training signals and the second DAC, also connected in series introduced the first block of the Fast Fourier Transform (BPF), block the common-mode processing (SSR), the block of the inverse Fast Fourier Transform (BBPP), the output is connected to the input of the second DAC unit quadrature processing (GER), connected in series to the second BPF, first drive, a divider, a second input coupled to the output of the second BPF, the first transmitter, as well as one-shot, entrance connected with managing third input of the switch and the fourth inputs SSR and BRP, respectively, the output of one-shot combined with the second input of the first memory and the third input to the SSR and BRP, respectively, the output of the first transmitter connected respectively with the fifths inputs SSR and BRP, the first input of the ADS is connected to the output of the first BPF, the first and second output BRP connected respectively a and second BPF connected respectively with the output of the ADC and output switch. 2 C.p. f-crystals, 5 Il.

The invention relates to the field of telecommunications, primarily for full-duplex transmission of signals via the communication channels.

A device for separation of the signals of the two directions /1/, consisting of a transmitting device, myCitadel and the receiver. The principle of operation of such devices is based on the artificial production of echo signals in shaping the adaptive filter and further compensation of the echo signals, penetrating to the input of the receiver. The operation of the compensation of the echo signals is performed by subtracting from the total received signal and the echo signals are additionally formed copies of the echo signals.

A disadvantage of such devices is low immunity receive a large level of uncompensated echo, most critical to the correlation relations of transmission signals and reception. Even when the frequency correlation of the signals of the two directions, the device starts to compensate the received signal, making duplex exchange of signals is not possible.

This disadvantage is eliminated in the prototype /2/ containing connected in series (Fig. 1) input unit 1, the switch 2, the first choice is that the input connected with the output connected to the input of ACCP and second input 10 of the memory block, the output of which is connected with the second input of the adder 9, and connected in series generator 7 and the imaging unit 5 training signals, an output connected to a second input of the switch 2, the control input which is combined with the input reset 10 second memory block, and the output of the generator 7 is connected with the second inputs, respectively, of the input unit 1, ACHR, the first 6 and 10 second memory blocks, and the output switch connected to the third inputs of the first 6 and the second 10 blocks of memory.

The work of the prototype consists of two parts: pre-training and full-duplex communication. With prior training devices under parameters channel a set of training signals 5 outputs in digital form all the digital hand, the feedback from which is recorded in the first 6 memory block. For an adaptation period of 10 second memory block is set to zero. When teaching the received signal should be absent.

Upon completion of the preliminary adaptation begins duplex exchange of signals. Includes both the memory block. Used the structure of non-recursive and recursive parts of the compensator mirror-symmetric. In non-recursive part is compensated transmission signals and modules otip can only work on channels with constant parameters. When the parameters of the communication channel from one state to another in the second 10 memory block accumulates the signal neocomposite, which additionally is not compensated. This phenomenon can lead to disruption duplex exchange and will require new training. If the parameters of the communication channel change with great speed, in such circumstances, the work of the prototype becomes impossible. Thus the immunity of the received messages will be very low.

The aim of the present invention is to improve the noise immunity of the received message.

This objective is achieved in that in a device for the separation directions of transmission in full duplex communication systems, containing connected in series generator, an input unit, the switch, the first DAC, ADC, and a set of training signals and the second DAC, and the output of the generator is combined with the input set of training signals and the second input of the ADC, while the control input of the switch is its third input, a second input connected to the output of the set of training signals entered serially connected first block of the Fast Fourier Transform, block the common-mode processing unit inverse Fast Fourier Transform, in the Torah block Fast Fourier Transform, the first drive, a divider, a second input coupled to the output of the second block of the Fast Fourier Transform, the first transmitter, and the one-shot, entrance combined with the control input of the switch and the fourth inputs of the blocks in-phase and block quadrature processing, respectively, the output of one-shot combined with the second input of the first memory and the third input block phase and block quadrature processing, respectively, the output of the first transmitter connected respectively with the fifth input block phase and block quadrature processing the first input of the quadrature processing is connected to the output of the first block of the Fast Fourier Transform, the first and second output of the quadrature processing are connected respectively to the second input of the Inverse Fast Fourier Transform and the second input of the common-mode processing, the second output of which is connected with the second input of the quadrature processing, the input of the first and second blocks of the Fast Fourier Transform are connected respectively with the output of the ADC and output switch.

We prove the consistency of the proposed solutions to the criterion of “Significant differences”.

1. A distinctive characteristic of predlagaemaya Fourier, storage, divider, transmitter block of the Inverse Fourier Transform.

With this newly introduced units represent a single set of structural characteristics, as elements of the proposed structure are interrelated, connected in a single system, the action of one directly affects the other, the replacement of any unit on the other disrupts the whole unit. This new set of structural characteristics provides a positive effect (increasing the noise immunity of a received message), which corresponds to the entire device and not its individual elements.

In addition, the proposed design of the blocks in-phase and quadrature processing.

2. The applicant reviewed the technical documentation on the classification of MCI H 04 L 27/18 and UDC 621.393.3 for the entire device as a whole. The analysis of the above literature, which is described in the text and in the certificate of patent research, the applicant has not found technical solutions similar offer.

You can also prove the appearance of the object of the invention of new properties not inherent to its parts. Each of the entered block performs individually the same functions as in investigat in M signal, etc. However, the introduction of new units and links between them, as well as new electrical connection between the introduced nodes and nodes of the prototype, create a new interaction mechanism, which allows the separation of signals of two directions when changing the parameters of the communication channel and allows you to fine-tuning of the device.

The device contains a /Fig. 2/ 1 - input unit; 2 - switch; 3 - the first d / a Converter; 4 - analog-to-digital Converter; 5 - a set of training signals; 6 - the first block of the Fast Fourier Transform; 7 - generator; 8 - second unit Fast Fourier Transform; 9 - first drive; 10 - divider; 11 - second digital to analog Converter; 12 - block common-mode processing; 13 - block quadrature processing; 14 - Block Inverse Fourier transform; 15 - one-shot; 16 - the first computer.

Block the common-mode processing of Fig. 3/ contains a 17 - second drive with an 18 - second transmitter; 19 - first myCitadel; 20 - the first adder; 21 - the third drive; 22 - the third computer; 23 - the first attenuator.

Block quadrature processing /Fig. 4/ contains 24 - the fourth drive; 25 - the fourth evaluator; 26 - second myCitadel; 27 - the second adder; 28 - fifth drive; 29 - fifth computer; opiela (blocks 9, 17, 21, 24, 28) is known. This is, for example, m/schema 1002 and R-1. MyCitadel 26 and 19, the adders 20, 27 based on multibit m/schemes, for example, IM, IM, IM etc.

Analog-to-digital converters 4 - standard nodes. Similar to - analog converters constructively also presents the corresponding m/schemas.

Attenuators (blocks 23 and 30) is the voltage dividers. Their constructive implementation is known.

Constructive implementation of the remaining blocks is also known.

The device operates as follows.

Immediately after turning on the device is compulsorily reset all drives used. The control signal received at the third input of the switch 2 connects the output of the shaper 5 training signals to the input of the first 3 DAC, and the one-shot 15 produces a momentary control signal reset for the second 17 of the drive unit 12 in-phase processing and the fourth 24 of the drive unit 13 quadrature processing. After Abdullayeva signal output from the one-shot 15 17 second and fourth 24 drives ready to work. In addition, for the entire period of study forcibly reset 21 third and fifth 28 drives in blocks in phase 12 and kvadratuurvalemi adaptation to the connected communication channel.

Unit 5 learning generates signals in digital form all the binary combinations U_i(PT). Here the subscript denotes the i-th unit of study, a nT - discrete time.

The training signal U_i(PT) in block 8 of the Fast Fourier Transform (FFT) is converted into the frequency counts. The conversion is performed by blocks, for “N” times in each block. Thus N samples of the signal temporarily in the region U_i(nT) preobrazuja in block 8 FFT in N times the frequency of

In the expression (1) U(kw₁- amplitude of k-th spectral component;

i - the number of the processing unit;

_i(kw₁) - k-th reference phase component;

k=0, 1,..., (N-1) the current number of samples;

U_i(jkw₁- the set of frequency counts;

W₁- the circular frequency of the frequency samples. Units frequency sample U_i(jkw₁with the release of the second BPF then written to the first drive 9. Simultaneously with the recording of frequency samples U_i(jkw₁in the first drive 9 previous contents U_i-1(jkw₁) is output to the second input of the divider 10. The output of the divider 10, you receive the result of the division, equal

_i(kw₁) - phase component of the division.

_i(kw₁)e^ji(kw1)getting further input of the first transmitter 16, which converts the signal of expression (2) of the indicative form in the usual form by the formula Euler

where V_i(kw₁)=_i(kw₁)cos[_i(kw₁)] is the real part of the converted signal; and

jW_i(kw₁)=j_i(kw₁)sin[_i(kw₁)] is the imaginary part of the transformed signal.

With the advent of the new (i+1) of the processing unit with the first 8 FFT calculation process will be the same. In formulas (1), (2) and (3) will change only subscripts. The signals V_i(kw₁and W_i(kw₁) are the control block 12 in-phase and unit 13 quadrature processing. The control signals V_i(kw₁and W_i(kw₁) serves obnovlyali in block 13 of the quadrature processing. Note that the control signals V_i(kw₁and W_i(kw₁) is the signal transfer.

Consider how you are handling the amount of signal transmission and reception unit 12 in-phase and in block 13 of the quadrature processing. The transmitted signal U_i(PT) in the first 3 DAC is converted to an analog signal U(t) and moves towards station B (Fig. 2 is not shown).

Simultaneously, the signal U(t) is converted in accordance with the settings of the connected communication channel. The output of analog-to-digital Converter 4 (ACP) observed the sum of two signals: transmitted and received. The value of this sum is determined as the estimated ratio of:

where L(nT) is the output signal ACP;

U(nT) signal transmission;

G_echo(PT) is the impulse response of the echo path;

Y(nT) signal reception;

* indicates a convolution operation.

In the first 6 FFT conversion is performed N samples of the signal from the time domain into N times the frequency in the frequency domain. The resulting signal at the output of the first 6 FFT is equal to

where G_echo(jkw₁- the set of frequency samples of the echo path;

U_i(jkw₁- the set of frequency samples of the new frequency;

k=0, 1,..., (N-1) the current number;

C(kw₁) is the real part of the image L(jkw₁);

D(kw₁) is the imaginary part of the image L(jkw₁).

Blocks in phase 12 and 13 quadrature processing is built in such a way that the structure of each of them is mirror-symmetric. Thus, the structure containing the 17 second drive, the second the transmitter 18 and the first myCitadel 19 mirror-symmetric structure 21 third memory, the third 22 of the transmitter, the first 23 of the attenuator and the first adder 20 in block 12 in-phase processing. Note that the symmetry of these structures is only when the gear ratio of the first 23 attenuator is equal to one. Similarly, the structure containing the fourth 24 drive, fourth 25 the transmitter and the second 26 myCitadel mirror symmetric structure containing the second the adder 27, 28 fifth drive, fifth 29 the transmitter 30 and the second attenuator (with a coefficient of transmission of the last equal to one). When the selection of the transmission ratios of the first 23 and second 30 attenuators less than one mirror symmetry is broken, but the blocks 12 in-phase and quadrature 13 processing acquire new properties: continuous adjustment to the parameters of the communication channel. The block 12 sintia signals of the two directions is with the help of the control signals V_i(kw₁and W_i(kw₁), as well as block 12 in-phase and unit 13 quadrature processing transmission signals is converted into a DC component.

For a better understanding of the processes occurring in this device, first explain the procedure when no receive signal [Y(nT)=0 and Y(jkw₁=0], Let the i-th processing unit are the control signals, is equal to V_i(kw₁and W_i(kw₁).

From sequentially transferred (i-1) and the i-th block of the transmitted signal at the output of the first 6 FFT observed two images L_i-1(lkw₁and L_i(jkw₁). According to expression (5) image L_i-1(lkw₁and L_i(jkw₁) can be decomposed into real and imaginary parts

where C_i(kw₁)=U_i(kw₁)G_echo(kw₁)cos[_i(kw₁)+_echo(kw₁)] is the real part of the echo signal at the i-th processing unit;

D_i(kw₁)=U_i(kw₁)G_echo(kw₁)sin[_i(kw₁₁(kw₁); C₂(kw₁); ...; C_i-1(kw₁); C_i(kwi);.... In the fourth 24 drive unit 13 quadrature processing is stored imaginary part: D₁(kw₁); D₂(kw₁);... ; D_i-1(kw₁); D_i(kw₁);....

In the second 18 and third 22 solvers block 12 in-phase processing is calculated in accordance with the expression

In 24 fourth and fifth 29 solvers unit 13 quadrature processing is calculated in accordance with the expression

In the first 19 myCitadel block 12 in-phase processing are subtracting from the image C_i(kw₁) coming from the output of the first 6 FFT of the image, with the first 18 of the transmitter. The result of this calculation will be equal to

A similar result will be to (i-1) block processing. Thus, regardless of the connected communication channel compensation is a valid part of the echo signal in the reception path.

Consider the passage of transmitted signals in block 13 of the quadrature processing. The output of the second 26 vicites in block 13 of the quadrature processing. From the image D_i(kw₁) img_data/80/805725.gif">

The (i+1) the processing unit at the output of the second 26 vicites in block 13 of the quadrature processing will also be zero. Thus, regardless of the connection parameters of the communication channel is always compensation of the real and imaginary parts 2 of the transmission signals in the reception path.

It should be noted adaptability of this device. When changing the parameters of the communication channel will change the amplitude and phase components of the echo path, but through one processing unit after the write operation of new samples of the echo signals in the second 17 and fourth drive 24 drive device will automatically adjust to the new conditions of transfer.

In the presence of the receive signal at the output of the first 19 vicites in block 12 common-mode processing will be the difference, calculated in accordance with the expression

where Y_i(kw₁- the module of a frequency spectrum of the receive signal at the i-th processing unit;

_{so i}(kw₁) - phase component of the frequency spectrum of the receive signal at the i-th processing unit.

Similarly, the output of the second 26 vicites in block 13 of the quadrature processing in the presence of the receive signal observed rannala communication is the compensation of the transmission signals and the observed difference signal reception. The receive signal after such processing has been converted in accordance with the law of change of the transmission signals. To resolve this conversion are mirror-symmetric structure used in the block 12 common-mode processing unit 13 of the quadrature processing. After the passage of such structures is the full recovery of the received signals. So at the output of the first adder 20 to the i-block processing unit 12 common-mode signal processing will be equal to

Similarly, the output of the second adder 27 in block 13 of the quadrature processing the observed signal, is equal to

With the help of block 14 of the Inverse Fast Fourier Transform (OBPF) real part and imaginary part of the receive signal is converted in the samples Y(nT).

The second 11 DAC converts the samples Y(nT) in the analog signal Y(t) and gives the consumer the message (Fig. 2 is not shown).

In Fig. 5 shows the amplitude-frequency characteristics of the proposed device to receive signals when changing the transmission ratios of the first 23 and second attenuator 30. With slimming is available.

Appreciate the advantages of the proposed technical solutions to the prototype, taken as the base object. The amount of security to the prototype when changing the parameters of the communication channel determined by the following expression

where r is the bit depth of processing;

k(- the correlation coefficient changes of parameters of the communication channel;

P_cthe level of signal reception;

P_W.weeks- the amount of noise neocomposite echo signal. The value of the security at the proposed device is equal to

where is the transmission coefficient of the fifth 21 attenuator;

N is the number of trips to a given memory cell.

Taking the relationfinally, we obtain

When C<1 and N>100 this expression is always greater than unity.

When k()=0,9; C=0,9; N=100; r=10 gain is 12.4 times.

Thus, the quality of work of the device is superior to qualitative indicators of the prototype.

The device has passed the preliminary tests and it is proposed to introduce it on the radio network of the GSM standard to combat the phenomenon of electrical echo.

Literature

1. Adapt the separation directions of transmission in full duplex communication systems. / Malinkin Century B., Lebedyancev Century Century publ. In BI No. 1 07.01.85, prototype.

3. Tarabrin Century, Reference circuits.

Claims

1. Device for separating transmission signals in full duplex communication systems, containing connected in series generator, an input unit, the switch, the first DAC, ADC, and a set of training signals and the second DAC, and the output of the generator is combined with the input set of training signals and the second input of the ADC, while the control input of the switch is its third input, a second input connected to the output of the set of training signals, characterized in that the introduced sequentially connected first block of the Fast Fourier Transform, block the common-mode processing unit inverse Fast Fourier Transform, the output connected to the input of the second DAC, as well as block I / q processing, connected in series, the second block of the Fast Fourier Transform, the first drive, a divider, a second input coupled to the output of the second block of the Fast Fourier Transform, the first transmitter, and the one-shot, entrance connected with managing third input of the switch and the fourth inputs of the block phase and block quadrate input block phase and block quadrature processing, respectively, the output of the first transmitter connected respectively with the fifth input block phase and block quadrature processing the first input of the quadrature processing is connected to the output of the first block of the Fast Fourier Transform, first and second output of the quadrature processing are connected respectively to the second input of the Inverse Fast Fourier Transform to the second input of the common-mode processing, the second output of which is connected with the second input of the quadrature processing, the input of the first and second blocks of the Fast Fourier Transform are connected respectively with the output of the ADC and output switch.

2. The device under item 1, characterized in that the block common-mode processing includes sequentially connected to the second drive, the second transmitter, the first myCitadel, a second input combined with the first input of the second memory, the first adder whose output is the first output block common-mode processing, the third memory, the third computer, the first attenuator, the output connected to a second input of the first adder, while the second inputs of the second and third calculators and United are fifth input common-mode processing, the second output of which is o the respectively first input of the second memory, the third input of the second transmitter, the second input of the second memory and a second input of the third memory.

3. The device under item 1, characterized in that the block quadrature processing includes sequentially connected to the fourth drive, a fourth input, a second myCitadel, a second input combined with the first input of the fourth drive, a second adder whose output is the first output of the quadrature processing, the fifth drive, fifth transmitter, a second attenuator, the output connected to a second input of the second adder, while the second inputs of the fourth and fifth solvers are combined and the fifth input of the quadrature processing, the second output which is the output of the fourth memory, and the first, second, the third and fourth inputs of the block quadrature processing are respectively first input of the fourth drive, a second input of the fourth transmitter, a second input of the fourth memory and a second input of the fifth drive.