Device for separating transmission signals in full duplex communication systems
The invention relates to systems duplex transmission of signals via the communication channels. The technical result is to increase the noise immunity of the received messages. The technical result is achieved in that the device includes sequentially connected generator, the input unit, the switch, the first DAC, ADC, and a set of training signals and the second DAC, also connected in series introduced the first block of the Fast Fourier Transform (BPF), block the common-mode processing (SSR), the block of the inverse Fast Fourier Transform (BBPP), the output is connected to the input of the second DAC unit quadrature processing (GER), connected in series to the second BPF, first drive, a divider, a second input coupled to the output of the second BPF, the first transmitter, as well as one-shot, entrance connected with managing third input of the switch and the fourth inputs SSR and BRP, respectively, the output of one-shot combined with the second input of the first memory and the third input to the SSR and BRP, respectively, the output of the first transmitter connected respectively with the fifths inputs SSR and BRP, the first input of the ADS is connected to the output of the first BPF, the first and second output BRP connected respectively a and second BPF connected respectively with the output of the ADC and output switch. 2 C.p. f-crystals, 5 Il.The invention relates to the field of telecommunications, primarily for full-duplex transmission of signals via the communication channels.A device for separation of the signals of the two directions /1/, consisting of a transmitting device, myCitadel and the receiver. The principle of operation of such devices is based on the artificial production of echo signals in shaping the adaptive filter and further compensation of the echo signals, penetrating to the input of the receiver. The operation of the compensation of the echo signals is performed by subtracting from the total received signal and the echo signals are additionally formed copies of the echo signals.A disadvantage of such devices is low immunity receive a large level of uncompensated echo, most critical to the correlation relations of transmission signals and reception. Even when the frequency correlation of the signals of the two directions, the device starts to compensate the received signal, making duplex exchange of signals is not possible.This disadvantage is eliminated in the prototype /2/ containing connected in series (Fig. 1) input unit 1, the switch 2, the first choice is that the input connected with the output connected to the input of ACCP and second input 10 of the memory block, the output of which is connected with the second input of the adder 9, and connected in series generator 7 and the imaging unit 5 training signals, an output connected to a second input of the switch 2, the control input which is combined with the input reset 10 second memory block, and the output of the generator 7 is connected with the second inputs, respectively, of the input unit 1, ACHR, the first 6 and 10 second memory blocks, and the output switch connected to the third inputs of the first 6 and the second 10 blocks of memory.The work of the prototype consists of two parts: pre-training and full-duplex communication. With prior training devices under parameters channel a set of training signals 5 outputs in digital form all the digital hand, the feedback from which is recorded in the first 6 memory block. For an adaptation period of 10 second memory block is set to zero. When teaching the received signal should be absent.Upon completion of the preliminary adaptation begins duplex exchange of signals. Includes both the memory block. Used the structure of non-recursive and recursive parts of the compensator mirror-symmetric. In non-recursive part is compensated transmission signals and modules otip can only work on channels with constant parameters. When the parameters of the communication channel from one state to another in the second 10 memory block accumulates the signal neocomposite, which additionally is not compensated. This phenomenon can lead to disruption duplex exchange and will require new training. If the parameters of the communication channel change with great speed, in such circumstances, the work of the prototype becomes impossible. Thus the immunity of the received messages will be very low.The aim of the present invention is to improve the noise immunity of the received message.This objective is achieved in that in a device for the separation directions of transmission in full duplex communication systems, containing connected in series generator, an input unit, the switch, the first DAC, ADC, and a set of training signals and the second DAC, and the output of the generator is combined with the input set of training signals and the second input of the ADC, while the control input of the switch is its third input, a second input connected to the output of the set of training signals entered serially connected first block of the Fast Fourier Transform, block the common-mode processing unit inverse Fast Fourier Transform, in the Torah block Fast Fourier Transform, the first drive, a divider, a second input coupled to the output of the second block of the Fast Fourier Transform, the first transmitter, and the one-shot, entrance combined with the control input of the switch and the fourth inputs of the blocks in-phase and block quadrature processing, respectively, the output of one-shot combined with the second input of the first memory and the third input block phase and block quadrature processing, respectively, the output of the first transmitter connected respectively with the fifth input block phase and block quadrature processing the first input of the quadrature processing is connected to the output of the first block of the Fast Fourier Transform, the first and second output of the quadrature processing are connected respectively to the second input of the Inverse Fast Fourier Transform and the second input of the common-mode processing, the second output of which is connected with the second input of the quadrature processing, the input of the first and second blocks of the Fast Fourier Transform are connected respectively with the output of the ADC and output switch.We prove the consistency of the proposed solutions to the criterion of “Significant differences”.1. A distinctive characteristic of predlagaemaya Fourier, storage, divider, transmitter block of the Inverse Fourier Transform.With this newly introduced units represent a single set of structural characteristics, as elements of the proposed structure are interrelated, connected in a single system, the action of one directly affects the other, the replacement of any unit on the other disrupts the whole unit. This new set of structural characteristics provides a positive effect (increasing the noise immunity of a received message), which corresponds to the entire device and not its individual elements.In addition, the proposed design of the blocks in-phase and quadrature processing.2. The applicant reviewed the technical documentation on the classification of MCI H 04 L 27/18 and UDC 621.393.3 for the entire device as a whole. The analysis of the above literature, which is described in the text and in the certificate of patent research, the applicant has not found technical solutions similar offer.You can also prove the appearance of the object of the invention of new properties not inherent to its parts. Each of the entered block performs individually the same functions as in investigat in M signal, etc. However, the introduction of new units and links between them, as well as new electrical connection between the introduced nodes and nodes of the prototype, create a new interaction mechanism, which allows the separation of signals of two directions when changing the parameters of the communication channel and allows you to fine-tuning of the device.The device contains a /Fig. 2/ 1 - input unit; 2 - switch; 3 - the first d / a Converter; 4 - analog-to-digital Converter; 5 - a set of training signals; 6 - the first block of the Fast Fourier Transform; 7 - generator; 8 - second unit Fast Fourier Transform; 9 - first drive; 10 - divider; 11 - second digital to analog Converter; 12 - block common-mode processing; 13 - block quadrature processing; 14 - Block Inverse Fourier transform; 15 - one-shot; 16 - the first computer.Block the common-mode processing of Fig. 3/ contains a 17 - second drive with an 18 - second transmitter; 19 - first myCitadel; 20 - the first adder; 21 - the third drive; 22 - the third computer; 23 - the first attenuator.Block quadrature processing /Fig. 4/ contains 24 - the fourth drive; 25 - the fourth evaluator; 26 - second myCitadel; 27 - the second adder; 28 - fifth drive; 29 - fifth computer; opiela (blocks 9, 17, 21, 24, 28) is known. This is, for example, m/schema 1002 and R-1. MyCitadel 26 and 19, the adders 20, 27 based on multibit m/schemes, for example, IM, IM, IM etc.Analog-to-digital converters 4 - standard nodes. Similar to - analog converters constructively also presents the corresponding m/schemas.Attenuators (blocks 23 and 30) is the voltage dividers. Their constructive implementation is known.Constructive implementation of the remaining blocks is also known.The device operates as follows.Immediately after turning on the device is compulsorily reset all drives used. The control signal received at the third input of the switch 2 connects the output of the shaper 5 training signals to the input of the first 3 DAC, and the one-shot 15 produces a momentary control signal reset for the second 17 of the drive unit 12 in-phase processing and the fourth 24 of the drive unit 13 quadrature processing. After Abdullayeva signal output from the one-shot 15 17 second and fourth 24 drives ready to work. In addition, for the entire period of study forcibly reset 21 third and fifth 28 drives in blocks in phase 12 and kvadratuurvalemi adaptation to the connected communication channel.Unit 5 learning generates signals in digital form all the binary combinations Ui(PT). Here the subscript denotes the i-th unit of study, a nT - discrete time.The training signal Ui(PT) in block 8 of the Fast Fourier Transform (FFT) is converted into the frequency counts. The conversion is performed by blocks, for “N” times in each block. Thus N samples of the signal temporarily in the region Ui(nT) preobrazuja in block 8 FFT in N times the frequency of







































Claims
1. Device for separating transmission signals in full duplex communication systems, containing connected in series generator, an input unit, the switch, the first DAC, ADC, and a set of training signals and the second DAC, and the output of the generator is combined with the input set of training signals and the second input of the ADC, while the control input of the switch is its third input, a second input connected to the output of the set of training signals, characterized in that the introduced sequentially connected first block of the Fast Fourier Transform, block the common-mode processing unit inverse Fast Fourier Transform, the output connected to the input of the second DAC, as well as block I / q processing, connected in series, the second block of the Fast Fourier Transform, the first drive, a divider, a second input coupled to the output of the second block of the Fast Fourier Transform, the first transmitter, and the one-shot, entrance connected with managing third input of the switch and the fourth inputs of the block phase and block quadrate input block phase and block quadrature processing, respectively, the output of the first transmitter connected respectively with the fifth input block phase and block quadrature processing the first input of the quadrature processing is connected to the output of the first block of the Fast Fourier Transform, first and second output of the quadrature processing are connected respectively to the second input of the Inverse Fast Fourier Transform to the second input of the common-mode processing, the second output of which is connected with the second input of the quadrature processing, the input of the first and second blocks of the Fast Fourier Transform are connected respectively with the output of the ADC and output switch.2. The device under item 1, characterized in that the block common-mode processing includes sequentially connected to the second drive, the second transmitter, the first myCitadel, a second input combined with the first input of the second memory, the first adder whose output is the first output block common-mode processing, the third memory, the third computer, the first attenuator, the output connected to a second input of the first adder, while the second inputs of the second and third calculators and United are fifth input common-mode processing, the second output of which is o the respectively first input of the second memory, the third input of the second transmitter, the second input of the second memory and a second input of the third memory.3. The device under item 1, characterized in that the block quadrature processing includes sequentially connected to the fourth drive, a fourth input, a second myCitadel, a second input combined with the first input of the fourth drive, a second adder whose output is the first output of the quadrature processing, the fifth drive, fifth transmitter, a second attenuator, the output connected to a second input of the second adder, while the second inputs of the fourth and fifth solvers are combined and the fifth input of the quadrature processing, the second output which is the output of the fourth memory, and the first, second, the third and fourth inputs of the block quadrature processing are respectively first input of the fourth drive, a second input of the fourth transmitter, a second input of the fourth memory and a second input of the fifth drive.
FIELD: radio engineering; construction of radio communication, radio navigation, and control systems using broadband signals.
SUBSTANCE: proposed device depends for its operation on comparison of read-out signal with two thresholds, probability of exceeding these thresholds being enhanced during search interval with the result that search is continued. This broadband signal search device has linear part 1, matched filter 2, clock generator 19, channel selection control unit 13, inverter 12, fourth adder 15, two detectors 8, 17, two threshold comparison units 9, 18, NOT gates 16, as well as AND gate 14. Matched filter has pre-filter 3, delay line 4, n attenuators, n phase shifters, and three adders 7, 10, 11.
EFFECT: enhanced noise immunity under structural noise impact.
1 cl, 3 dwg