Driver multi-frequency signals relative phase telegraphy

 

The present invention relates to the field of radio communications and can be used for the transmission of multi-frequency signals relative phase telegraphy. Technical result achieved - providing the possibility of forming a multi-frequency signal relative phase telegraphy under arbitrary combinations of its components. The device generating signals relative phase telegraphy contains accumulating adder phases (4), a persistent storage device (ROM) harmonic oscillations (6), digital-to-analogue Converter (10), a lowpass filter (11), timer (1), ROM amplitude (2), ROM Central frequencies (3), the full adder phases (5), the switch (7), accumulating adder components (8), multiplier (9), counter (12), ROM initial phases (13), the decoder (14), the multiplexer (15). 5 Il.

The present invention relates to the field of radio communications and can be used for transmission of multi-frequency signals relative phase telegraphy.

It is known device for the formation of Telegraph signals, a shift register, a decoder for the current phase, is executed on the ROM of the current phase and the adder, the RAM of the current phase with the generator, desireto the s and a frequency synthesizer (prototype - patent RU 2176436, MKI H 04 L 27/18, publ. 27.11.2001,).

The closest in technical essence is a device for generating signals phase-shift keyed signals containing the source signals of the carrier frequency, the phase manipulator, the amplitude modulator, a source of clock pulses, controlled frequency divider, the shaping unit code manipulating signal, a memory unit, a source of information signals, the driver manipulates signals (prototype - inventor's certificate SU # 1548862, MKI H 04 L 27/20, publ. 07.03.90 year). However, the known device cannot be used for the formation of multi-frequency signals.

The task to be solved by the invention, is to implement the formation of the multi-frequency signal relative phase telegraphy under arbitrary combinations of its components.

The solution is achieved by the fact that in the known device a signal relative phase telegraphy containing successively United accumulating adder phases, a persistent storage device (ROM) harmonic oscillations, digital to analog Converter (DAC) and a low pass filter (LPF), the output of which is the first (main) visionem) input device, and ROM amplitude, put the ROM of the Central frequency, the output of which is connected to the first input of accumulating adder phases, introduced the full adder phases, the first input connected to the output of the accumulating adder phases, and the output connected to the input of ROM harmonic oscillations entered serially connected switch, the first input connected to the output of the ROM harmonic oscillations and to the second input of which is fed a digital signal value “0”, accumulating adder components and the multiplier, a second input connected to the output of the ROM amplitude, and the output connected to the input of the DAC and is the second (additional) output device, and there is a new counter and ROM the initial phases, the output of which is connected with the second input of the adder full phase, connected in series introduced on N-bit bus decoder and multiplexer, the output of which is connected with the third (Manager) the input switch and the first output of the counter, the first input of the ROM initial phases, the entrance ROM the Central frequency, the second input of the accumulating adder phases and (N+1)-th (managing) the multiplexer input is interconnected with the second output of the counter, the second (clock) input of the timer and the second input (input initialisatie) inputs accumulating adder phase and accumulating adder components are combined to form the second (clock) input of the device, moreover, the second output of the timer is connected to a second input (reset input) counter, and the fourth (control) input is accumulating adder components, the second input of the ROM initial phases and the input of the decoder are combined to form the third (control) input device, and N is the number of components of the multifrequency signal.

Comparative analysis with the prototype shows that the introduction of significant distinguishing features are the novelty and allows, as will be shown below, to solve the problem.

In Fig.1 shows a structural diagram of the device.

The device has connected in series timer 1, the first input of which is the first (information) input device, and ROM amplitude 2, connected in series ROM Central frequencies of 3, accumulating adder phase 4, the adder full phase 5, the ROM harmonic oscillations 6, switch 7, to the second input of which receives the digital signal value “0”, accumulating adder components 8, the multiplier 9, the second input is connected to the output of the ROM amplitude 2, DAC 10, the low-pass filter 11, the output of which is the first (main) output device, and includes a counter 12, ROM the initial phases 13, the output of which connection is multiplexor 15, the output of which is connected with the third (Manager) the input of the switch 7, the output of the multiplier 9 is the second (optional) output, the first output of the counter 12, the first input of the ROM initial phases 13, entrance ROM Central frequencies of 3, the second input of the accumulating adder phases 4 and (N+1)-th (control) input of multiplexer 15 is interconnected, while the second output of the counter 12, the second (clock) input of timer 1 and the second input (input initialization) accumulating adder components 8 interconnected, the first input of the counter 12 and the third (clock) inputs accumulating adder phases 4 and accumulating adder components 8 are combined to form the second (clock) input unit and the second input (reset input) of the counter 12 is connected to a second output of timer 1, while the fourth (control) input is accumulating adder components 8, the second input of the ROM initial phases 13 and the input of the decoder 14 are combined to form the third (control) input device, a N is the number of components of the multifrequency signal.

For definiteness, let's agree that manipulation changing the phase of the signal relative phase telegraphy occurs at the beginning of the next Telegraph parcel urotherapy signal must first invert.

Denote the number of components of the multi-frequency signal as N. All components, each of which represents a single-frequency signal relative phase telegraphy, manipulated the same Telegraph signal, which may be in one of the States, “parcel” or “pause”. For each i-th component of the multi-frequency signal, where i[0, N-1], at the beginning of the next Telegraph parcel level “pause” changes the current phase by the value of. The General expression for the current phase of the i-th component of the multi-frequency signal has the form

where FCthe Central frequency of the i-th component of the multi-frequency signal; and

F* - the initial phase of the i-th component of the multi-frequency signal; and

F is the phase change for each component of the multi-frequency signal (F =at the beginning of the next Telegraph parcel level “pause”F = 0 at any other point in time).

The initial phase of f* for each i-th component is installed to reduce the crest factor of the entire multi-band signal.

Kotora i-I component must be excluded from the composition of the multi-frequency signal, its amplitude Aihas the value 0, otherwise, the amplitude aiequal to 1. When changing the combination of the components changes the composition of the spectrum of the resulting signal. Therefore, to minimize the crest factor for each combination of the amplitudes Aithe components of the multifrequency signal must meet certain combination of initial phases f* .

Denote the number of possible combinations that can be used when forming the multi-frequency signal as the Nk. Hence, for each i-th component of the multi-frequency signal included in the k-th combination of components, where i[0, N-1] and k[0, Nk-1] must be defined amplitude Andikand the value of the initial phase of the fit. With this in mind, for multi-band signal sk(t) we can write the following expression:

Subject to law changesF. the expression (2) can be rewritten in the following form:

where aM- the total amplitude for all components of the multi-frequency signal, the sign of which is reversed at the beginning of the next Telegraph parcel level “pbsa amplitude AMdoes not change abruptly at the beginning of the next Telegraph parcel level “pause”, and, since then, changed gradually over some interval. In the process of changing the value of AMtakes a few intermediate values. Upon completion intervalthe sign of the overall amplitude AMbecomes opposite to the sign, which she had before the current “pause”, and the absolute value is set to 1. Durationselected shorter than the duration T of elementary Telegraph parcel. The specific value ofintermediate values AMand their number are chosen in such a way that meets the requirements to the level of out-of-band radiation for the components of the multifrequency signal. The number of all allowed values of the total amplitude AMincluding 1 and -1, we denote by NM.

For example, if the law changes AMselected linear and the value of NM= 5, the process of manipulation can be present in the form of diagrams shown in Fig.2. Before considering the operation of the device as a whole, will do some explanation of otnositel first input with a frequency Ft, and has a conversion factor of N, where N is the number of components of the multifrequency signal. The second input (reset input) of the counter 12 is used to set to 0. The first output of the counter 12 is generated i component of the multi-frequency signal, in the absence of a reset signal on the second input cyclically varying from 0 to N-1. On the second output pulse is formed when the counter 12 is set to 0 by the signal on the second input, or when the counter 12 changes state from N-1 to 0. The pulse frequency (sampling rate) on the second output of the counter 12

At the first input of timer 1 goes Telegraph signal and the second input is used as a clock. At the beginning of the next “pause” timer 1 generates a pulse at the second output and runs in the intervalconsistently with frequency Fdsetting the first output digital code, the value of which lies in the interval [0, NM-1]. This digital code is a number j of allowed values for values of AMwhere j[0, NM-1]. At the end of the intervaland until the next “pause” number j takes the constant value 0 or Nwith frequency Fdtakes successive values 1,.... NM-2 and after the intervalset in NM-1, maintaining this value until the next “pause”. Similarly, the advent of the new “pause” causes a change in the numbers j in the sequence of NM-1,..., 1 and after the intervalsetting to 0. Fig.3 illustrates the described conditions and NM= 5 output status timer 1.

ROM amplitude 2 has a volume of NMcells and contains all the allowed values of AM. In accordance with an input address from ROM amplitude 2 is extracted content addressable cells.

In ROM harmonic oscillations 6 are uniformly distributed on the interval from 0 to 2timing functions of the form cos x or sin x. We denote this number of samples as Ng. In accordance with the address of the first entrance ROM harmonic oscillations 5 at its output appears in the content addressable cells, representing the values of the harmonic function, analogous to the phase which is the input address. If the ROM of Carmela uses a function of the form sin x, expression ( 3) should be adjusted:

ROM the Central frequency 3 has a volume of N cells and contains the values of MCfor all components of the multi-part signal:

In accordance with an input address, which is the i-th component, the ROM is the Central frequency 3 retrieves the value of MC.

Accumulating adder phase 4 produces a continuous accumulation of values received on its first input. The accumulation is performed individually for each of the i-th component of the multi-frequency signal in accordance with the number i received at a second input of the accumulating adder phase 4, and with a frequency FTthe pulses received on the third (clock) input. In addition, the summation in the process of accumulation is performed modulo Ng.

Thus, with zero initial conditions at any time t for the i-th component of the multi-frequency signal is output accumulating adder phase 4 is the sum modulo Ngall values that are received at the first input from the initial moment to moment t. Initial time here and will continue to consider the inclusion C 4 can be implemented as a set of random access memory (RAM) of the current phases 16, adder current phases 17 and register the current phase 18 as shown in Fig.4.

RAM current phase 16 has a volume of N cells. In the initial moment of time the contents of the RAM cells of the current phase 17 is set to zero. In each i-th cell contains the current sum modulo Ngvalues that are received at the first input of accumulating adder phase 4. RAM current phase 16 has the first (information) input, the second (address) input and output. In accordance with the number i received at a second input of the accumulating adder phase 4, the address input of RAM current phase 16 selects the i-th cell. The first (information) input of RAM current phase 16 is used to record selected by the second input cell. The output of RAM current phase 16 is used to retrieve the contents of the selected cells.

The current adder phases 17 carries out the addition modulo Ngvalues received from the first entrance is accumulating adder phase 4, and the values extracted from the i-th cell of RAM current phase 16.

Register current phase 18 has the first (information) input and the second (clock) input. Register current phase 18 it is the pulses coming from the third (clock) input is accumulating adder phases 4 and having a frequency FTrepetition and heighten phase 18 is the output of the accumulating adder phase 4.

In each clock cycle the contents of the selected RAM cell current phase 16 is folded modulo Ngwith the value received at the first input of accumulating adder phase 4, and the result of the addition is written to the register current phase 18, the output of which is then placed in the same cell RAM current phase 16.

The full adder phase 5 carries out the addition modulo Ngvalues received at its first and second inputs.

The switch 7 has a first input, a second input, which is constantly set to “0”, and the third input, which is used to control. If the third input is set to logic 1, the output of the switch 7 receives is from his first entrance, and if set to logical 0, then enters the value “0” from the second input.

Accumulating adder components 8 produces accumulation during one period of the frequency Fdvalues received at its first input with a frequency FTand rationing their sum. The second input (input initialization) accumulating adder components 8 is used to set its output the next value of the sum of the elapsed period of accumulation and subsequent initialization of the internal content nakaplivaya every entrance accumulating adder components 8 is used to select the value of the normalizing factor. The value of the normalizing factor is defined as 1/Nawhere Na- the number of components of the multi-frequency signal, the amplitude Andikwhich is different from zero. In the General case, each number k combinations of components corresponds to a value of Na[1, N].

Accumulating adder components 8 can be implemented as a set of current adder counts 19, register's current counts 20, case full of samples 21, normalizing multiplier 22 and ROM normalizing coefficients 23, as shown in Fig.5.

The current adder counts 19 carries out the addition of the values received from the first entrance is accumulating adder components 8, and the value set in the output register of the current 20 times.

The current register counts 20 has the first (information) input, a second input (reset input) and third (clock) input. Register current times, 20 it is the pulses coming from the third (clock) input is accumulating adder components 8 and having a frequency FTsequence, and writes the values coming from the output of the adder current times 19. The reset signal received from the second entrance is accumulating with the tov 21 has the first (information) input and the second (clock) input. A case full of samples 21 it is the pulses coming from the second entrance is accumulating adder components 8 and has a frequency ofdsequence, and writes the values coming from the output of register current 20 times.

ROM normalizing coefficients 23 contains Nkvalues that represent the normalizing coefficients for each k-th combination of the components of the multi-frequency signal, where k[0, Nk-1]. In accordance with the number of k-combinations of the components of the multi-frequency signal is set at the fourth input is accumulating adder components 8, from ROM normalizing coefficients 23 retrieves a specific value of the normalizing factor.

Normalizing multiplier 22 carries out the multiplication of the values received on its first input, and the values of the normalizing factor that is installed on the second input. The output of the normalizing multiplier 22 is the output of the accumulating adder components 8.

In each clock cycle having a duration frequency Ftthe current adder 19 counts up the value received from the first input is accumulating adder components 8, and is output Regis is bound with the second input of the accumulating adder components 8 with a frequency Fdfollowing, occurs the entry in the register is full of samples 21 and reset to 0 the contents of register current times 20. Normalizing multiplier 22 calculates the product of the output register is full of samples 21 and the output of the ROM normalizing coefficients 23.

Thus, the output of the accumulating adder components 8 at any time t is a normalized sum of values received at the first input during the elapsed period of the frequency Fd.

The multiplier 9 carries out the multiplication of the values received at its first and second inputs.

DAC 10 converts the input digital value in its analog form.

Low-pass filter 11 performs the suppression of high-frequency products sampling in the spectrum of the input signal.

ROM the initial phases 13 has a size of N x Nkcells, and as the first index when the cell is selected, use the value received at the first input of the ROM initial phases 13, and as the second index value that is supplied to the second input. In each ik-th cell of the ROM initial phases 13, where i[0, N-1] and k[0, Nk-1] contains the value Toikrepresenting the digital analogue of the initial phase of the i-th component of the multi-frequency and 13 is used to set the number of the i component of the multi-frequency signal, and a second input for setting the number k of combinations of constituents. At the output of ROM initial phase 13 is set to the contents of the ik-th cell.

The decoder 14 converts the input value into an N-bit number. The state at the input of the decoder 14 is the number of k-combinations of the components of the multifrequency signal. The state of the i-th bit output is identical to the value of amplitude aikwhen used k-th combination of the components of the multifrequency signal. The state of the logical 0 of the discharge indicates that the amplitude of the corresponding component is equal to 0, and the state of the logical 1 - to the fact that the amplitude component equal to 1.

The multiplexer 15 has N Boolean inputs and (N+1)-th (control) input. The output of multiplexer 15 is set in the status of the logical log, whose number is the value at the control input of multiplexer 15.

Consider the operation of the device.

Telegraph signal from the first input device is fed to the first input of timer 1 timed pulses with a frequency Fd. Depending on the sign of the Telegraph parcel timer 1 generates a first output corresponding to the number of allowed values of the total amplitude aM.

In the beginning Telegraph parcel is and the first output of the timer 1, the number of allowed values of the total amplitude AMprogressively change with frequency Fdso at the end of the intervalto take another extreme value.

The number from the first output of timer 1 is fed to the input of ROM amplitude 2. In accordance with an input address from ROM amplitude 2 retrieves the current value of the total amplitude aMcomponents.

Clocked coming from the second input device pulses with a frequency Ftthe counter 12 to the first output generates number component of the multi-frequency signal and the second output pulses with a frequency Fdsequence.

In accordance with the i-th component of the multi-frequency signal from ROM the Central frequency 3 retrieves the digital analogue of MCthe center frequency for the i-th component.

The value output from the ROM of the Central frequency 3 is supplied to the first input of the accumulating adder phase 4, to a second input which sets the i-th component of the multi-frequency signal. Clocked pulses with a frequency ofdaccumulating adder phase 4 performs the accumulation of the values of MCarriving at his first entrance, individually for each of the i-th component of the multi-frequency signal. Thus, the output nakaplivaya what am i component of the multi-frequency signal at the first input of the ROM initial phases 13 and state k at the control input of the device and the ROM initial phases 13 retrieves the digital analogue of the initial phase for the i-th component.

The full adder phases 5 through the output values of the accumulating adder phases 4 and ROM initial phases 13 forms for the i-th component of the multi-frequency address signal, which is used to extract the ROM harmonic oscillations 6 content of the corresponding cell.

In accordance with the state k to the control input of the decoder 14 generates N-bit code that determines the values of the amplitudes of the k-th combination of the components of the multifrequency signal. Depending on the number of the i component of the multiplexer 15 sets on the exit level of the i-th digit code received by the first N inputs. Thus, at the output of the multiplexer 15 is set to a logic level 0 if this element is missing in the resulting multi-frequency signal, or a logic level 1 if the component is part of the multifrequency signal.

The output of the ROM harmonic oscillations 6 is supplied to the first input of the switch 7. The second input of the switch 7 is constantly set to “0”.

Controlled by a logic signal from the output of the multiplexer 15, the switch 7 turns on the first input is accumulating adder components 8 value output from the ROM harmonic oscillations 6, if costall is GNA be missing. As a result, the first input is accumulating adder components 8 are samples only those components of the multi-frequency signal, the amplitude of which is different from 0.

Accumulating adder components 8 adds the input samples in each period of the frequency Fdthat normalizes the sum and generates at the output of the reference frequency signal. The result of the addition is fed to the input of the multiplier 9, the second input of which receives the current value of the total amplitude aM.

The product output of the multiplier 9 is fed to the input of the DAC 10 and the second (additional) output device, which can be used for subsequent digital signal processing.

DAC 10 converts the input digital signal in analog form. With the DAC output 10 signal received at the input of low-pass filter 11, which allocates a useful part of the spectrum of the signal and in this form submits it to the first (main) output device.

Thus, the proposed device allows you to create multi-frequency signal relative phase telegraphy, the number and combination of components which in the process can change. In addition, the proposed device can be implemented in software, the programming signals relative phase telegraphy, contains one United accumulating adder phases, a persistent storage device (ROM) harmonic oscillations, digital-to-analog Converter (DAC) and a low pass filter (LPF) whose output is the first major output of the device, characterized in that the input connected in series timer, the first input of which is the first information input device, and ROM amplitude, put the ROM of the Central frequency, the output of which is connected to the first input of accumulating adder phases, introduced the full adder phases, the first input connected to the output of the accumulating adder phases, and the output connected to the input of ROM harmonic oscillations, entered serially connected switch, the first input connected to the output of the ROM harmonic oscillations and to the second input of which is fed a digital signal value “0”, accumulating adder components and the multiplier, a second input connected to the output of the ROM amplitude, and the output connected to the input of the DAC and is the second optional output devices, and entered the counter and ROM the initial phases, the output of which is connected with the second input of the full adder phases introduced sequentially combined atora, the first output of the counter, the first input of the ROM initial phases, the entrance ROM the Central frequency, the second input of the accumulating adder phases and (N+1)-th control input of multiplexer interconnected with the second output of the counter, the second clock input of the timer and the second input of the initialization is accumulating adder components connected together, and the first counter input and the third clock inputs of accumulating adder phase and accumulating adder components are combined to form the second clock input of the device, and the second output of the timer is connected to the second reset input of the counter, and the fourth control input is accumulating adder components, second input of the ROM initial phases and the input of the decoder are combined to form a third control input device, and N is the number of components of the multifrequency signal.

 

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FIELD: radio engineering.

SUBSTANCE: in accordance to method, transmission and/or receipt of information are performed by means of waves, in accordance to which superposition of information signal over carrying wave is performed, frequency of which wave changes continuously and smoothly on given time interval for generation of at least one scanning of bearing, while signal being transmitted after receipt is filtered in frequency area for separation of multi-beam components or cleared from interference and then estimated relatively to signaling parameter, carrying information.

EFFECT: increased data transmission quality, increased resistance to interference.

4 cl, 41 dwg

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