The device of combat simulation interference in the receiver on a consistent filter

 

The device relates to the field of radio communications and can be used in radio communication systems with noise-like signals. Technical result achieved - increased protection from interference simulation, leading to disruption of synchronization and resynchronization. The result is achieved by introducing into the receiver prototype on a consistent filter containing block for automatic adjustment of the amplifier (8), the processing unit clock (9), the amplifier high frequency (1), mixer (3), the intermediate frequency amplifier (7), two RF concerted filter (11, 12), two detector (13, 14), two gate block (15, 16), block a decision (17), block search threshold (6), block synchronization frequency (5), lo (4), the unit of frequency search (2), the block sync delay (10), block shaper gates (19), adder (18), block formation threshold (20), Comparer (25), four gate units (21-24). 2 Il.

The proposed device relates to the field of radio communications and can be used in radio communication systems with noise-like signals.

In known communication systems (see, for example, p. N. T. and Razmahnin M. K. "communication System is in", M., Nauka, 1969; edited Pestryakova Century B. "Pseudonoise signals in communication systems", M., "Soviet radio", 1973; Varakin L. E. "communication Systems with noise-like signals", M., "Radio communication, 1985) for processing of noise signals at the receiving end uses a pseudo-random sequence mismatched with the video SRP transmitting end.

The use of noise signals caused by the need to improve noise immunity, increase the imitator resistance of the communication channel. One of the reasons for failure of synchronization in communication systems with noise-like signal is the impact of various kinds of interference.

One of the obstacles existing in the communication channel with noise-like signal is a simulation interference with the structure of the pseudo-random signal, and the frequency of the clock pulse generator SRP simulation noise is of the order of the frequency of the clock signal. Under the influence of the interference simulation system synchronization receiver presynchronized under simulation crosstalk, that is, the receiving device is missing on the communication channel, which is expected reception of the information signal.

A device for receiving a noise-like signal.with. 45788, the content is Tr low frequencies is connected to the control unit generator frequency reference pulses, filed through the frequency divider and the driver shifted in time pulses to the control inputs of the cascades Gating.

To reduce requirements to the initial frequency detuning of the generator of the reference pulses and improve noise immunity output discrete matched filter through the selector repetition frequency of the input signals, for example, bandpass filter, connected to the two formers rectangular pulses whose frequency is equal to the difference of the frequencies of the sequence of received signals and the output signal, is connected to the frequency divider additional driver shifted by a quarter period of the pulses. The outputs of the shaper rectangular pulses through the key and a smoothing filter connected to an additional input of the control unit generator frequency to correct phase mismatch between the pulses of the frequency reference and received signals.

However, this device has a drawback, namely: exposure simulation interference and, consequently, failure of synchronization.

The closest in technical essence to the proposed device combat simulation interference in the receiver on a consistent filter is a device search, and receive the, is AutoRAE can be divided into three parts: the reception part - Ol; device optimal signal detection oops and optimal processing and separation - the DOE.

In Fig.1 shows a functional diagram of the device of the prototype, where indicated:

1 - power high frequency;

2 - the unit of frequency search;

3 - mixer;

4 - heterodyne;

5 is a block synchronization frequency;

6 is a block search threshold;

7, the intermediate frequency amplifier;

8 - unit automatic gain control;

9 is a processing unit clock;

10 is a block synchronization delay;

11 and 12, the first and second radio frequency agreed filters;

13 and 14, the first and second detectors;

15 and 16, the first and second gate units;

17 is a block decision-making.

The device prototype has the following functional relationships: connected in series amplifier high frequency 1, the inlet of which is the input of the mixer 3, the intermediate frequency amplifier 7, the output of which is connected to the input of the optimal signal detection, which consists of two channels: the first channel signal S1, the second channel signal S2; in turn, the first channel consists of posledovatel the St unit 15, the output of which is connected to the first input unit of decision 17 whose output is the output; the second channel consists of series-connected second radio-frequency matched filter 12, the second detector 14 and the second gate block 16, the output of which is connected with the second input unit of decision 17; connected in series block search threshold 6, block synchronization frequency 5 and the local oscillator 4, the output of which is connected to a second input of the mixer 3; connected in series synchronization unit delay 10 and the processing unit clock 9, the output of which is connected with the second inputs of the first 15 and second 16 gate blocks, the first inputs of which are connected respectively with the first and second inputs of the synchronization unit delay 10, and the threshold unit 6, and unit search frequency 2, the output of which is connected to the output of block search threshold 6, and the output unit 2 is connected to the input of the local oscillator 4; the input unit automatic gain control 8 is connected to the output of the intermediate frequency amplifier 7 and to the input of the second radio-frequency matched filter 12, and the output unit 8 is connected with the second input of the intermediate frequency amplifier 7; in addition, BPA 11.

The device prototype works as follows.

The input signal is supplied to the input of the amplifier high frequency 1, the output of which is connected to the first input of the mixer 3, the second input of which the signal from a local oscillator 4, and the output of the mixer 3, the signal at the first input of the intermediate frequency amplifier 7, to the second input of which is energized from the output of block automatic gain control 8, and from the output of the intermediate frequency amplifier 7, the signal is fed to the block 8 and block optimal signal detection, which consists of two channels: channel signal S1and channel signal S2. In turn, each of the channels consists of series-connected agreed with the corresponding signal of the radio frequency filter of the first 11 and second 12), the first 13 or 14 second detectors and the first 15 or 16 second gate blocks. As a result of working channels are compared in the unit of decision-making 17.

At the beginning of the work is the search signal in frequency by the frequency of the heterodyne receiver according to the program prior to the actuation block search threshold 6.

After the "capture" of the signal in the frequency enables the synchronization unit frequency 5 and the search stops what about the controls the frequency of the local oscillator of the receiver 4. Due to the fact that the agreed invariant filter to the signal delay, in such schemes, the search delay is not implemented. However, there remains a need to record the time of occurrence of the primary emission of the correction function when receiving the first signal and, using them, to ensure the functioning of the scheme tracking the delay, as in systems using PSS, required Gating of the moment decision on the recognition signals. Therefore, the outputs of the two feedback channels are fed to the block search threshold 6, which controls the enable and mode of operation of the device synchronization delay and synchronization unit delay 10, which may operate on the principle or tracking system, providing tracking of the provisional regulations of the pulses at the output of the detectors, or narrowband storage devices.

The voltage supplied from the synchronization unit delay 10, controls the processing unit clock 9, the pulses from which are served on the second inputs of the first 15 and second 16 gate blocks.

The disadvantage of this device is the lack of protection from imitation interference that leads to the disruption of synchronization and resynchronization of the disturbance; hence Pernice on a consistent filter, containing block for automatic adjustment of the amplifier, the power generating clock pulses and connected in series amplifier high frequency input which is the input of the mixer, the intermediate frequency amplifier, the output of which is connected to the input of the optimal detection signal consisting of a first channel signal S1and the second channel signal S2while the first channel comprises series-connected first radio-frequency matched filter, a first detector, the first gate block, the output of which is connected to the first input of the decision, and the second channel consists of series-connected second radio-frequency matched filter, whose input is connected to the input of the first radio-frequency matched filter and amplifier output intermediate frequency, a second detector, the output of which is connected to the first input of the second Gating unit, a second input connected to the second input of the first gate block and the output of the second gate unit is connected with the second input unit of decision-making, the output which is the output; connected in series block search Poo, the output of block search threshold through the unit search frequency is connected to the output of the synchronization unit of frequency, a second input connected to the output of the first radio-frequency matched filter, the first input block search threshold and block synchronization delay interconnected with the output of the second detector and the second input block search threshold and block synchronization delay interconnected with the output of the first detector; the output of intermediate frequency amplifier connected to the input unit for automatic adjustment of the amplifier, the output of which is connected with the second input of the amplifier intermediate frequency, and the output of the synchronization unit delay is connected with the input of the processing unit pulses entered forming unit gates, third, fourth, fifth, sixth Gating blocks and connected in series adder block formation threshold and the unit of comparison, a, b, C and d outputs of which are connected to n inputs of the block sync delay; output processing unit clock is connected to the input of the block forming the gate, the first output of which is connected with the second inputs of the first and second gate units, and four output processing unit gates the comparison. While the second inputs of the third, fourth, fifth and sixth Gating blocks are interconnected with the output of the adder, a first input connected to the output of the second detector and the second input of the adder coupled to the output of the first detector.

In Fig.2 shows a functional diagram of the proposed device, where the following notation:

1 - power high frequency;

2 - the unit of frequency search;

3 - mixer;

4 - heterodyne;

5 is a block synchronization frequency;

6 is a block search threshold;

7, the intermediate frequency amplifier;

8 - unit automatic gain control;

9 is a processing unit clock;

10 is a block synchronization delay;

11 and 12, the first and second radio frequency agreed filters;

13 and 14, the first and second detectors;

15 and 16, the first and second gate units;

17 is a block decision-making;

18 - adder;

19 is a block forming gates;

20 - unit formation threshold;

21, 22, 23 and 24, the third,..., the sixth gate blocks;

25 - unit comparison.

The proposed device has the following functional relationships: connected in series amplifier high frequency 1, the inlet of which is the input device is osnovaniya signal, consisting of two channels: the first channel signal S1, the second channel signal S2; in turn, the first channel comprises series-connected first radio-frequency matched filter 11, a first detector 13, the first gate unit 15, the output of which is connected to the first input unit of decision 17 whose output is the output unit and the second input is connected to the output of the second gate block 16, a second input connected to the second input of the first Gating block 15 and block the formation of gates 19, four out of which 21 through the third, fourth, 22, 23 fifth and sixth gate 24 blocks are connected respectively with four inputs Comparer 25, a, b, C and d outputs of which are connected respectively to the inputs of the block sync the delay to 10, the output of which through the forming unit clock 9 is connected to the input of block formation of gates 19; the output of the intermediate frequency amplifier 7 through the unit for automatic adjustment of the amplifier 8 is connected to its second input and the output of the intermediate frequency amplifier 7 is connected to the second channel, consisting of series-connected second radio-frequency coherent f is also connected with the first inputs of the adder 18, block sync delay 10 and block search threshold 6, the output of which is connected to series-connected unit synchronization frequency 5 and the local oscillator 4, the output of which is connected to a second input of the mixer 3, in addition, the output of block search threshold 6 through the block frequency search 2 is connected to the output of the synchronization unit frequency 5, a second input connected to the input of the first detector 13, the output of which is connected with the second inputs of the adder 18, the synchronization unit delay 10 and block search threshold 6.

The proposed device operates as follows.

The input signal is supplied to the amplifier high frequency 1, the output of which is connected to the first input of the mixer 3. To the second input of the mixer 3 is fed the signal from the local oscillator 4, from the output of the mixer 3, the signal at the first input of the intermediate frequency amplifier 7, to the second input of which is energized from the output of the unit for automatic adjustment of the amplifier 8, and the output of the intermediate frequency amplifier 7, the signal is supplied to the input unit 8 and unit optimal signal detection, which consists of two channels: channel signal S1and channel signal S2.

In turn, each of the channels colootola matched filter, the first 13 and second 14) detector and the first 15 (16 second) stabilizing unit. The results of the channels are compared in the unit of decision-making 17.

At the beginning of the work is the search signal in frequency by the frequency of the local oscillator 4 according to the program prior to the actuation block search threshold 6.

After the "capture" of the signal in the frequency enables the synchronization unit frequency 5 and the search stops. Block synchronization frequency 5 may be a frequency discriminator, the error signal which controls the frequency of the local oscillator 4. With outputs of the first 13 and second 14 both channels feedback serves to block search threshold 6, which controls the enable and mode of operation of the synchronization unit delay 10, which may operate on the principle or tracking system, providing tracking of the provisional regulations of the pulses at the outputs of the first 13 and second 14 detectors, or narrowband cumulative block, and also to the inputs of the adder 18, respectively. The voltage supplied from the synchronization unit delay 10, controls the processing unit clock 9, the pulses from which are fed to the block of formation of gates 19.

Block the formation of gates 19 is an annular ment time sequence:

the first pulse is supplied to the third gate 21 block for two bars before the main peak of the correlation function of the useful signal; and

the second pulse is supplied to the fourth gate 22 block for one clock cycle before the main peak of the correlation function of the useful signal; and

the third pulse is transferred in the first 15 (16 second) gate block in time coincidence with videoanalyse coming from the first 13 and second 14) detector;

the fourth pulse is supplied to the fifth gate 23 block after one cycle peak function correction signal; and

the fifth pulse is served in the sixth gate 24 unit two quantum peak of the correlation function of the useful signal.

With outputs of the first 13 and second 14 detector responses are fed to the inputs of the adder 18, respectively, where the signals are summed and fed to a second input gate of the blocks 21, 22, 23 and 24 and to the input of the processing unit threshold 20.

Outputs of the gate blocks 21, 22, 23 and 24 and the processing unit threshold 20, the signals are sent to the four inputs of the block comparison 25, where they are compared with each other and the threshold. The Comparer 25 generates the control signals for synchronization unit delay 10.

If imitation hindrance absent from the vicinity of the main gate blocks, proving the existence of a simulation interference will not occur, and a, b, C and d outputs of the block comparison 25 will log. "0", indicating the absence of interference simulation near the main peak of the correlation function of the useful signal.

In the presence of simulation noise in the communication channel in receive mode information due to the instability of the frequency of clock pulses beginning structure of the simulation noise is continuously shifted relative to the beginning of the structure of the SRP useful received signal.

Thus, for the reason described above, simulation obstacle will appear in a consistent filter (the first 11 and second 12) depending on the sign of the frequency difference between clock pulses simulation noise and the useful signal, the promotion of simulation noise in a consistent filter will be left to right or right to left relative to the main peak of the correction function of the useful signal.

The device protection from interference simulation in the case of promotion of interference from left to right similar promotion interference from right to left.

Consider the operation of the device when moving interference simulation from left to right relative to the main peak of the correction function. The first obstacle will be strobino is 25, where is compared with a threshold and other channels. If the noise exceeds the threshold, then the output "a" Comparer 25 will receive a pulse, indicating that appeared imitation hindrance near the main signal. Then the obstacle appears and strobiles in the fourth Gating unit 22. This means that simulation obstacle moves (crawls) from left to right to the main peak of the useful signal, and if in this case the interference exceeds the threshold in the comparison circuit, the output "b" Comparer 25 will receive a pulse, indicating that the simulation obstacle moves the signal to the left.

This pulse synchronization unit delay 10 measures the synchronization mode and stops the data reception until the simulation interference with the right of the main signal. This means that when the Gating in the sixth Gating unit 24, the noise level will be above the threshold and output "d" Comparer 25 will receive a pulse, indicating that the interference at the output of the near zone of the useful signal. Hence, the synchronization unit delay 10 did not personalizeable for simulation noise, and you can take the information.

If, however, the movement of the interference simulation from left to right through the main signals is left to right with respect to the useful signal, as described above, but with the difference that interference will not appear to the right of the main signal.

Claims

The device of combat simulation interference in the receiver on a consistent filter containing block for automatic adjustment of the amplifier, the power generating clock pulses and connected in series amplifier high frequency input which is the input of the mixer, the intermediate frequency amplifier, the output of which is connected to the input of the optimal detection signal consisting of a first channel signal S1and the second channel signal S2while the first channel comprises series-connected first radio-frequency matched filter, a first detector, the first gate block, the output of which is connected to the first input of the decision, and the second channel consists of series-connected second radio-frequency matched filter, whose input is connected to the input of the first radio-frequency matched filter and amplifier output intermediate frequency, the second detector, the output of which is connected to the first input of the second gate block, the second input is the soode lighting designer block a decision, the output of which is an output device, connected in series block search threshold, the block synchronization frequency and the local oscillator, the output of which is connected to a second input of the mixer, in addition, the output of block search threshold through the unit search frequency is connected to the output of the synchronization unit of frequency, a second input connected to the output of the first radio-frequency matched filter, the first input block search threshold and block synchronization delay interconnected with the output of the second detector and the second input block search threshold and block synchronization delay interconnected with the output of the first detector, the output of intermediate frequency amplifier connected to the input unit for automatic adjustment of the amplifier, the output of which is connected to the second input of the intermediate frequency amplifier, and the output of the synchronization unit delay is connected with the input of the processing unit clock, characterized in that the input unit forming gates, third, fourth, fifth, sixth Gating blocks and connected in series adder block formation threshold and the unit of comparison, a, b, C and d outputs of which are connected to n inputs of the block synchronization time delay the CSO is connected with the second inputs of the first and second gate units, and four output unit forming the gate through the third, fourth, fifth and sixth Gating blocks are connected to four inputs of the block comparison, while the second inputs of the third, fourth, fifth and sixth Gating blocks are interconnected with the output of the adder, a first input connected to the output of the second detector and the second input of the adder coupled to the output of the first detector.

 

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