The selector pulse sequence

 

The invention relates to a pulse technique for selecting pulses (THEM) in duration and amplitude. The technical result consists in Elektrownia both periodic and random THEM. The selector pulse sequence contains shaper THEM (PHI) (1), the delay blocks (KB) (2, 4, 5, and 10), key (K) (11, 16), And (And) (3), adders (C) (6, 12), multilevel amplitude selectors (AU) (7, 13), switches (KM) (8, 14), the switch (P) (15), triggers (TG) (9, 15), subtractive device (17) connected to the outputs To (11 and 16). The first release of PHI (1), on which THEY are formed in the moments leading edge of the input to THEM, connected with BRS (2,4), and the second output PHI (1) on which are formed THEM in the moments of the trailing edge of the input to THEM, connected to the first input And (3), the output of which is connected with (6). BR (10) is connected to the second inputs TG (9, 15), the signals from which control To (11 and 16). Outputs (6, 12) speakers (7, 13), which are connected with MILES (8 and 14), the outputs of which are connected with the first inputs TG (9, 15). BR (2) is connected with the second input, And (3), and the output of BR (4) is connected with the third input, And (3) and with a second entrance (6). 2 Il.

The proposed selector refers to the pulse technique and can be used in devices analysis for Vinomania on their timing and amplitude (see, for example, U.S. patent No. 3922676, inventors ' certificatesâ„–â„– 894851, 1239852, 1396268, 1624676, patents No. 2173935, 2168854 and others), as well as the selectors described in the 2nd and 3rd chapters of the book of O. N. Timakova, C. K. Lyubchenko "Selectors pulses", ed. The owls. Radio, Moscow, 1966,

Known selectors closest to the proposed selector is in patent No. 2173935 on M CL 7 H 03 To 5/19 priority from 18.04.2000, which is selected as a prototype.

This selector allows discriminates only regular pulse sequence by three parameters, namely amplitude, pulse duration and repetition period.

A disadvantage of this device is that it does not allow discriminates pulses with specified parameters in the duration and amplitude appearing at random points in time.

Object of the invention is to enhance the functionality of the selector associated with its ability to simultaneously discriminates as periodic pulses with a given amplitude and duration, and appearing at random points in time.

The problem is solved in that the selector pulse sequence containing the input shaper pulses, an input connected to the I is suwasa the first output selector, the first output driver pulses, which pulses of constant duration proportional to the amplitude of the input pulses at the moments corresponding to the leading edge of the input pulses, is connected to the inputs of the first and second delay blocks, the outputs of which are connected respectively with the second and third inputs of the element, And the second output of the input shaper pulses, which are formed similar to the pulses at the moments corresponding to the rear edge of the input pulses, connected to the first input element And the output of which is connected to the first input of the first adder, a second input connected to the output of the second delay unit, the output of the first adder connected to the first input multi-level amplitude selector sequentially connected to the input of the first switch, the output of which is connected to the first input of the first flip-flop, a second input connected to the output of the fourth delay unit, and the output of the first flip-flop is connected with the control input of the first key, characterized in that it additionally introduced sequentially connected to the second adder, multilevel amplitude selector and switch, the second trigger, the second key and vicino is connected to the output of the fourth delay unit, an input connected to the output of the first delay unit, the output of the second trigger is connected with the control input of the second key, the input connected to the output of the third delay unit and the output of the second key is a second output of the selector, while the first and second subtractive inputs of the device are connected respectively to the outputs of the first and second keys, and the output of subtractive device is the third output of the selector.

A structural scheme of the selector shown in Fig.1, a timing diagram explaining the principle of its operation is shown in Fig.2.

The selector pulse sequence contains the input shaper pulses 1, an input connected to the input bus and to the input of the third unit 5 delays the output of which through the first key 11 is connected to the output bus selector, which plays the role of the first output selector. The first output driver 1, in which pulses of constant duration proportional to the amplitude of the input pulses at the moments corresponding to the leading edge of the input pulses, is connected to the inputs of the first 2 and second 4 units of delay, the outputs of which are connected respectively with the second and third inputs of the element And 3. Second bifrontal input pulses, connected to the first input element And 3 and with the first input of the second adder 12. The output of the first block 2 latency is connected to a second input of the second adder 12 and to the input of the fourth delay block 10. The output of the second unit 4 delays connected with the second input of the first adder 6, a first input connected to the output element And 3. The output of the fourth delay block 10 is connected to the second inputs of the first 9 and the second 15 triggers. The output of the first adder 6 is connected in series through the first multi-level amplitude selector 7 and the switch 8 is connected to the first input of the first flip-flop 9 , the output of which is connected with the control input of the first key 11 whose output is the first output of the selector. The output of the second adder 12 connected in series through the second multi-level amplitude selector 13 and the switch 14 is connected to the first input of the second trigger 15 , the output of which is connected with the control input of the second key 16, and the output of this key is the second output of the selector. The first and second inputs of subtractive device 17 are connected respectively to the outputs of the first 11 and second 16 keys, and the output of subtractive device is the third output of the selector. The output of the third unit 5 delays connected inost (Fig.2A), in which along with the other pulses are both periodic and random pulses with specified parameters in the duration and amplitude (Fig.2 they would be tinted different shades), is applied to the input shaper 1 and the third input 5 delay unit. The first output of the input shaper 1 pulses of constant duration proportional to the amplitude of the input pulses and their corresponding leading edge (Fig.2B) and the second output - similar pulses corresponding to the rear edge of the input pulse (Fig.2B), served on the first input of the second adder 12 and the first input element And 3. The pulses from the first output of the input shaper 1 is delayed in the first 2 unit delay time equal to the specified duration of tand(Fig.2G) and fed to a second input of the second adder 12, the second input element And 3 and to the input of the fourth delay unit 10, where it is delayed for a time equal to the specified pulse duration (Fig.2K). The pulses from the first output of the input shaper 1, detained 4 second unit delay time equal to the sum of the period of the periodic sequence and a given pulse duration, served on the third input element And 3 and second whooah simultaneously signals (Fig.2E). These pulses carry information about the parameters of the pulse sequence, in particular on the pulse duration and repetition period. In the first adder 6 these pulses are summed with the pulses from the output of the second unit 4 delays (Fig.2G), which provide information about the amplitudes of the pulses of breeding sequence. From the output of the adder 6 pulses (Fig.2ZH) served on the first multilevel amplitude selector 7 is distributed among its channels.

Assume that the signal got into j-channel multilevel amplitude selector lever 7 (Fig.2H).When connecting the first switch 8 to j-channel multilevel amplitude selector pulses from this channel (Fig.2i) are fed to the first input of the trigger 9, setting it in one state. In the zero state, the trigger is set by the pulses from the output of the fourth delay block 10 (Fig.2K). The pulses from the trigger output 9 (Fig.2) served on the control input key 11, the other input of this key pulses from the output of the third 5 delay block (Fig.2m). As a result, the output of the first key 11 (first selector) will pass only pulses of a regular pulse sequence (Fig.2H). At the input of the second adder post is about adder 12 will receive the pulses (Fig.2O), which contain information about the amplitudes and durations of the input sequence. From the output of the second adder 12 pulses on the second multilevel amplitude selector 13, where depending on the total amplitude of the input pulses are divided by level (Fig.2R). Each channel of the multi-level amplitude selector 13 transmits on its output pulse only when the amplitude of the total voltage U lies in some interval Umin<U maxcharacterizing this level (channel). The second switch 14 can be connected to any channel of the multi-level amplitude selector 13. When power is applied, for example, at the k th level (Fig.2R) multilevel amplitude selector 13 these pulses arrive at the switch 14 (Fig.2P) and its output serves at the first input of the second trigger 15, the cutting edge of setting it in one state. In the zero state, the second trigger 15 is set by the pulses from the output of the fourth unit 10 delays detained relative to the pulses at the output of the first block 2 delay time specified pulse duration tand(Fig.2K). The output of the second trigger 15 will receive the pulses (Fig.2C), delayed relative the second input of the second key 16, to the other input of which is fed an input sequence of pulses, delayed by a time equal to the specified duration tand. (Fig.2m). At the output of the second key 16 (the second output of the selector will pass only pulses with predetermined duration tandand amplitude Uand. (Fig.2T). Among these pulses are both periodic pulses, and the pulses appearing at random points in time. If you set a different time delay blocks delay and switch to connect to another channel multilevel amplitude selector, you can select pulses with a different set duration and amplitude. On subtractive device 17 pulses (Fig.2n) and (Fig.2m), causing its output on the second output selector appears pulses of desired amplitude and duration, occur at random points in time. Thus, the use of the proposed new selector elements and relationships allows any sequence of pulses to allocate as regular pulses with specified parameters in duration and amplitude, and appearing at random points in time.

Claims

The selector pulse sequence containing WMO is d through which the first key is connected to the first output of the selector, the first output driver pulses, which pulses of constant duration proportional to the amplitude of the input pulses at the moments corresponding to the leading edge of the input pulses, is connected to the inputs of the first and second delay blocks, the outputs of which are connected respectively with the second and third inputs of the element, And the second output of the input shaper pulses, which are formed similar to the pulses at the moments corresponding to the rear edge of the input pulses, connected to the first input element And the output of which is connected to the first input of the first adder, a second input connected to the output of the second delay unit, the output of the first adder connected to the first input multi-level amplitude selector sequentially connected to the first switch, the output of which is connected to the first input of the first flip-flop, a second input connected to the output of the fourth delay unit, and the output of the first flip-flop is connected with the control input of the first key, characterized in that it additionally introduced sequentially connected to the second adder, multilevel amplitude selector and switch, the second trigger, the second key and subtractive is, the Torah input - output of the first delay unit and to the input of the fourth delay unit, the output of the second switch connected to the first input of the second trigger, the second input connected to the output of the fourth delay unit, the output of the second trigger is connected with the control input of the second key, the input connected to the output of the third delay unit and the output of the second key is a second output of the selector, the first and second subtractive inputs of the device are connected respectively to the outputs of the first and second keys, and the output of subtractive device is the third output of the selector.

 

Same patents:

The invention relates to a pulse technique for selecting pulses (THEM) on the duration and amplitude

The invention relates to electrical engineering and can be used in devices analysis and measurements of parameters of regular pulse sequences

The invention relates to measurement technology and is designed to control the security of the saturation mode transistor is a basic element in the development of highly efficient power contactless protective and switching equipment

The invention relates to digital computing and can be used in information-measuring systems, devices, analysis of the temporal structure of the pulse, the devices forecasting and periodic pseudoperiodicity sequences, etc

The invention relates to computer technology and can be used in digital systems for control channel synchronization system elements

Paraphase inverter // 2030107
The invention relates to a pulse technique

FIELD: digital pulse engineering.

SUBSTANCE: proposed device designed for shaping pulses of desired length for each of three events during power turn-on in response to off-operation button signal incorporating provision for chatter elimination in case of skip or stop of changes in input pulses on detection enabling has first and second monostable restart multivibrators 1, 4, off-operation button 2, flip-flop 3, shaper 5 of signal responding to button-provided power turn-on which is built around capacitor 12, resistors 13, 14, diode 15 and two NAND gates 6,7, as well as AND gate 8, controllable pulse generator 9, logical 1 input, pulse signal input 10, and control input 11. Controllable pulse generator 9 is built around AND gate 16, NAND gate 17, resistors 18, 19, and capacitor 20. Device can shape input pulse during power turn-on period and function as hardware watch timer implemented in the course of forward and backward automatic interaction with system microcontroller.

EFFECT: enlarged functional capabilities of device.

1 cl, 1 dwg

FIELD: digital pulse engineering.

SUBSTANCE: proposed device that can be used for shaping output pulses of desired length for each of three events (power turn-on, detection of input-signal pulse skipping or hanging [stop of changing] when detection is enabled in response to signal from closing button, including chatter suppression) provides for shaping output pulse during power turn-on and can function as hardware watch timer enabling generation of output pulse in case of skipping or hanging of input signal pulse. Device has first and second resistors 1, 2, closing button 4, capacitor 5, logical follower 6, inverted pulse signal output, common bus, and power supply bus. In addition, device has third resistor 3, NAND gate 7, first and second AND gates 8, 9, power turn-on and push-button signal integrator 10, pulse detector 11, pulse signal input 12, and control input 13.

EFFECT: enlarged functional capabilities.

1 cl, 1 dwg

FIELD: digital pulse engineering.

SUBSTANCE: proposed device designed for shaping output pulses of desired length for each of three events, that is, signal front across first control input, signal zero level from closing button incorporating provision for chatter suppression, and detection of pulse skipping across signal pulse input has seven resistors 1 - 7, two capacitors 11, 18, button 10, first and second control inputs 12, 13, pulse input 14, AND gate 17, NOT gate 8, two NAND gates 9 - 16, NOT gate with open collector output 15, and pulse signal envelope detector 19. This pulse shaper can be used, for instance, as system reset pulse shaper of numeric control device.

EFFECT: enlarged functional capabilities.

1 cl, 1 dwg

Impulse selector // 2309532

FIELD: impulse engineering, possible use in impulse analyzing devices to select impulses with given parameters of duration, amplitude and period.

SUBSTANCE: device contains differentiating element, zero level limiter, inverter, three delay blocks, key, adder, multi-level amplitude selector, commutator, trigger, saw-shaped voltage generator, AND element, subtracting device.

EFFECT: expanded functional capabilities of device due to selection of both periodic impulses with given duration and amplitude parameters, and impulses appearing in random time moments.

2 dwg

FIELD: impulse engineering, possible use in devices for analyzing impulses to select impulses with given parameters of duration, amplitude and period.

SUBSTANCE: device contains input impulse generator, three delay blocks, key, adder, multilevel amplitude selector, commutator, trigger, saw-shaped voltage generator, AND element, subtracting device.

EFFECT: expanded functional capabilities due to selection of both periodic impulses with given parameters and impulses which appear in random time moments.

2 dwg

FIELD: radio engineering, possible use for finding a stack of mutually coherent impulses.

SUBSTANCE: device contains input block, connected to first input of adder. Second input of adder is connected to output of reverse communication amplifier. New feature is the introduction of compensating amplifier and band filter. Input of amplifier is connected to output of delay line, and output of amplifier is connected to input of band filter. Delay line consists of input, intermediate and output of inter-digital transformers on sound-conductive substrate. Duration of interaction of train of waves in output inter-digital transformer is selected to be several times or several dozen times greater than delay of signal between input and intermediate inter-digital transformers, output inter-digital transformer is made in form of continuous mono-periodical structure, matched with carrying frequency of received radio-impulses, and connected to input of compensating amplifier. Pass band in band filter is selected to be commensurable with reverse value of duration of radio-impulse signal generated in output inter-digital transformer.

EFFECT: increased detection capability of accumulator without worsening of its stability.

2 dwg

FIELD: radio engineering and impulse engineering, possible use for selection and measurement of parameters of regular and random impulse series.

SUBSTANCE: impulse series selector contains input impulse generator (1), at first and second outputs of which impulses of constant duration are generated, proportional to amplitude of input impulses, corresponding to rise-up and descending parts of input impulses respectively, delay blocks (2,4,5,7), AND elements (3,12), adder (6), multi-level amplitude selector (8), commutator (9), triggers (10,13), keys (11,14,15), and computing device (16). At first output of selector one periodical series of impulses is received with preservation of its amplitude. At second output of selector, all impulses are received with given amplitude and duration both from periodical series and those that appear in random time moments. At third output of selector all remaining impulses which may be used for further analysis are singled out. At fourth output of selector, impulses with given amplitude and duration, which appear in random time moments, are singled out.

EFFECT: expanded functional capabilities when analyzing and processing impulse series due to usage of informative impulse parameters.

2 dwg

FIELD: computer engineering.

SUBSTANCE: invention relates to computer engineering and can be used in digital automatic systems. The technical outcome allows for quantitative measurement of the degree of short term mismatch between pulses. The device contains pulse formers (1-4), AND elements (5-7), OR elements (8 and 9), delay elements (10-12), RS flip-flops (13 and 14), standard frequency generator (15), pulse counter (16), memory register (17), input (18) for the first controlled pulse train and input (19) for the second controlled pulse train. The newly introduced AND element (7), delay elements (10-12), RS flip-flop (13 and 14), generator (15), pulse counter (16) and register (17) allow for achieving the said technical outcome.

EFFECT: increased functionalities of the control device.

2 dwg

Up!