Architecture of integrated circuits for digital signal processing

 

The invention relates to a device for digital signal processing. The technical result is to increase the efficiency of operations of the mixed system in which a microprocessor is used to generate the addresses of the storage device, and reduce the probability of outage of one of the devices in which one of them must wait for the job to others. For this purpose, the method of performing digital signal processing unit digital signal processing performs arithmetical and logical operations on data words simultaneously and independently from the operations of feeding and sampling performed by the microprocessor unit, if the digital processing unit is not able to accept the word of data, the microprocessor unit to stop it. The system that implements the method, contains a microprocessor unit, a block of digital signal processing. 2 C. and 31 C.p. f-crystals, 7 ill., 10 table.

Description text in facsimile form (see graphic material)and

Claims

1. Method of performing digital signal processing using digital signal processing applied to said data signal stored in the device (8) when stored the words of the program for the microprocessor unit, word addresses for addressing the storage cells storing the said data word signal in the above-mentioned storage device, reading, running mentioned microprocessor unit, the above-mentioned words of the data signal of the said addressed storage cells storing the data word signal in the storage device, supply, under control of the microprocessor unit, the signal data words in the block (4) digital signal processing, running the command words of the program for the block of digital signal processing, performing, when running the above block of digital signal processing under control of the command word program for the block of digital signal processing, arithmetical and logical operations, which includes at least one of the operations of convolution, correlation operation and conversion operations above mentioned words the signal data to generate result data words, and sampling during the work mentioned microprocessor unit running the command words of the program for the microprocessor unit, referred to output data words from a block of digital signal processing, characterized in that the block of digital signal processing to perform the mentioned arithmetical-logenetic operations, filing and retrieval, performed the microprocessor unit over one or more data word signal, and if the said unit of the digital signal processing is not able to accept the word of data submitted from the mentioned microprocessor, said microprocessor unit to stop it.

2. The method according to p. 1, characterized in that the said step of generating further comprises the step of generating data words at work mentioned microprocessor unit, and referred to the submission further comprises the step of filing, running the mentioned microprocessor unit mentioned data words in the block of digital signal processing, running the command words of the program for the block of digital signal processing.

3. The method according to p. 1, characterized in that it includes the steps of generating, under control of the mentioned microprocessor unit, said address for addressing the storage cells for storing mentioned result data words in said storage device, and recording, under the control of the mentioned microprocessor unit mentioned result data words in said addressed storage cells for storing result data words in said storage device.

5. The method according to p. 4, characterized in that the said at least one input analog signal is a continuously varying input signal in real time.

6. The method according to any of the preceding paragraphs, characterized in that the said result data words represent at least one output analog signal.

7. The method according to p. 6, characterized in that the said at least one output signal is a continuously varying output signal in real time.

8. Device for performing digital signal processing on the signal data words stored in the storage device that contains a microprocessor running the command words of the program for the microprocessor unit, for generating said addresses for addressing storage locations in said storage device and to control the forwarding of the above-mentioned words of the data signal between the said device to perform digital signal processing and the above-mentioned storage device, and a block of digital signal processing, running the command words of the program for the block of digital obrabotki convolution, the operation of the correlation and transformation operations above mentioned words of the data signal extracted from the storage device control unit, to generate result data words, characterized in that said microprocessor unit and the unit of the digital signal processing simultaneously and independently, and if the said unit of the digital signal processing is not able to accept the word of data submitted from the mentioned microprocessor, the microprocessor stops.

9. The device under item 8, characterized in that the said result data words are written to the storage device mentioned microprocessor unit.

10. Device according to any one of paragraphs.8 and 9, characterized in that the said words of data signal represents at least one of the input analog signal.

11. The device according to p. 10, characterized in that the said at least one input analog signal is a continuously varying input signal in real time.

12. Device according to any one of paragraphs.8-11, characterized in that the said result data words represent at least one output analog signal.

continuing changing output signal in real time.

14. Device according to any one of paragraphs.8-13, characterized in that the microprocessor responds to the command word of a multi-feed, to feed a multitude of sequentially addressed data signal in said block of digital signal processing.

15. Device according to any one of paragraphs.8-14, characterized in that the said unit of the digital signal processing includes verbose input buffer (12).

16. Device according to any one of paragraphs.8 to 15, characterized in that said microprocessor unit responds to a command word multiple samples for a sampling of the many consistently addressed the resulting data words from the above block of digital signal processing.

17. Device according to any one of paragraphs.8-16, characterized in that the said unit of the digital signal processing includes verbose output buffer (18).

18. Device according to any one of paragraphs.8-17, characterized in that the said storage device and the digital signal processing connects the multiplexed data bus and commands used to send data words signal, the command words of the program for the microprocessor unit and command words of the program for the block of digital signal processing in the above-mentioned ostrojjropa signal processing includes a Bank of registers (10) unit digital signal processing for storing data words, over which should be performed arithmetical and logical operations, and referred to the instruction word digital signal processing include a field that specifies the registers.

20. Device according to any one of paragraphs.15 and 19, characterized in that the said input buffer stores data about the destination, identifying the register-receiver unit of the digital signal processing for each data word stored in said input buffer.

21. The device according to p. 20, characterized in that at least one command word program for the block of digital signal processing, which controls the digital processing unit signal for reading at least one of the register unit of the digital signal processing includes a flag indicating whether the data word stored in said register unit digital signal processing, to be replaced by the word data stored in said input buffer having matching information about the destination.

22. The device according to p. 21, characterized in that if the said input buffer contains a number of data words that have matching data on the destination of the register unit of the digital signal processing updated with the data word that is

23. Device according to any one of paragraphs.14 and 20, characterized in that the command word multi-feed specifies data about the destination for the first data word, and a result of execution of the command word multiple supply said data destination increased by an increment for each subsequent data word stored in the input buffer.

24. The device according to p. 23, characterized in that the said command word multiple submission also sets a limit value for the data destination, and said data destination increased by an increment for each subsequent data words until, until you reach the mentioned limit value, then, before you can obtain further increment data destination reinstalled in the data destination for the mentioned first word.

25. Device according to any one of paragraphs.8-24, characterized in that the microprocessor running the command words program the microprocessor unit selects data words from the above block of digital signal processing, and if the said unit of the digital signal processing is not able to submit the data word retrieved is trichomania fact, what if the mentioned block digital signal processing attempts to read a data word that is not mentioned in the input buffer, the unit digital signal processing stops.

27. The device under item 17, characterized in that if the said block of digital signal processing attempts to write a data word in said output buffer, and the output buffer is full, the unit digital signal processing stops.

28. Device according to any one of paragraphs.26 and 27, characterized in that if the said block of digital signal processing stops, said block of digital signal processing is included in the power-saving mode.

29. Device according to any one of paragraphs.8-28, characterized in that it contains the cache memory unit of the digital signal processing for storing the command words of the block of digital signal processing.

30. The device according to p. 29, wherein the command unit of the digital signal processing can be prefetched in the cache memory unit of the digital signal processing in response to the command prefetch.

31. The device according to p. 20, characterized in that the said block of digital signal processing reacts to the team that performs at least one of sleduushie.

32. Device according to any one of paragraphs.8-31, characterized in that said microprocessor unit and the unit of the digital signal processing performed in a single integrated circuit.

33. The device according to p. 19, characterized in that the said set of registers block digital signal processing includes at least one data register full bit and at least one register battery with the capacity of Y bits, where Y is greater than X.

 

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