The random number generator

 

The invention relates to computing and can be used in static studies and systems for information processing. The technical result is to increase the accuracy of the simulation of random variables. The device includes a random number sensor block key block formation threshold, the element OR the control unit, consisting of a shift register elements OR element off bits of the start element and the elements of the initial installation. 1 C.p. f-crystals, 8 ill.

The invention relates to the field of computer engineering and can be used in statistical analyses and in systems for information processing.

Known generator of sequences of random numbers (see and.with. The USSR 447706, CL G 06 F 1/02, 1974), containing the sensor uniformly distributed numbers, the switch, the first and second clocks, the counter, registers, valves, delay element, the inverter, the pulse shaper and reset the key.

Known generator generates unmanaged along the length of the sequence of random numbers, which limits its functionality.

The well-known random number generator (see and.with. The USSR 771654, CL G 06 F 1/02, the tel and the multiplier.

Known generator allows you to generate a random number for functions with continuous distributions and distributions with singularities of the first kind.

However, this device provides limited accuracy of approximation of the distribution function.

The closest technical solution to the claimed invention is a random sequence of values of the data set (see RF patent 2138074, CL G 06 F 7/58, 1998), contains a source of random numbers with a given distribution, the output of which is connected to the second address input of the multiplexer, and his first address input is the address input of the random sequence generator set values of the data set, the enable input of the multiplexer is input resolution generator. The output of the multiplexer is connected to the address inputs of the first and second memory blocks, the information input of the second memory block is connected to the information input of the first memory block and an information generator input, the output of the first connected to the input unit of comparison, and the second output to the input of block elements "And". The second control input of the block elements And is connected to the selection input of the multiplexer is the house.

This prototype in comparison with analogues allows you to generate random variables with a dynamic change of the distribution function during the simulation of random processes.

The disadvantage of the generator prototype is relatively low accuracy of the simulation (under the precision modeling (resmedeyim) refers to the condition when the expectation of the estimate of the random variablewhenever possibleis equal to(see, for example, the book: B. A. Sevastyanov Course in probability theory and mathematical statistics-M.: Nauka, 1982, S. 213-232)) random variables.

The aim of the invention is to develop a random number generator that provides a higher accuracy of the simulation of random variables, estimates of the moments of the simulated random variables describing the behavior of complex systems, due to the formation of random numbers in a given range, changes of probability measures (see, for example, the book: Reliability and efficiency (directory) /Ed. by B. C. Gnedenko, so 2, S. 20) presentation by controlling the length of the random sequence generated numbers.

This objective is achieved in that in the known is N, where2, blocks of keys, N blocks forming rapids and N-shadowy element OR. A random number sensor has a k-bit output, where k2, which is connected with the k-bit information input of each block of keys.

The control input of the i-th block of keys, where i=1, 2,... N is connected to the i-th output control unit, and its k-bit output connected to the k-bit input of the i-th processing unit thresholds.

Control output processing unit thresholds connected with i-th entry of the N-Vodolaga OR. Information k-bit output of the N-th processing unit threshold is the output of the random number generator.

The control unit consists of an input element, a timing element, block, run, block, disable bits, block initial installation and the N-bit shift register comprising N cells. Promoting the output of the j-th cell, where j=1, 2,..., N-1 N-bit register connected to the information input of the (j+1) th cells, and promotes the release of the N-th cell connected to the first input of the input element. The second input of the input element connected to the first input of the synchronizing element and the output unit initial setup. The output of the input element connected to an information vibhavari and connected to the second input of the synchronizing element, an entrance control unit. The clock input of the first cell is connected to the output of the synchronizing element. Enable input of the i-th cell of the N-bit register connected to the i-th unit output disable bits. Installation inputs of all N cells N-bit register combined and connected to the output of the start block. Information outputs of all N cells N-bit register is the respective N outputs of the control unit.

Thanks to the new essential features and due to the introduction of the control unit blocks the formation thresholds, blocks, keys and relationships between them is possible to construct a sequence of random numbers with the desired (minimum and maximum) probability of their occurrence. This allows simulation of random variables with higher accuracy.

The claimed device illustrated by the drawings: Fig.1 is a functional diagram of the device; Fig.2 - scheme of the control unit; Fig.3 is a diagram of the cell control unit; Fig.4 - scheme of the start element; Fig.5 is a diagram of the elements of the initial installation.

Fig.6 is a block circuit diagram of the key; Fig.7 is a block circuit formation thresholds; Fig.8 is a diagram of the N-Vodolaga element "OR".

The random cise, blocks of keys 2, N blocks formation thresholds 3 and N-Vodolaga item, OR 4.

A random number sensor 1 is designed to produce sequences of numbers that are subordinate to the given distribution law. Known sensor described in the book: M. P. Bonev "Generation of random signals", M.: Energy, 1971, S. 170, Fig. 6-13. The sensor has a k-bit output, where k2, which is connected to the information input of the corresponding element And 2.1l,..., 2.1keach block of keys 2.

Key block 2 is designed to priklucheniya random numbers from the RNG output to the input of the corresponding block formation thresholds. The control inputs of the i-th block of keys, where i=1, 2,... N, is connected with the i-th output of the control unit. The outputs of the elements "And" 2.1l,... 2.1kat the same time connected with the first group of inputs of the first 3.3 and 3.4 second blocks comparison and second inputs trehshipovyh elements 3.7l... 3.7kAnd the i-th processing unit thresholds 3.

Block formation threshold 3 is designed for selective sampling of random numbers generated RNG. The second group of inputs of the first 3.3 and 3.4 second units of comparison are connected to the outputs of the first 3.1 and 3.2 second resistive matrices. The first and second outputs of Pervov the driving elements "OR". The output of the first 3.5 element OR is connected with the first inputs trehshipovyh elements 3.7l,..., 3.7k"And", and the output of the second 3.6 item "OR" connected to third inputs trehshipovyh elements 3.7l,. . . , 3.7kAnd whose outputs are connected to respective inputs of the k-Vodolaga 3.8 item "OR". In addition, the output elements 3.7l,..., 3.7kThe N-th processing unit thresholds simultaneously an information output unit formation threshold and the output of the random number generator.

Resistive matrix 3.1, 3.2 and 5.3 are identical and can be implemented as described in the book: B. C. Tarabrin, L. F. Lunin, Y. N. Smirnov and others; Integrated circuits; Reference. - Second edition, corrected-M.: Energoatomizdat, 1985. p. 190. Nodes compare 3.3 and 3.4 are identical and can be realized by applying the known schemes of the nodes of the comparison described in the book: in. A. Gusev, O. N. Lebedev, A. M. Sidorov. Fundamentals of pulse and digital techniques.- SUVIUS, 1995. pages 149-152.

The output of the k-Vodolaga 3.8 item "OR" is control the output processing unit thresholds, which is connected to the i-th entry of the N-Vodolaga element OR 4. In addition, the outputs of the elements 3.7l,.... 3.7kThe N-th processing unit thresholds are vytouzeneho item 5.2, an entrance control unit, and the clock inputs of the cells of the shift register 5.12... 5.1Nthe control unit 5.

The control unit 5 is designed to generate control signals blocks of keys and can be implemented as shown in Fig.2. The control unit 5 is composed of N-bit shift register 5.1, including N-cells (Fig. 3), the synchronizing element 5.2 element disable bits 5.3, start element 5.4 (Fig.4), item initial installation 5.5 (Fig.4) and the input element 5.6. The first input of the synchronizing element 5.2 simultaneously coupled to the output element of the initial installation of 5.5 and a second input of the input element 5.6, and the output from the clock input of the first cell 5.11the shift register 5.1. Promoting the output of the j-th cell, where j=1, 2,... N-1, N-bit register connected to the information input of the (j+1) th cells, and promotes the release of the N-th cell connected to the first input of the input element, the output of which is connected to the information input of the first cell of the N-bit register. Enable input of the i-th cell of the N-bit register connected to the i-th component output disable bits, and adjusting the inputs of all N cells N-bit register combined and connected to the output element soupravlenija.

The cells of the shift register 5.1l... 5.1Ncan be implemented as shown in Fig.3, and include DV-trigger 5.1.3, 5.1.1 first and second 5.1.5 inverters, input element And 5.1.2 and input element "OR" 5.1.4. The installation's entrance at the same time is connected with the output element disable bits 5.3, permissive input V and the input of the first inverter 5.1.1, the output of which is connected to a second input of two-input element And 5.1.2. Installation input R through the second inverter 5.1.5 connected to the output of the start element 5.4. Clock input 1 cells connected to the word clock item 5.2, the clock inputs of the cells 5.12... 5.1Nat the same time is connected to the second input of the synchronizing element 5.2 and the input of the control unit (Fig. 2). Information input D of the first cell at the same time connected to the output of the input element 5.6 and the first input of two-input element And 5.1.2. The information inputs of the cells 5.12... 5.1Nat the same time connected to the first input of two-input element "And" 5.1.2 cells 5.12... 5.1Nand the output of two-input-element "OR" 5.1.4 cells 5.1l... 5.1N-1first input connected to the output of two-input element And 5.1.2, and the second direct DV-flip-flop m input input element 5.6 (Fig. 2).

The start element 5.4 can be implemented as shown in Fig.4, and includes a power source E, RC-chain and the switch, the output of the start element simultaneously connected with the installation of the inputs of the i-th cell of the shift register.

Item initial installation 5.5 can be implemented as shown in Fig. 5, and includes a power source E, the quenching resistor and a button. The output element is connected to the first input clock item 5.2 and to the second input of the input element 5.6, which represents a two-input element "OR". Clock item 5.2 is a two-element OR the second input is simultaneously connected to the input of the control unit and clock inputs 5.12... 5.1Ncells of the shift register. Item disable bits 5.3 is implemented on the basis of a resistive matrix, identical to the first 3.1 and 3.2 second resistive matrix forming unit threshold, the i-th output of which is connected with the allow output of the i-th cell of the shift register.

DV-triggers can be implemented on integrated circuits, described in the book: C. A. Batashev, C. N. Veniaminov, V., Kovaleva and others; Circuits and their application): Energy, 1978, page 164-168.

Elements "And", "Y. N. Smirnov and others ; Integrated circuits; Reference. - Second edition, corrected - M.: Energoatomizdat, 1985.

The generator works as follows.

The principle of operation of the generator is the sampling of random numbers with a given probability of occurrence of the sequence of random numbers generated by a random numbers generator by sequential selective sampling of random numbers generated by a random numbers generator.

The accuracy of formation of the simulated distribution functions is largely determined by the ability of random number generators (RNG) to generate a sequence of numbers whose values in each step is a random variable defined on the interval from 0 to MN-1where N is the number of bits of the random numbers generator RNG, M - base used notation (M. P. Bonev "Generating random signals. Ed. 2nd Rev. and ext. - M., "Energy", 1971, S. 132). This N-bit generator allows to obtain n= MN(1) different numbers. In this case, the probability of occurrence for each of the n numbers is determined by the number of bits of the RNG, which in General is final. This circumstance causes a certain tradotto can be extended applying the successive formation of numbers using the method of selective sampling (L. 1, S. 136).

The significance of this technique is to filter the set of numbers that do not meet the required rule. In this case, a region numbers, which are "true" and participate in the generation of random numbers on the next step of the transformation. In this case, the probability of occurrence of the desired random numbers at each step of the conversion is subject hypergeometric distribution (C. S. Korolyuk, N. And. Portenko, A. C. Skorokhod, A. F. Turbines. Handbook of theory of probability and mathematical statistics. Second edition, Rev. and expanded. M; "Science", 1985, S. 112).

Thus, by implementing the above principle of generation of random numbers, you can generate a stream of numbers with any arbitrarily low probability of their occurrence.

The signal in the form of binary k-bit number from the output of a random numbers generator (RNG) (Fig. 1) is supplied to the information input items "And" all blocks of keys (Fig.6). Managing the i-th input block of keys is connected with the corresponding i-th output of the control unit and if there is a logical signal "1" is the entry number in the i-th block formation thresholds Is due to the fact, what is the basis of the control unit (Fig. 2) is a circular shift register that works as follows. When the power is turned on (Fig.3) when closed the switch contacts of the start element 5.4 cell of the shift register is made on the basis of the DV-flip-flop are set to "0" state. This is due to the short signal is a logical "0" on input. The signal is logical "1" on the installation inputs S of the cells involved in the formation of the output signal is effected by shorting the contacts of the respective switch element off discharges 5.3. Thus, cells of the bits of the register are trained to work on the information input By D. short circuit button item initial installation 5.5 (Fig.5) the signal of logical "1" via the input element 5.6 and clock item 5.2, acting on information input D and the clock input From the DV-flip-flop of the first cell, provides a write "1". At the output of the first flip-flop is "1", the output of the other of "0". When the i-th trigger is not used in generating the output signal at the enable input of the cell of the shift register element 5.3 served logical "0" in this kulebyaka trigger. When this signal is logic "0" at the output of the trigger is provided by a ban of the account number from the RNG output through the corresponding block key block formation thresholds.

Consistent navigation bits of the shift register is fed to the clock inputs of the trigger signal is a logical "1", which is formed in the N-vchodove element "OR" (Fig.8) having "1" at the output of any of the i-th processing unit thresholds. In this case, information on outputs 1, 2,..., i of the control unit alternately formed combination 100. .. 00, 010... 00, 000... 01, which, by acting on the control inputs of elements And blocks of keys (Fig.6) allow the entry number from the RNG output to the input of the corresponding block formation thresholds.

In block formation thresholds using nodes comparison 3.3 and 3.4 (Fig.7) is made by comparing the N-bit number received from the output of block keys with upper and lower thresholds, which are determined by the desired probability of occurrence of the number. The thresholds are set using a resistive matrices 3.1 and 3.2. In case of satisfaction of the conditions specified resistive matrices, the signal "1" through the block 3.8 is input to N-Vodolaga element "OR" 4.

As a result of successive selective is investing thresholds will be generated a random number, meet the requirements.

Claims

1. The random number generator that contains a random number sensor and the control unit, characterized in that it additionally introduced N, where N2, blocks of keys, N blocks forming rapids and N-shadowy element OR k-bit output of the sensor of random numbers, where k2, is connected with k-bit information inputs of each block of keys, the i-th output control unit, where i= 1, 2, . . . , N is connected with the control input of the i-th block of keys, k-bit output of which is connected with k-bit input of the i-th block formation thresholds, managing the output of which is connected to the i-th entry of the N-Vodolaga element OR the output N-Vodolaga element OR is connected to the input of the control unit, the information of the k-bit output of the N-th processing unit threshold is the output of the random number generator.

2. Generator under item 1, characterized in that the control unit comprises an input element representing a two-element OR synchronizing element, block, run, block, disable bits, block initial installation and the N-bit shift register comprising N cells, promoting output is the second output of the N-th cell connected to the first input of the input element, the second input is connected to the first input of the synchronizing element and the output unit initial setup, the output of the input element connected to the information input of the first cell of the N-bit register, the clock inputs of the cells of the N-bit register numbers from the second to N-th joint connected to the second input of the synchronizing element, an entrance control unit and the clock input of the first cell is connected to the output of the synchronizing element enable input of the i-th cell of the N-bit register connected to the i-th unit output disable bit, and the installation inputs of all N cells N-bit register combined and connected to the output of the start block, the information outputs of all N cells N-bit register is the respective N outputs of the control unit.

 

Same patents:

The invention relates to radio engineering and radio communications and can be used to create generators videocasting and high frequency noise or interference in a given frequency range

The invention relates to computing, information-measuring engineering and can be used in stochastic computing machines when building random number generators for computers in systems of cryptographic protection of information

The invention relates to specialized computing and can be used in statistical modeling, the creation of optical data processing devices and so on

The invention relates to radio engineering

The invention relates to radio engineering

The invention relates to radio engineering and radio communications and can be used to create a generator of noise or interference in a given frequency range

The invention relates to computing and can be used in statistical modeling of optical means

The invention relates to the field of games, as well as to methods of education of random numbers predominantly for dice games

The invention relates to the field of computer engineering and can be used for analysis of random processes

The invention relates to automation and computer engineering and can be used in Metrology for creating digital group standards

The invention relates to the field of computer engineering and can be used in control systems

The invention relates to computer technology and can be used for decision making with regard to expert estimations in the development of automated control systems of various processes and large systems

The invention relates to radio engineering and computer science and is intended for parametric estimation of the law of distribution of a multipackage messages in multi-media (satellite, radio relay, tropospheric) radio combined in a digital communications network integrated service

The invention relates to radio engineering and computer science and is intended for use in the complexes of automated control systems networks multi-radio

The invention relates to the field of information-measuring and computing and is designed to measure emissions or voltage dips duration exceeding that of different levels of analysis more set of critical values, and determine the total time of electrical failures when the transient voltage in electric networks

The invention relates to the field of information-measuring and computer engineering, is designed to simultaneously obtain families of distribution functions duration exceeding the levels of analysis of emissions and voltage dips at different values of the deviations of voltage and can be used in the power industry for quality control of energy during the transient voltage in electric networks and evaluate its impact on various electrical equipment

The invention relates to computing and can be used to solve problems of the theory of mass service, control of complex technological processes in the conditions of the fuzzy initial information, as well as for fuzzy inference in expert systems

The invention relates to the field of computer engineering and can be used in communication systems
Up!