The method of transfer and recognition of binary information
The invention relates to techniques for telecommunication, in particular to the transmission and reception of binary information. The technical result is to simplify the method of transfer and recognition of binary information. The technical result is achieved in that on the transmission side to form a sequence of harmonic signals, characterizing value of the logical levels, transmit a sequence of data signals over the communication channel, at the receiver side the received signal is subjected to analog-to-digital conversion and educated array of digital reports recognize the accepted sequence data, and when detecting the received sequence data record of the first transition of the received signal through the zero level and begin to determine the average value of this signal, also compare the values of samples of the received signal and the average value of the periods of the signal, which make the transfer of logical levels, determine the moment of maximum proximity of the received signal and its average value found time interval between the first transition of the received signal and its average value is considered as the period of the signal is of such levels, and judge the value of a received logic level. 2 Il., table 1. The invention relates to electrical engineering, in particular to telecommunications, and may be used in systems of remote control and alarm systems, namely the systems of transmission and reception of binary data.In the information transmission through a noisy communication lines there is a need to increase the validity of received data with minimal computational cost. Therefore, the problem of reliable and fast detection of the adopted binary information is relevant.There is a method of transfer and recognition of binary information (Karimov R. N. , Katz E. J., Chervyakova O. C. Quick algorithm for detecting signals of a given frequency in the communication lines.//Interuniversity collection of scientific works: - Saratov, 1998. - S. 52-59. ), which is selected as a prototype. The known method is that when the transfer logic level serial data stream on the transmission side with generators, built using quartz resonators form a serial stream of harmonic signals with frequencies of 30 kHz for the transmission of a logical "l" and 20 kHz for the transmission of a logical "0". The generated flow garoowe-digital Converter (ADC) and educated array of digital samples to recognize one of the high-frequency components, namely, a signal with a frequency of 30 kHz.The disadvantages of this method are: the need to use quartz resonators in the formation of the harmonic signals; the need for a sufficiently large length implementation of the analyzed harmonic signal (5 periods) when recognizing a significant dependence on the established frequency for transmission to the logic levels and the binding of these frequencies to a specific range.The task of the invention is to simplify the method of transfer and recognition of binary information.This object is achieved in that in the method of transfer and recognition of binary information as the prototype for transmission of serial data stream on the transmission side to form a sequence of harmonic signals, characterizing value of the logical levels. This sequence is passed over the communication channel. At the receiving side, the received signal is subjected to analog-to-digital conversion and educated array of digital samples to recognize the accepted sequence data.According to the invention in contrast to the prototype when detecting binary information comprising an array of digital reference is regulate the average value of this signal. Simultaneously, comparing the values of samples of the received signal and its average value in the area known values of the periods of the signals, which make the transfer of logical levels, determine the moment of maximum proximity of the received signal and its average value in the range of half the sampling period of the received signal. The time interval between the first transition of the received signal through the zero level and maximum proximity of the received signal and its average value in the range of half the sampling period of the received signal is considered as the period of the signal Twith. In case of equality of Twiththe period of the signal, which was formed in the transmission of a logical "l", get the result of the adoption of logical "l". In case of equality of Twiththe period of the signal, which was formed in the transmission of a logical "0", receive a result of the adoption of a logical "0".The first transition of the received signal through the zero level allows to take into account the influence of the phase shift of this signal. Due to the fact that the definition of Twithproduced in the area known values of the periods of the signals, by which the produce before, is using only two memory cells for storing the current samples of the received signal and its average value. Recognition logic level by determining the value of the period of the received signal on the basis of the analysis of the signal and its average value was able to handle signals with a high level of noise when a possible deviation of the frequency of the harmonic signals up to 10% of the nominal frequency during their formation.The proposed method for the transfer and recognition of binary information has a number of advantages, which are expressed in what appears fast to handle the received harmonic signals in real time without requiring a large number of memory cells, the deviation of the frequency of the harmonic signals up to 10% of the nominal frequency in their formation, as well as the opportunity to handle signals with a DC component, any phase shift and a high level of noise.In Fig. 1 shows a block diagram of the proposed method transfer and recognition of binary information.In Fig. 2 shows graphs of changes over time of the signal (2) Ui(curve 1) and the average value of Yi(curve 2).In the tables the I binary information is implemented using structural diagram (Fig. 1) containing the encoder 1, the first inlet of which a serial stream of binary data, x(t), the generators 2 and 3, the outputs of which are connected with the second and third inputs of the encoder, analog-to-digital Converter 4 (ADC), whose input is connected via a communication line with the output of the encoder 1, the device for determination of period 5, the input connected to the output of the ADC 4, and the output - input output device data 6.As generators 2 and 3 can be used generators series HA-117, GZ-105 or EZ-106, or they can be collected on the logic chip series 176, 561 or similar series. The encoder 1 may be selected from 1561 or a similar series of integrated circuits. As ADC 4 you can use the Converter CPU or similar. Device for determination of the period of the signal 5 and the output device 6 may be implemented on the basis of microprocessor CRUM or equivalent.The serial binary data stream x(t) is supplied to the encoder 1, which by means of frequency generators 2 and 3 generates a sequence of harmonic signals u(t), the frequency of which correspond to the transmitted logical levels. The flow of harmonic signals transmitted by the one taken from the line signal u'(t), processed through ADC 4. By educated array of digital samples using a device definition period 5 determine the period of the signal Twiththe points of intersection of the signal from its mean value. When this is fixed the first transition of the considered signal through the zero level and, from this point of time tbeg, the computation of the average value of Yithis signal in each i-th point in time



















Claims
The method of transfer and recognition of binary information, namely, that the transmission of the serial data stream on the transmission side to form a sequence of harmonic signals, characterizing value of the logical levels, transmit a sequence of data signals over the communication channel, at the receiver side the received signal is subjected to analog-to-digital conversion and educated array of digital reports recognize the accepted sequence data, wherein when recognizing the received sequence data record of the first transition of the received signal through the zero level, and from that time begin to determine the average value within the range of known values of periods of the signal, with the help of which make the transfer of logical levels, determine the moment of maximum proximity of the received signal and its average value in the range of half the sampling period of the received signal, the value found time interval between the first transition of the received signal through the zero level and maximum proximity of the received signal and its average value in the range of half the sampling period of the received signal is considered as the period of the signal Tcif the equality Tcthe period of the signal, which was formed in the transmission of a logical "1", receive a result of the adoption of a logical "1" when the equality Tcthe period of the signal, which was formed in the transmission of a logical "0", receive a result of the adoption of a logical "0".
FIELD: digital technology; conversion of analog voltage to digital code.
SUBSTANCE: proposed converter has differential amplifiers, comparator, dc amplifier, analog memory device, control device, serial-to-parallel code converter, modulo M counter, switches, inverter, and input stage for determining polarity and inverting negative voltages.
EFFECT: enhanced bit capacity at high speed and simple architecture of converter.
1 cl, 2 dwg
FIELD: computer engineering; automation, data processing and measurement technology.
SUBSTANCE: proposed converter has two registers, NOT gate, angle-code-to-sine/cosine-code functional conversion unit, two digital-to-analog converters, reference voltage supply, pulse generator, counter, two capacitors, subtracting amplifier, two modulators, threshold unit, two selector switches, two buffer followers, threshold voltage supply, comparison circuit, D flip-flop, and reference code shaper; all these components enable functional control of converter during recording pulse time and supply of signal indicating normal or abnormal operation of converter to user thereby essentially raising its self-control ability and yielding profound and reliable information.
EFFECT: enhanced comprehensiveness of control and reliability of converter output data.
1 cl, 2 dwg
FIELD: Witterby algorithm applications.
SUBSTANCE: system has first memory element for storing metrics of basic states, multiplexer, capable of selection between first and second operating routes on basis of even and odd time step, adding/comparing/selecting mechanism, which calculates metrics of end states for each state metric. Second memory element, connected to adding/comparing/selecting mechanism and multiplexer is used for temporary storage of end states metrics. Multiplexer selects first operating route during even time steps and provides basic states metrics, extracted from first memory element, to said mechanism to form end state metrics. During odd cycles multiplexer picks second operating route for access to second memory element and use of previously calculated end state metrics as metrics of intermediate source states.
EFFECT: higher efficiency.
2 cl, 9 dwg