The way the blind determination of the transfer rate of the data packet

 

(57) Abstract:

The invention relates to radio communications, and specifically to devices for determining the speed of transmission of data packets in cellular radio communications, for example, code division channels and can be used in both forward and reverse channels of the CDMA 2000 system. The technical result - the simplification of the way the blind determination of the transfer rate of the data packet, reducing processing time and power consumption while maintaining the high accuracy of discernment speeds. To solve this problem it is suggested to perform the decoding of the corresponding speeds in turns, and in the case of cyclic checksum CRC on the reception and execution conditions when the probability of symbol errors is less than the threshold SER<T, stop the decoding. The main purpose of further findings is the presence of such a decoding order of the speed at which the average computational complexity is minimal. The order of decoding speed can be selected in various ways, for example, hypothesis testing is conducted sequentially, starting with the minimum and to the maximum. Another option decoding order Keta. Hypothesis testing can be performed in such a manner which provides a minimal sum of products speed transmission on a corresponding posterior probability. 2 C.p. f-crystals, 4 Il.

The technical field

The invention relates to radio communications, and specifically to devices for determining the speed of transmission of data packets in the cellular radio communication, such as code division channels, and can be used in both forward and reverse channels of the CDMA 2000 system.

Art

As is known, the direct channel IS-95 basic forward and reverse channels CDMA 2000 provides four data transfer speeds of the two sets:

the first set (Set1): 9600, 4800, 2400, 1200 bps;

the second set (Set2): 14400, 7200, 3600, 1800 bits/s

In the main channel in all ranges of speed transmission uses convolutional encoding different redundancy. The length of the code in all cases is equal to 9.

Repetition bits for the speed correction is performed in both forward and reverse channels with data rates less than the maximum. At the same time, when the data rate is below the maximum usable capacity signaling bandwidth communication systems. However, at the receiving end the data transfer rate is unknown, it is therefore necessary to apply the device to identify it.

A known method for blind evaluation of the speed of data transmission that uses the correlation between the repeated bits at data rates less than the maximum described in articles E. Cohen and Lou "Multirate Detection for the IS-95 D forward traffic channels ", IEEE GLOBECOM 95, November 1995 [1] E. Cohen and H. Lou, "Multirate Detection for the IS-95A CDMA forward traffic channels using 13 kbps speech coder", IEEE GLOBECOM 96, November 1996 [2].

The term "blind" is a translation from English common notion of "Blind Data Rate Detection", which is a method of determining speed without using any specially designed for this information, indicator or characteristic. Such multi-detector uses the algorithm of calculation of the three relevant variables, consistent with possible speeds, and with the subsequent comparison with the thresholds.

A method of calculating the relevant variables in this simple from the point of view of the amount of calculations without multiplication, but using only the sum of absolute values, however, the method of comparing the decisive variable threshold system is very complicated and not optimal, which also reduces the reliability of the adoption solved].

This method is used to provide automatic decoding of each frame with any unknown baud rate.

Sequential decoder (Viterbi decoder) performs automatic decoding for each of the many modes by performing multiple passes to decode each frame with each of the set of all possible transmission speed information and provides for the determination of the initial velocity of information transfer.

This method allows to accurately determine the speed of data transferred, but four times (in the case of CDMA 2000) the use of the Viterbi decoder complicates the device for implementing this method.

The closest in technical essence to the present invention is a method for determining the speed of information transmission described in patent US 5774496 "Method and apparatus for determining data rate of transmitted variable rate in a communications receiver", QUALCOMM Inc., Jun. 30, 1998 [4]. Described in the mentioned patent, the method of determining the data rate of the received signal based on four-time decoding and analysis of cyclic checksum on reception. The term "cyclic checksum (cyclic redundancy check), it posledovatelnosti quality of received data at the receiving end. This sequence is obtained on the basis of all transmitted information bits of the packet. On the receiving end of the link also computes the sequence, but on the basis of the received information bits. The discrepancy between the transmitted checksum is again calculated at the receiving end of the line indicates that either data bits or the checksum is wrongly accepted. Described in [4] the method consists in the following:

- decode and re-encode on the first speed data package specified received signal for forming a first assessment of the received signal and the first cyclic redundancy check (CRC) on admission;

- compare the first estimate of the received signal with the received signal and calculates a first number of errors (SER), when this error occurs when the received signal does not match the specified first evaluation signal, the specified number of errors (SER) and the first quality indicator CRC at the reception, determine a first metric of the error;

- process the specified received signal for the formation of the second received signal representing the second data rate;

- decode and re-encode the NLA and the second CRC on received;

- compare the second assessment of the received signal with the received signal and calculates a second SER, when this error occurs when the received signal does not match the specified second evaluation signal, the specified number of SER and the second quality score determine a second metric of the error;

- process the specified received signal for the formation of the third received signal, representing the third data rate;

- decode and re-encode at the third data rate specified received signal for forming the third assessment of the received signal and the third CRC at the reception;

- compare the third estimate of the received signal with the received signal and calculate the third quantity SER, when this error occurs when the received signal does not match the specified third signal, the specified number of SER and third CRC on the receiving define a third metric errors;

- process the specified received signal for the formation of the fourth received signal representing a fourth data rate;

- decode and re-encode at the fourth speed data specified pridumivajut the fourth assessment of the received signal with the received signal and counting a fourth number of errors (SER), when this error occurs when the received signal does not match the specified fourth evaluation signal, the specified number of errors (SER) and the fourth indicator of quality - CRC on admission define a fourth metric errors;

- predict the data rate specified received signal based on a comparison of each of the designated metrics errors;

- when processing the received signal in the repeat mode (direct channel IS-95) sum of 2, 4 or 8 times, DBR (reverse link IS-95) choose certain times.

The disadvantage of this method is the use of four Viterbi decoding, which complicates the device for its realization, increases the processing time and power consumption.

The invention

The objective of the invention is to simplify the way the blind determination of the transfer rate of the data packet at the receiving end of the communication line (hereinafter, "reception"), reducing the average processing time and power consumption while maintaining the high accuracy of discernment speeds.

To solve this problem in the way the blind determination of the speed of data transmission, namely, Thu cyclic checksum on reception do a reverse coding (reverse coding" suggests that all the decoded information bits, and the bits of the cyclic checksum of the newly encoded in order to obtain estimates of received code symbols) and form the estimate of the probability of symbol errors, compare the probability of symbol errors with a threshold, in addition, introduce a new sequence of operations: decoding stop and make a decision about the speed of data transfer, if the test another hypothesis, the probability of symbol errors is less than the threshold and cyclic checksum on reception of the same, the order of testing hypotheses is chosen so as to minimize the average computational costs, if after testing all hypotheses rate is not defined, then define it:

- if cyclic checksum at the reception will only match to one hypothesis, the decision about transfer speeds take in favor of this hypothesis;

- if cyclic checksum on reception are the same for multiple hypotheses at the same time, the decision about the speed of data transmission stand in favor of one of them, which provides the minimum probability of symbol error is minute data taken in favor of the hypothesis, which provides the minimum probability of symbol errors.

In addition, hypothesis testing is conducted sequentially, starting with the minimum and to the maximum.

Hypothesis testing on the current package, you can start with the decision about the speed of the previous package.

Another option for testing hypotheses is that hypothesis testing is performed in such a manner which provides a minimal sum of products speed transmission on a corresponding posterior probability.

The proposed method consists in the following:

1) alternately decode the received signal in accordance with the hypothesis that the data transfer rate until the correct definition of speed;

2) compute the cyclic redundancy check sum (CRC) at the reception;

3) produce the opposite of the encoding form and estimate the probability of symbol errors (SER);

4) compare the probability of symbol errors with a threshold;

5) with regard to check cyclic redundancy check (CRC) on admission to determine the data transmission speed;

6) the decoding stop and make a decision about the speed of data transfer, if the test another hypothesis, the probability of a character fleecing thus, in order to minimize the average computational costs, if after testing all hypotheses rate is not defined, then define it:

- if cyclic checksum at the reception will only match to one hypothesis, the decision about transfer speeds take in favor of this hypothesis;

- if cyclic checksum on reception are the same for multiple hypotheses at the same time, the decision about the speed of data transmission stand in favor of one of them, which provides the minimum probability of symbol errors;

- if cyclic checksum on reception does not match any of the hypotheses, the decision about the speed of data transfer are accepted in favor of the hypothesis that provides the minimum probability of symbol errors.

Hypothesis testing can be performed in different ways:

- hypothesis testing carried out sequentially, starting with the minimum and to the maximum;

- hypothesis testing on the current package starts with the decision about the speed of the previous packet;

- alternative, hypothesis testing is performed in such a manner which provides a minimal sum of products of the transfer rate on the corresponding a posteriori BR> Fig. 1 is a block diagram for implementing the proposed method of determining data transmission speed;

Fig.2 is an example of the execution unit determining posterior probabilities;

Fig. 3 - the dependence of the probability of packet errors from the values of energy bit to spectral noise;

Fig.4 the computational complexity of the decoding.

The preferred method of carrying out the invention

For the implementation of the proposed method is shown in Fig.2, where indicated:

1 - the block of memory

2 is a block averaging,

3 is a Viterbi decoder,

4 - computing unit cyclic redundancy check (CRC) at the reception,

5 - coder,

6 - unit comparison,

7 - counter

8 - unit decision-making,

9 is a block for determining posterior probabilities,

10 - control unit.

The device comprises a serially connected memory block 1, the input of which is the input of the block averaging 2, the Viterbi decoder 3, the encoder 5, the block comparison 6, a counter 7, the block decision 8 whose output is the output device, the controller determining a priori probability 9, the control unit 10. The first output of the control unit 10 is connected with the second of whichprovide 10 is connected with the second input unit 4 calculate the CRC at the reception. The output of block averaging 2 is also connected with the second input unit of comparison 6. The output of the Viterbi decoder 3 is connected to the input unit 4 calculate CRC on receive, the output of which is connected with the second input unit of decision-making 8.

The device operates as follows.

Samples of a received signal remembered in the memory block 1. Since the transmission rate information for each received signal are different, that are preparing the input signal of the decoder, which consists in averaging one, two, four and eight times in accordance with the hypothesis of speed packet data using block averaging 2. Decode timing of a received signal in the Viterbi decoder 3 and for each received signal is calculated cyclic checksum on reception unit 4 calculate the CRC. The signal after decoding is subjected to reverse the encoding in the encoder 5 for forming an estimate of the received signal. In block comparisons produce 6 comparison of estimated received signal with a threshold (the threshold value is determined by the type of encoder) and then counter 7 positive number of errors, forming the probability of symbol errors (SER).

The results of the comparison are transmitted in the unit of decision-making 8, gdgm and taking into account test results cyclic checksum on reception. For each step, determine the speed of block a decision 8 considers the following solutions. If the probability of symbol errors is less than the threshold and cyclic checksum on reception of a match, then the decoding stop and this hypothesis is considered true. The order of testing hypotheses is chosen so as to minimize the average computational costs.

If after testing all hypotheses rate is not defined, then it is determined from the following conditions. If the CRC at the reception will only match to one hypothesis, the decision on the transfer rate of the data packet is accepted in favor of this hypothesis. If the CRC at the reception are the same for multiple hypotheses at the same time, the decision about the speed packet data stand in favor of one of them, which provides the minimum probability of symbol errors. If the CRC at the reception does not match any of the hypotheses, the decision on the transfer rate of the data packet selected from the hypothesis that provides the minimum probability of symbol errors.

To determine the order of the decode block is used to determine the posterior probabilities 9, an example of which is shown in Fig.2. At the initial BP will SHS 1, the logical device 11 delivers 1 to the input of a channel corresponding to a certain speed, and all other channels to 0. The result of the accumulation counter 13 is proportional to posterior probabilities speed. Upon receipt of the signal at the upper input of the counter 13, the accumulation counter is incremented by 1, when a signal on the lower input of the counter 13 is decremented by 1.

Controls the operation of the device the control unit 10.

Let us prove the goal.

In accordance with the generally accepted approach is fourfold Viterbi decoding. If we take the computational complexity of the decoding of the data packet maximum speed for 1, then, taking into account the reduction of the length of the package at low speeds, the complexity of the conventional blind detector speed equal

1 + 0,5 + 0,25 + 0,125 = 1,875, (1)

where cost=[1, 0.5, 0.25, 0.125] - the computational complexity of decoding the corresponding speeds.

It is proposed to perform the decoding of the respective speeds alternately and in case of coincidence of the CRC and the conditions to be met SER<T stop decoding. The main purpose of further findings is the presence of such a decoding order of the speed at which the mean ranks of the order (i.e. order1=[1 2 3 4], order2=[1 2 4 3], and so on ). In other words, you need to find the optimal procedure for testing hypotheses about the speed, and note that i-I hypothesis has a certain probability piand its validation requires computational costs costi. Let p1, R2, R3and R4- probabilities of the respective speeds and orderi- the i-th decoding order (i[1, 24]), the probability that the decoding is stopped at the j-th step (if the decoding has reached the j-th step) is equal to

< / BR>
The probability that the decoding will reach the corresponding step is:

Ps1= 1, Ps2= 1-Pborderi,1, Ps3=(1-Pborderi,1)(1-Pborderi,2), Ps4=(1-Pborderi,1)(1-Pborderi,2)(1-Pborderi,3).

The average computational cost of decoding in accordance with the i-th order is

< / BR>
The optimal sequence decoding will match the order with the minimum average cost. For example, consider the case of equiprobable hypotheses, i.e.1= p2= p3=p4=0.25. The minimum value corresponding to, obviously, the order of decoding [4 3 2 1] equal to C=0.8124. If the probability of hypotheses is equal to p=[0.4 0.1 0. 0.4], the optimal C is widened the result of hypothesis testing, it was assumed error-free. In real terms, the average cost will be slightly higher.

The simulation results of decoder with the proposed speed detector in the channel with white Gaussian noise is shown in Fig.3 and Fig.4. For comparison, the parameters with a priori known data speeds.

As follows from the simulation results, the characteristics of the decoding in both cases are almost identical, while the interest level packet error 1% of the computational complexity of the proposed method, on average, 0.9 to 2.0 times lower than the complexity of the conventional approach.

Comparative analysis of the way the blind determination of the transfer rate of the data packet with the prototype shows that the proposed invention is substantially different from the prototype, as alternate Viterbi decoding can significantly reduce processing time and power consumption while maintaining the high accuracy of discernment speeds.

1. The way the blind determination of the data rate, which in turn decode the received signal in accordance with the hypothesis about the data rate, calculate the cyclic redundancy check sum for when the character of the error threshold, characterized in that the decoding stop and make a decision about the speed of data transfer, if the test another hypothesis, the probability of symbol errors is less than the threshold and cyclic checksum on reception of the same, the order of testing hypotheses is chosen so as to minimize the average computational costs, if after testing all hypotheses rate is not defined, then it is determined from the conditions: if cyclic checksum at the reception will only match to one hypothesis, the decision about transfer speeds take in favor of this hypothesis, if cyclic checksum on reception are the same for multiple hypotheses simultaneously, the decision about the speed of data transmission stand in favor of one of them, which provides the minimum probability of symbol errors, if cyclic checksum on reception does not match any of the hypotheses, the decision about the speed of data transfer are accepted in favor of the hypothesis that provides the minimum probability of symbol errors.

2. The method according to p. 1, characterized in that hypothesis testing is conducted sequentially, starting with the minimum and to the maximum.

3. The method according to p. 1, featuring

 

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