The selector pulse sequence

 

(57) Abstract:

The proposed selector applies to electrical engineering and can be used in a pulsed technique for selection and measurement of a regular pulse sequences. The technical result of the invention is to improve the reliability of the allocation of a periodic sequence of pulses with predetermined parameters due to the use of such an informative parameter, as the pulse amplitude. The selector pulse sequence contains the input shaper pulses, the first, second, third, fourth blocks of the delay element And an adder, multilevel amplitude selector switch, trigger and key. 2 Il.

The proposed selector applies to electrical engineering and can be used in radio devices for various purposes for breeding regular pulse sequences with the given parameters, and also for measuring the parameters of a periodic sequence of pulses.

The known device allocation periodic pulse signals based on the time parameters of the analyzed sequence (see, for example, U.S. patent N 3922676, ed.mon. N 477531, 894851, Ala the selector is a selector pulse sequence for ed.mon. N 1691938, M CL H 03 To 5/19, 1991, which is chosen for the prototype.

The disadvantage of the prototype is the low reliability of the breeding periodic sequences with given parameters. This disadvantage is due to the fact that the prototype for breeding is not used such an informative parameter, as the amplitude of the pulses. The presence in the prototype unit comparing the amplitudes can not distinguish sequences that have the same periods following Tandand duration of tandpulses, but with different amplitudes.

The objective of the invention is to increase the accuracy of the breeding periodic pulse sequences having the same repetition period and pulse width, but differ from each other by pulse amplitude.

The problem is solved in that the selector pulse sequence containing the input shaper pulses, an input connected to the input bus and to the input of the third delay unit, the output of which is connected through the key output bus, the first output of the input shaper is connected to the input of the first delay unit and the second output with the first input element And the output of which through the fourth delay unit soy is s connected in series adder, multilevel amplitude selector and switch, the output of which is connected to the first input of the trigger outputs of the first and second delay blocks connected respectively with the second and third input element And the output of which is connected to the first input of the adder, and the second with the output of the second delay unit, an input connected to the first output of the input driver.

A structural scheme of the selector shown in Fig. 1, a timing diagram explaining the principle of its operation is shown in Fig. 2.

The selector pulse sequence contains the input shaper pulses 1, an input connected to the input bus and to the input of the third delay unit 5, the output of which through the key 11 is connected to the output bus selector.

The first output driver 1 is connected to the inputs of the first 2 and second 4 units of delay, the outputs of which are connected respectively to second and third inputs of the element and 3, And the second output driver 1 is connected to the first input element And 3, the output of which through the fourth 7 the delay unit is connected to a second input of the trigger 11. The output element And 3 connected to the first input of the adder 6, and the second with the second output 4 of the delay block. O is outinen to the first input of the trigger 10, and its out - with the control input of the key 11.

The proposed selector works as follows. Input pulse sequence (Fig. 2A), which are two sequences with the same periods following Tandand duration of tandbut with different amplitudes, is applied to the input shaper 1 and 5 on the third unit delay. The first output of the input shaper 1 pulses of constant duration proportional to the amplitude of the input pulses and their corresponding leading edge (Fig. 2B) and the second output - similar pulses corresponding to the rear edge of the input pulse (Fig. 2B), served on the first input element And 3. The pulses from the first output driver 1 is delayed in the first 2 unit delay time is equal to a specified pulse duration tand(Fig. 2G), and the second unit 4 is delay - on time is equal to the sum of a given repetition period Tandand tand(Fig. 2D) and fed respectively to the second and third inputs of the element And 3. At times, when all three inputs of the element And 3 are the signals at its output pulses appear (Fig. 2E). As can be seen, the output element And 3 pass pulses from both posledovateli to share.

In the proposed selector pulses (Fig. 2E) are fed to the first input of the adder 6 and the fourth input 7 of the delay block. To the second input of the adder pulses from the output of the second unit 4 delays (Fig. 2D). At the output of the adder 6 appears pulses (Fig. 2ZH), which provide information about the amplitude of the pulse sequences. From the output of the adder 6 pulses for multilevel amplitude selector 8, where, depending on the total amplitude of the input pulses are divided by level (Fig. 2H). Each channel of the multi-level amplitude selector 8 transmits on its output pulse only when the amplitude of the total voltage Uclies in some interval Umin< Uc< Umaxcharacterizing this level (channel). The switch 9 allows you to connect to the first input of the trigger 10 any level (channel) multi-level amplitude selector 8. When power is applied, for example, at the k-th level (Fig. 2i) multilevel amplitude selector 8, these pulses through the switch 9 receives at the first input of the trigger 10 and the cutting edge install it in one state. In the zero state, the trigger 10 is set by the pulses from the output of the fourth bwht this key pulses from the output of the fourth 5 delay unit, delayed for a time equal to the sum of the repetition period and pulse duration (Fig. 2m). Thus, the output of the selector in this case, a periodic sequence of pulses with the preservation of their amplitude (Fig. 2H). When connecting the switch 9 to another level, for example, j-th, the trigger 10 is set to one state by the pulses from this level (Fig. 2P) and the output trigger will control pulses appear at other points in time (Fig. 2P). Therefore, the output of the selector is another periodic sequence (Fig. 2C).

Thus, using the proposed selector inputs of the adder, multilevel amplitude selector and switch, in a certain way United with the prototype, and the choice of time delay blocks delay allows for the selection of a given periodic sequence along with the repetition period and pulse duration such informative parameter, as the amplitude of the pulses. This increases the reliability of the allocation sequence.

The selector pulse sequence containing the input shaper pulses, an input connected to the input W is underwater shaper pulses, at which pulses of constant duration proportional to the amplitude of the input pulses at the moments corresponding to the leading edge of the input pulses, is connected to the input of the first delay unit and the second output of the input shaper pulses, which are formed similar to the pulses at the moments corresponding to the rear edge of the input pulses, connected to the first input element And the output of which through the fourth delay unit connected to the second input of the trigger, the output of which is connected with the control input of the key, and the second delay unit, characterized in that it additionally connected in series adder, multilevel amplitude selector and switch, the output of which is connected to the first input of the trigger outputs of the first and second delay blocks connected respectively with the second and third inputs of the element And whose output is connected to the first input of the adder, a second input connected to the output of the second delay unit, an input connected to the first output of the pulse shaper.

 

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